LTM8058
3.1VIN to 31VIN Isolated
µModule DC/DC Converter
with LDO Post Regulator
FEATURES
DESCRIPTION
2kV AC Isolated µModule Converter
(Tested to 3kVDC)
n UL60950 Recognized File E464570
n Wide Input Voltage Range: 3.1V to 31V
n V
OUT1 Output:
Up to 440mA (V = 24V V
IN
, OUT1 = 2.5V)
2.5V to 13V Output Range
n V
OUT2 Low Noise Linear Post Regulator:
Up to 300mA
1.2V to 12V Output Range
n Current Mode Control
n Programmable Soft-Start
n User Configurable Undervoltage Lockout
n Low Profile (9mm × 11.25mm × 4.92mm)
BGA Package
The LTM®8058 is a 2kV AC isolated flyback µModule®
(micromodule) DC/DC converter with LDO post regulator.
Included in the package are the switching controller, power
switches, transformer, LDO, and all support components.
Operating over an input voltage range of 3.1V to 31V, the
LTM8058 supports an output voltage range of 2.5V to 13V,
set by a single resistor. There is also a linear post regulator
whose output voltage is adjustable from 1.2V to 12V as
set by a single resistor. Only output and input capacitors
are needed to finish the design. Other components may
be used to control the soft-start control and biasing.
n
The LTM8058 is packaged in a thermally enhanced, compact (9mm × 11.25mm × 4.92mm) overmolded ball grid
array (BGA) package suitable for automated assembly
by standard surface mount equipment. The LTM8058 is
available with SnPb or RoHS compliant terminal finish.
APPLICATIONS
L, LT, LTC, LTM, Linear Technology, the Linear logo and µModule are registered trademarks of
Analog Devices, Inc. All other trademarks are the property of their respective owners.
Industrial Sensors
Industrial Switches
n Ground Loop Mitigation
n
n
TYPICAL APPLICATION
2kV AC Isolated Low Noise µModule Regulator
Total Output Current vs VIN
330
•
RUN
VOUT1
5.7V
VOUT2
•
2.2µF
LOW
NOISE
LDO
ADJ2
BYP
VOUT–
GND
22µF
162k
VOUT2
5V
10µF
BIAS
4.7µF
6.19k
280
VOUT1 CURRENT (mA)
VOUT1
VIN
VIN
4.3V TO 29V
230
180
130
SS
ADJ1
LTM8058
8058 TA01a
2kV AC ISOLATION
80
0
5
10
20
15
INPUT VOLTAGE (V)
25
30
8058 TA01b
8058fb
For more information www.linear.com/LTM8058
1
LTM8058
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
TOP VIEW
VIN, RUN ...................................................................32V
BIAS ...........................................................................VIN
ADJ1, SS......................................................................5V
VOUT1 Relative to VOUT–........................................... +16V
VIN + VOUT1 (Note 2)..................................................36V
VOUT2 Relative to VOUT–...........................................+20V
ADJ2 Relative to VOUT–..............................................+7V
GND to VOUT– Isolation (Note 3).......................... 2kV AC
Maximum Internal Temperature (Note 4)............... 125°C
Maximum Peak Body Reflow Temperature............ 245°C
Storage Temperature.............................. –55°C to 125°C
ORDER INFORMATION
A
C
PAD OR BALL FINISH
LTM8058EY#PBF
SAC305 (RoHS)
BANK 3 BYP
VOUT2
BANK 2
VOUT–
BANK 1
VOUT1
D
E
F
BANK 5
VIN
G
BANK 4
GND
RUN
ADJ1
H
BIAS SS
1
3
4
5
6
7
BGA PACKAGE
38-LEAD (11.25mm × 9mm × 4.92mm)
TJMAX = 125°C, θJA = 23.2°C/W, θJCbottom = 5.8°C/W, θJCtop = 23.2°C/W, θJB = 6.7°C/W
WEIGHT = 1.1g, θ VALUES DETERMINED PER JEDEC 51-9, 51-12
2
http://www.linear.com/product/LTM8058#orderinfo
PART MARKING*
PART NUMBER
ADJ2
B
DEVICE
FINISH CODE
PACKAGE
TYPE
MSL
RATING
LTM8058Y
e1
BGA
3
TEMPERATURE RANGE
(Note 4)
–40°C to 125°C
LTM8058IY#PBF
SAC305 (RoHS)
LTM8058Y
e1
BGA
3
–40°C to 125°C
LTM8058IY
SnPb (63/37)
LTM8058Y
e0
BGA
3
–40°C to 125°C
LTM8058MPY#PBF
SAC305 (RoHS)
LTM8058Y
e1
BGA
3
–55°C to 125°C
LTM8058MPY
SnPb (63/37)
LTM8058Y
e0
BGA
3
–55°C to 125°C
Consult Marketing for parts specified with wider operating temperature
ranges. *Device temperature grade is indicated by a label on the shipping
container. Pad or ball finish code is per IPC/JEDEC J-STD-609.
• Recommended LGA and BGA PCB Assembly and Manufacturing
Procedures:
www.linear.com/umodule/pcbassembly
• Terminal Finish Part Marking:
www.linear.com/leadfree
• LGA and BGA Package and Tray Drawings:
www.linear.com/packaging
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LTM8058
ELECTRICAL
CHARACTERISTICS
The l denotes the specifications which apply over the full internal
operating temperature range, otherwise specifications are at TA = 25°C, RUN = 12V (Note 4).
PARAMETER
CONDITIONS
Minimum Input DC Voltage
BIAS = VIN, RUN = 2V
BIAS Open, RUN = 2V
l
l
MIN
VOUT1 DC Voltage
RADJ1 = 12.4k
RADJ1 = 6.98k
RADJ1 = 3.16k
l
4.75
TYP
2.5
5
12
VIN Quiescent Current
VRUN = 0V
Not Switching
850
VOUT1 Line Regulation
6V ≤ VIN ≤ 31V, IOUT = 0.15A, RUN = 2V
1.7
MAX
UNITS
3.1
4.3
V
V
5.25
V
V
V
1
µA
µA
%
VOUT1 Load Regulation
0.05A ≤ IOUT ≤ 0.2A, RUN = 2V
1.5
%
VOUT1 Ripple (RMS)
IOUT = 0.1A, 1MHz BW
20
mV
Input Short-Circuit Current
VOUT1 Shorted
30
mA
RUN Pin Input Threshold
RUN Pin Rising
RUN Pin Current
VRUN = 1V
VRUN = 1.3V
1.18
SS Threshold
1.24
1.30
V
2.5
0.1
µA
µA
0.7
V
–10
µA
SS Sourcing Current
SS = 0V
BIAS Current
VIN = 12V, BIAS = 5V, ILOAD1 = 100mA
Minimum BIAS Voltage (Note 5)
ILOAD1 = 100mA
LDO (VOUT2) Minimum Input DC Voltage
(Note 6)
1.8
VOUT2 Voltage Range
VOUT1 = 16V, RADJ2 Open, No Load (Note 6)
VOUT1 = 16V, RADJ2 = 41.2k, No Load (Note 6)
1.22
15.8
ADJ2 Pin Voltage
VOUT1 = 2V, IOUT2 = 1mA (Note 6)
VOUT1 = 2V, IOUT2 = 1mA (Note 6)
8
mA
3.1
l
1.19
1.22
V
2.3
V
V
V
V
V
1.25
VOUT2 Line Regulation
2V < VOUT1 < 16V, IOUT2 = 1mA (Note 6)
1
5
mV
VOUT2 Load Regulation
VOUT1 = 5V, 10mA ≤ IOUT2 ≤ 300mA (Note 6)
2
10
mV
LDO Dropout Voltage
IOUT2 = 10mA (Note 6)
IOUT2 = 100mA (Note 6)
IOUT2 = 300mA (Note 6)
VOUT2 Ripple (RMS)
CBYP = 0.01µF, IOUT2 = 300mA, BW = 100Hz to 100kHz (Note 6)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: VIN + VOUT1 is defined as the sum of:
(VIN – GND) + (VOUT1 – VOUT–)
Note 3: The LTM8058 isolation is tested at 3kV DC for one second.
Note 4: The LTM8058E is guaranteed to meet performance specifications
from 0°C to 125°C. Specifications over the –40°C to 125°C internal
temperature range are assured by design, characterization and correlation
with statistical process controls. LTM8058I is guaranteed to meet
0.25
0.34
0.43
20
V
V
V
µVRMS
specifications over the full –40°C to 125°C internal operating temperature
range. The LTM8058MP is guaranteed to meet specifications over the
full –55°C to 125°C internal operating temperature range. Note that
the maximum internal temperature is determined by specific operating
conditions in conjunction with board layout, the rated package thermal
resistance and other environmental factors.
Note 5: This is the BIAS pin voltage at which the internal circuitry is
powered through the BIAS pin and not the integrated regulator. See BIAS
Pin Considerations for details.
Note 6: VRUN = 0V (Flyback not running), but the VOUT2 post regulator is
powered by applying a voltage to VOUT1.
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LTM8058
TYPICAL PERFORMANCE CHARACTERISTICS
as in Table 1 (TA = 25°C).
VOUT1 = 2.5V
BIAS = 5V
Efficiency vs Output Current
80
12VIN
EFFICIENCY (%)
65
60
55
70
24VIN
65
60
55
200
100
300
OUTPUT CURRENT (mA)
0
50
400
80
0
12VIN
100
200
300
OUTPUT CURRENT (mA)
60
50
400
Input Current vs Output Current
VOUT1 = 2.5V
80 BIAS = 5V
12VIN
65
400
90
75
70
100
200
300
OUTPUT CURRENT (mA)
0
8058 G03
VOUT1 = 12V
BIAS = 5V
80
24VIN
EFFICIENCY (%)
EFFICIENCY (%)
65
Efficiency vs Output Current
85
75
24VIN
70
8058 G02
Efficiency vs Output Current
VOUT1 = 8V
BIAS = 5V
12VIN
55
8058 G01
85
VOUT1 = 5V
BIAS = 5V
75
12VIN
INPUT CURRENT (mA)
EFFICIENCY (%)
24VIN
50
VOUT1 = 3.3V
BIAS = 5V
75
70
Efficiency vs Output Current
80
EFFICIENCY (%)
Efficiency vs Output Current
75
Unless otherwise noted, operating conditions are
24VIN
70
65
60
60
55
55
70
12VIN
60
50
24VIN
40
30
20
0
50
200
150
250
100
OUTPUT CURRENT (mA)
50
300
0
50
100
8058 G04
60
24VIN
50
40
30
20
100
12VIN
80
24VIN
60
40
20
10
0
0
VOUT1 = 8V
BIAS = 5V
160
140
12VIN
70
INPUT CURRENT (mA)
INPUT CURRENT (mA)
80
Input Current vs Output Current
180
VOUT1 = 5V
BIAS = 5V
120
200
100
300
OUTPUT CURRENT (mA)
400
8058 G07
0
400
8058 G06
Input Current vs Output Current
140
VOUT1 = 3.3V
BIAS = 5V
90
200
100
300
OUTPUT CURRENT (mA)
1
8058 G05
Input Current vs Output Current
100
0
200
150
OUTPUT CURRENT (mA)
INPUT CURRENT (mA)
50
10
12VIN
120
100
24VIN
80
60
40
20
0
100
200
300
OUTPUT CURRENT (mA)
400
8058 G08
0
0
50
100
150
200
250
OUTPUT CURRENT (mA)
300
8058 G09
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LTM8058
TYPICAL
PERFORMANCE CHARACTERISTICS
Unless otherwise noted, operating conditions are
as in Table 1 (TA = 25°C).
Input Current vs Output Current
Bias Current vs Output Current
VOUT1 = 2.5V
8 BIAS = 5V
VOUT1 = 12V
BIAS = 5V
180
7
BIAS CURRENT (mA)
12VIN
120
100
24VIN
80
60
12VIN
8
24VIN
6
5
4
3
3
20
1
0
0
0
200
100
300
OUTPUT CURRENT (mA)
1
400
BIAS CURRENT (mA)
8
24VIN
6
4
2
0
VOUT1 = 8V
BIAS = 5V
10
10
12VIN
8
6
4
2
100
200
0
400
300
OUTPUT CURRENT (mA)
0
MAXIMUM OUTPUT CURRENT (mA)
200
100
0
VOUT1 = 2.5V
VOUT1 = 3.3V
VOUT1 = 5V
0
5
10
15
VIN (V)
20
25
6
4
2
0
400
300
30
8058 G16
24VIN
8
50
100
150
200
250
OUTPUT CURRENT (mA)
0
300
0
50
100
150
OUTPUT CURRENT (mA)
Minimum Required Load
vs Input Voltage
45
BIAS = 5V FOR VIN ≥ 5V
BIAS = VIN FOR VIN < 5V
300
200
100
0
VOUT1 = 8V
VOUT1 = 12V
0
5
10
15
VIN (V)
20
25
200
8058 G15
Maximum Output Current vs VIN
400
12VIN
10
8058 G14
Maximum Output Current vs VIN
BIAS = 5V FOR VIN ≥ 5V
BIAS = VIN FOR VIN < 5V
VOUT1 = 12V
BIAS = 5V
12
24VIN
8058 G13
500
Bias Current vs Output Current
14
BIAS CURRENT (mA)
VOUT1 = 5V
BIAS = 5V
400
200
100
300
OUTPUT CURRENT (mA)
8058 G12
Bias Current vs Output Current
12
12VIN
0
8058 G11
Bias Current vs Output Current
12
BIAS CURRENT (mA)
4
2
8058 G10
MAXIMUM OUTPUT CURRENT (mA)
5
1
200
24VIN
6
2
100
50
150
OUTPUT CURRENT (mA)
12VIN
7
40
0
VOUT1 = 3.3V
BIAS = 5V
9
MAXIMUM REQUIRED LOAD (mA)
INPUT CURRENT (mA)
160
140
Bias Current vs Output Current
10
9
BIAS CURRENT (mA)
200
BIAS = 5V FOR VIN ≥ 5V
BIAS = VIN FOR VIN < 5V
40
35
30
25
20
15
10
VOUT1 = 2.5V
VOUT1 = 3.3V
VOUT1 = 5V
5
30
0
0
10
20
30
40
INPUT VOLTAGE (V)
8058 G17
8058 G18
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5
LTM8058
TYPICAL
PERFORMANCE CHARACTERISTICS
Unless otherwise noted, operating conditions are
as in Table 1 (TA = 25°C).
Minimum Required Load
vs Input Voltage
MINIMUM REQUIRED LOAD (mA)
25
Typical Output Ripple 100mA
Output Current, VIN = 12V
BIAS = 5V FOR VIN ≥ 5V
BIAS = VIN FOR VIN < 5V
NO CSS
VOUT1
5mV/DIV
20
CSS = 0.01µF
CSS = 0.1µF
1V/DIV
15
VOUT2
500µV/DIV
10
5
VOUT1 = 8V
VOUT1 = 12V*
0
200µs/DIV
100mA RESISTIVE LOAD
Input Current
vs VIN, VOUT1 Shorted
Input Current
vs VIN, VOUT2 Shorted
8058 G21
25
30
10
15
20
INPUT VOLTAGE (V)
8058 G19
*SEE APPLICATIONS INFORMATION SECTION
FOR DISCUSSION OF 12VOUT MINIMUM LOAD
5
Typical Switching Frequency vs
Output Current Stock DC1988A
900
800
700
500
INPUT CURRENT (mA)
12VIN
600
5VIN
400
300
200
80
225
70
200
60
175
50
40
30
150
125
100
75
20
100
0
8058 G20
500ns/DIV
MEASURED ON DC1988 WITH ADDIONAL 1µF
AND BNC ATTACHED TO OUTPUT TERMINALS.
C7 = 0.1µF. USED HP461A 150MHz AMPLIFIER,
SET TO 40dB GAIN.
INPUT CURRENT (mA)
0
SWITCHING FREQUENCY (kHz)
DC1988 VOUT1 Start-Up Behavior
for Different CSS Values
0
50
200
150
100
OUTPUT CURRENT (mA)
10
250
0
4
8
12
16 20
VIN (V)
24
28
50
32
0
10
8058 G23
20
VIN (V)
30
40
8058 G24
8058 G22
Junction Temperature Rise
vs Load Current
0.7
0.6
125°C
0.5
25°C
0.4
0.3
–40°C
0.2
0.1
0
7
6
5
4
3
3.3VIN
5VIN
12VIN
24VIN
2
50
100
150
200
250
VOUT2 LOAD CURRENT (mA)
300
8058 G25
0
0
50
VOUT2 = 1.5V
9
8
1
0
10
VOUT2 = 1.2V
9
TEMPERATURE RISE (°C)
VOUT2 DROPOUT VOLTAGE (V)
10
VOUT2 = 3.3V
Junction Temperature Rise
vs Load Current
100
150
200
250
VOUT2 LOAD CURRENT (mA)
300
8058 G26
TEMPERATURE RISE (°C)
VOUT2 Dropout
8
7
6
5
4
3
3.3VIN
5VIN
12VIN
24VIN
2
1
0
0
50
100
150
200
250
VOUT2 LOAD CURRENT (mA)
300
8058 G27
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LTM8058
TYPICAL
PERFORMANCE CHARACTERISTICS
Unless otherwise noted, operating conditions are
as in Table 1 (TA = 25°C).
8
7
6
5
4
3
3.3VIN
5VIN
12VIN
24VIN
2
1
0
0
50
100
150
200
250
VOUT2 LOAD CURRENT (mA)
7
6
5
4
3
16
10
8
6
3.3VIN
5VIN
12VIN
24VIN
0
0
50
100
150
200
250
VOUT2 LOAD CURRENT (mA)
300
8058 G31
TEMPERATURE RISE (°C)
TEMPERATURE RISE (°C)
12
2
50
100
150
200
250
VOUT2 LOAD CURRENT (mA)
8
6
4
0
300
16
14
12
12
10
8
6
0
3.3VIN
5VIN
12VIN
24VIN
0
50
50
100
150
200
250
VOUT2 LOAD CURRENT (mA)
300
8058 G30
Junction Temperature Rise
vs Load Current
14
2
0
8058 G29
VOUT2 = 8V
4
3.3VIN
5VIN
12VIN
24VIN
2
Junction Temperature Rise
vs Load Current
VOUT2 = 5V
4
0
8058 G28
Junction Temperature Rise
vs Load Current
14
3.3VIN
5VIN
12VIN
24VIN
2
0
VOUT2 = 3.3V
10
8
1
300
12
VOUT2 = 2.5V
9
TEMPERATURE RISE (°C)
TEMPERATURE RISE (°C)
10
VOUT2 = 1.8V
9
Junction Temperature Rise
vs Load Current
100
150
200
250
VOUT2 LOAD CURRENT (mA)
300
8058 G32
TEMPERATURE RISE (°C)
10
Junction Temperature Rise
vs Load Current
TEMPERATURE RISE (°C)
Junction Temperature Rise
vs Load Current
VOUT2 = 12V
10
8
6
4
3.3VIN
5VIN
12VIN
24VIN
2
0
0
50
100
150
200
VOUT2 LOAD CURRENT (mA)
250
8058 G33
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7
LTM8058
PIN FUNCTIONS
VOUT1 (Bank 1): VOUT1 and VOUT– comprise the isolated
output of the LTM8058 flyback stage. Apply an external
capacitor between VOUT1 and VOUT–. Do not allow VOUT–
to exceed VOUT1.
VOUT– (Bank 2): VOUT– is the return for both VOUT1 and
VOUT2. VOUT1 and VOUT– comprise the isolated output of
the LTM8058. In most applications, the bulk of the heat
flow out of the LTM8058 is through the GND and VOUT–
pads, so the printed circuit design has a large impact on
the thermal performance of the part. See the PCB Layout
and Thermal Considerations sections for more details.
Apply an external capacitor between VOUT1 and VOUT–.
VOUT2 (Bank 3): The output of the secondary side linear
post regulator. Apply the load and output capacitor between
VOUT2 and VOUT–. See the Applications Information section
for more information on output capacitance and reverse
output characteristics.
BYP (Pin B2): The BYP pin is used to bypass the reference
of the LDO to achieve low noise performance from the
linear post regulator. The BYP pin is clamped internally
to ±0.6V relative to VOUT–. A small capacitor from VOUT2
to this pin will bypass the reference to lower the output
voltage noise. A maximum value of 0.01µF can be used
for reducing output voltage noise to a typical 20µVRMS
over a 100Hz to 100kHz bandwidth. If not used, this pin
must be left unconnected.
RUN (Pin F3): A resistive divider connected to VIN and this
pin programs the minimum voltage at which the LTM8058
will operate. Below 1.24V, the LTM8058 does not deliver
power to the secondary. Above 1.24V, power will be delivered to the secondary and 10µA will be fed into the SS
pin. When RUN is less than 1.24V, the pin draws 2.5µA,
allowing for a programmable hysteresis. Do not allow a
negative voltage (relative to GND) on this pin.
GND (Bank 4): This is the local ground of the LTM8058
primary. In most applications, the bulk of the heat flow
out of the LTM8058 is through the GND and VOUT– pads,
so the printed circuit design has a large impact on the
thermal performance of the part. See the PCB Layout and
Thermal Considerations sections for more details.
ADJ1 (Pins G7): Apply a resistor from this pin to GND to
set the output voltage VOUT1 relative to VOUT–, using the
recommended value given in Table 1. If Table 1 does not
list the desired VOUT1 value, the equation
VIN (Bank 5): VIN supplies current to the LTM8058’s
internal regulator and to the integrated power switch.
These pins must be locally bypassed with an external,
low ESR capacitor.
may be used to approximate the value. To the seasoned
designer, this exponential equation may seem unusual. The
equation is exponential due to nonlinear current sources
that are used to temperature compensate the regulation.
ADJ2 (pin A2): This is the input to the error amplifier of the
secondary side LDO post regulator. This pin is internally
clamped to ±7V. The ADJ2 pin voltage is 1.22V referenced
to VOUT– and the output voltage range is 1.22V to 12V.
Apply a resistor from this pin to VOUT–, using the equation
RADJ2 = 608.78/(VOUT2 – 1.22)kΩ. If the post regulator is
not used, leave this pin floating.
BIAS (Pin H5): This pin supplies the power necessary to
operate the LTM8058. It must be locally bypassed with a
low ESR capacitor of at least 4.7μF. Do not allow this pin
voltage to rise above VIN.
(
)
R ADJ1 = 28.4 VOUT1–0.879 kΩ
SS (Pin H6): Place a soft-start capacitor here to limit inrush
current and the output voltage ramp rate. Do not allow a
negative voltage (relative to GND) on this pin.
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LTM8058
BLOCK DIAGRAM
VOUT1
VIN
VOUT2
•
•
0.1µF
499k
1µF
LOW NOISE
LDO
ADJ2
BYP
RUN
BIAS*
SS
VOUT–
CURRENT
MODE
CONTROLLER
ADJ1
GND
8058 BD
*DO NOT ALLOW BIAS VOLTAGE TO BE ABOVE VIN
OPERATION
The LTM8058 is a stand-alone isolated flyback switching
DC/DC power supply that can deliver up to 440mA of
output current. This module provides a regulated output
voltage programmable via one external resistor from 2.5V
to 13V. It is also equipped with a high performance linear
post regulator. The input voltage range of the LTM8058
is 3.1V to 31V. Given that the LTM8058 is a flyback converter, the output current depends upon the input and
output voltages, so make sure that the input voltage is
high enough to support the desired output voltage and
load current. The Typical Performance Characteristics
section gives several graphs of the maximum load versus
VIN for several output voltages.
A simplified block diagram is given. The LTM8058 contains
a current mode controller, power switching element, power
transformer, power Schottky diode, a modest amount of
input and output capacitance, and a high performance
linear post regulator.
The LTM8058 has a galvanic primary to secondary isolation rating of 2kV AC. This is verified by applying 3kV DC
between the primary to secondary for 1 second. Note that
the 2kV AC isolation is verified by a 3kV DC test. The peak
voltage of a 2kV AC waveform is 2.83kV DC, so 3kV DC is
applied. For details please refer to the Isolation, Working
Voltage and Safely Compliance section. The LTM8058 is
a UL 60950 recognized component.
An internal regulator provides power to the control circuitry. The bias regulator normally draws power from the
VIN pin, but if the BIAS pin is connected to an external
voltage higher than 3.1V, bias power will be drawn from
the external source, improving efficiency. VBIAS must not
exceed VIN. The RUN pin is used to turn on or off the
LTM8058, disconnecting the output and reducing the
input current to 1μA or less.
The LTM8058 is a variable frequency device. For a fixed
input and output voltage, the frequency increases as the
load increases. For light loads, the current through the
internal transformer may be discontinuous.
The post regulator is a high performance 300mA low
dropout regulator with micropower quiescent current and
shutdown. The device is capable of supplying 300mA at
a dropout voltage of 430mV. Output voltage noise can be
lowered to 20µVRMS over a 100Hz to 100kHz bandwidth
with the addition of a 0.01μF reference bypass capacitor.
Additionally, this reference bypass capacitor will improve
transient response of the regulator, lowering the settling
time for transient load conditions. The linear regulator is
protected against both reverse input and reverse output
voltages.
For more information www.linear.com/LTM8058
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9
LTM8058
APPLICATIONS INFORMATION
For most applications, the design process is straight
forward, summarized as follows:
1. Look at Table 1a (or Table 1b, if the post linear regulator is used) and find the row that has the desired input
range and output voltage.
2. Apply the recommended CIN, COUT1, COUT2, RADJ1,
RADJ2 and CBYP if required.
3. Connect BIAS as indicated, or tie to an external source
up to 15V or VIN, whichever is less.
While these component combinations have been tested for
proper operation, it is incumbent upon the user to verify
proper operation over the intended system’s line, load and
environmental conditions. Bear in mind that the maximum
output current may be limited by junction temperature,
the relationship between the input and output voltage
magnitude and polarity and other factors. Please refer
to the graphs in the Typical Performance Characteristics
section for guidance.
Capacitor Selection Considerations
The CIN, COUT1 and COUT2 capacitor values in Table 1 are
the minimum recommended values for the associated operating conditions. Applying capacitor values below those
indicated in Table 1 is not recommended, and may result
in undesirable operation. Using larger values is generally
acceptable, and can yield improved dynamic response, if
it is necessary. Again, it is incumbent upon the user to
verify proper operation over the intended system’s line,
load and environmental conditions.
Ceramic capacitors are small, robust and have very low
ESR. However, not all ceramic capacitors are suitable.
X5R and X7R types are stable over temperature and applied voltage and give dependable service. Other types,
including Y5V and Z5U have very large temperature and
voltage coefficients of capacitance. In an application circuit they may have only a small fraction of their nominal
capacitance resulting in much higher output voltage ripple
than expected.
A final precaution regarding ceramic capacitors concerns
the maximum input voltage rating of the LTM8058. A
ceramic input capacitor combined with trace or cable
inductance forms a high-Q (underdamped) tank circuit. If
the LTM8058 circuit is plugged into a live supply, the input
voltage can ring to much higher than its nominal value,
possibly exceeding the device’s rating. This situation is
easily avoided; see the Hot-Plugging Safely section.
LTM8058 Table 1a. Recommended Component Values and Configuration for Specific VOUT1 Voltages (TA = 25°C)
VIN
VOUT1
VBIAS
CIN
COUT1
RADJ1
3.1V to 31V
2.5V
3.1V to 15V or Open
2.2µF, 50V, 1206
100µF, 6.3V, 1210
12.4k
3.1V to 31V
3.3V
3.1V to 15V or Open
2.2µF, 50V, 1206
100µF, 6.3V, 1210
10k
3.1V to 29V
5V
3.1V to 15V or Open
2.2µF, 50V, 1206
22µF, 16V, 1210
6.98k
3.1V to 26V
8V
3.1V to 15V or Open
2.2µF, 50V, 1206
22µF, 10V, 1206
4.53k
3.1V to 24V
12V
3.1V to 15V or Open
2.2µF, 25V, 0805
10µF, 16V, 1210
3.16k/8.2pF*
9V to 15V
2.5V
VIN
2.2µF, 50V, 1206
100µF, 6.3V, 1210
12.4k
9V to 15V
3.3V
VIN
2.2µF, 50V, 1206
47µF, 6.3V, 1210
10k
9V to 15V
5V
VIN
2.2µF, 50V, 1206
22µF, 16V, 1210
6.98k
9V to 15V
8V
VIN
2.2µF, 50V, 1206
22µF, 10V, 1206
4.53k
9V to 15V
12V
VIN
2.2µF, 25V, 0805
10µF, 16V, 1210
3.16k
18V to 31V
2.5V
3.1V to 15V or Open
2.2µF, 50V, 1206
100µF, 6.3V, 1210
12.4k
18V to 31V
3.3V
3.1V to 15V or Open
2.2µF, 50V, 1206
47µF, 6.3V, 1210
10k
18V to 29V
5V
3.1V to 15V or Open
2.2µF, 50V, 1206
22µF, 16V, 1210
6.98k
18V to 26V
8V
3.1V to 15V or Open
2.2µF, 50V, 1206
22µF, 10V, 1206
4.53k
18V to 24V
12V
3.1V to 15V or Open
2.2µF, 50V, 1206
10µF, 16V, 1210
3.16k/8.2pF*
Note: Do not allow BIAS to exceed VIN, a bulk input capacitor is required. If BIAS is open, the minimum VIN is 4.3V.
*Connect 3.16k in parallel with 8.2pF from ADJ1 to GND
10
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LTM8058
APPLICATIONS INFORMATION
LTM8058 Table 1b. Recommended Component Values and Configuration for Specific VOUT2 Voltages (TA = 25°C)
VIN
VOUT1
VOUT2
VBIAS
CIN
COUT1
COUT2
RADJ1
RADJ2
3.1V to 31V
2.3V
1.2V
3.1V to 15V or Open
2.2µF, 50V, 1206
100µF, 6.3V, 1210
10µF, 6.3V, 1206
133k
Open
3.1V to 31V
2.3V
1.5V
3.1V to 15V or Open
2.2µF, 50V, 1206
100µF, 6.3V, 1210
10µF, 6.3V, 1206
133k
2.32M
3.1V to 31V
2.3V
1.8V
3.1V to 15V or Open
2.2µF, 50V, 1206
100µF, 6.3V, 1210
10µF, 6.3V, 1206
13.3k
1.07M
3.1V to 31V
3.08V
2.5V
3.1V to 15V or Open
2.2µF, 50V, 1206
100µF, 6.3V, 1210
10µF, 6.3V, 1206
10.5k
487k
3.1V to 31V
3.92V
3.3V
3.1V to 15V or Open
2.2µF, 50V, 1206
47µF, 6.3V, 1210
10µF, 6.3V, 1206
8.66k
294k
3.1V to 29V
5.7V
5V
3.1V to 15V or Open
2.2µF, 50V, 1206
22µF, 16V, 1210
10µF, 6.3V, 1206
6.19k
162k
3.1V to 26V
8.85V
8V
3.1V to 15V or Open
2.2µF, 50V, 1206
22µF, 10V, 1206
10µF, 10V, 1206
4.12k
88.7k
3.1V to 21V
13V
12V
3.1V to 15V or Open
2.2µF, 25V, 0805
10µF, 16V, 1210
22µF, 16V, 1206
2.94k/22pF*
56.2k
9V to 15V
2.3V
1.2V
VIN
2.2µF, 50V, 1206
100µF, 6.3V, 1210
10µF, 6.3V, 1206
133k
Open
9V to 15V
2.3V
1.5V
VIN
2.2µF, 50V, 1206
100µF, 6.3V, 1210
10µF, 6.3V, 1206
133k
2.32M
9V to 15V
2.3V
1.8V
VIN
2.2µF, 50V, 1206
100µF, 6.3V, 1210
10µF, 6.3V, 1206
13.3k
1.07M
9V to 15V
3.08V
2.5V
VIN
2.2µF, 50V, 1206
100µF, 6.3V, 1210
10µF, 6.3V, 1206
10.5k
487k
9V to 15V
3.92V
3.3V
VIN
2.2µF, 50V, 1206
47µF, 6.3V, 1210
10µF, 6.3V, 1206
8.66k
294k
9V to 15V
5.7V
5V
VIN
2.2µF, 50V, 1206
22µF, 16V, 1210
10µF, 6.3V, 1206
6.19k
162k
9V to 15V
8.85V
8V
VIN
2.2µF, 50V, 1206
22µF, 10V, 1206
10µF, 10V, 1206
4.12k
88.7k
9V to 15V
13V
12V
VIN
2.2µF, 25V, 0805
10µF, 16V, 1210
22µF, 16V, 1206
2.94k/22pF*
56.2k
18V to 31V
2.3V
1.2V
3.1V to 15V or Open
2.2µF, 50V, 1206
100µF, 6.3V, 1210
10µF, 6.3V, 1206
133k
Open
18V to 31V
2.3V
1.5V
3.1V to 15V or Open
2.2µF, 50V, 1206
100µF, 6.3V, 1210
10µF, 6.3V, 1206
133k
2.32M
18V to 31V
2.3V
1.8V
3.1V to 15V or Open
2.2µF, 50V, 1206
100µF, 6.3V, 1210
10µF, 6.3V, 1206
13.3k
1.07M
18V to 31V
3.08V
2.5V
3.1V to 15V or Open
2.2µF, 50V, 1206
100µF, 6.3V, 1210
10µF, 6.3V, 1206
10.5k
487k
18V to 31V
3.92V
3.3V
3.1V to 15V or Open
2.2µF, 50V, 1206
47µF, 6.3V, 1210
10µF, 6.3V, 1206
8.66k
294k
18V to 29V
5.7V
5V
3.1V to 15V or Open
2.2µF, 50V, 1206
22µF, 16V, 1210
10µF, 6.3V, 1206
6.19k
162k
18V to 26V
8.85V
8V
3.1V to 15V or Open
2.2µF, 50V, 1206
22µF, 10V, 1206
10µF, 10V, 1206
4.12k
88.7k
Note: Do not allow BIAS to exceed VIN, a bulk input capacitor is required. If BIAS is open, the minimum VIN is 4.3V.
*Connect 2.94k in parallel with 22pF from ADJ1 to GND.
BIAS Pin Considerations
The BIAS pin is the output of an internal linear regulator
that powers the LTM8058’s internal circuitry. It is set to 3V
and must be decoupled with a low ESR capacitor of at least
4.7μF. The LTM8058 will run properly without applying
a voltage to this pin, but will operate more efficiently and
dissipate less power if a voltage between 3.1V and VIN is
applied. At low VIN, the LTM8058 will be able to deliver
more output current if BIAS is 3.1V or greater. Up to 31V
may be applied to this pin, but a high BIAS voltage will
cause excessive power dissipation in the internal circuitry.
For applications with an input voltage less than 15V, the
BIAS pin is typically connected directly to the VIN pin. For
input voltages greater than 15V, it is preferred to leave the
BIAS pin separate from the VIN pin, either powered from
a separate voltage source or left running from the internal
regulator. This has the added advantage of keeping the
physical size of the BIAS capacitor small. Do not allow
BIAS to rise above VIN.
Soft-Start
For many applications, it is necessary to minimize the
inrush current at start-up. The built-in soft-start circuit
significantly reduces the start-up current spike and output
voltage overshoot by applying a capacitor from SS to GND.
When the LTM8058 is enabled, whether from VIN reaching
a sufficiently high voltage or RUN being pulled high, the
LTM8058 will source approximately 10µA out of the SS
pin. As this current gradually charges the capacitor from
SS to GND, the LTM8058 will correspondingly increase
the power delivered to the output, allowing for a graceful
turn-on ramp.
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11
LTM8058
APPLICATIONS INFORMATION
The LTM8058 isolation is 100% hi-pot tested by tying
all of the primary pins together, all of the secondary pins
together and subjecting the two resultant circuits to a
differential of 3kV DC for one second. This establishes
the isolation voltage rating of the LTM8058 component.
The isolation rating of the LTM8058 is not the same as
the working or operational voltage that the application
will experience. This is subject to the application’s power
source, operating conditions, the industry where the end
product is used and other factors that dictate design requirements such as the gap between copper planes, traces
and component pins on the printed circuit board, as well
as the type of connector that may be used. To maximize
the allowable working voltage, the LTM8058 has two
columns of solder balls removed to facilitate the printed
circuit board design. The ball to ball pitch is 1.27mm, and
the typical ball diameter is 0.78mm. Accounting for the
missing columns and the ball diameter, the printed circuit
board may be designed for a metal-to-metal separation of
up to 3.03mm. This may have to be reduced somewhat to
allow for tolerances in solder mask or other printed circuit
board design rules. For those situations where information about the spacing of LTM8058 internal circuitry is
required, the minimum metal to metal separation of the
primary and secondary is 0.75mm.
To reiterate, the manufacturer’s isolation voltage rating
and the required working or operational voltage are often different numbers. In the case of the LTM8058, the
isolation voltage rating is established by 100% hi-pot
testing. The working or operational voltage is a function
of the end product and its system level specifications. The
actual required operational voltage is often smaller than
the manufacturer’s isolation rating.
The LTM8058 is a UL recognized component under
UL 60950, file number E464570. The UL 60950 insulation category of the LTM8058 transformer is Functional.
Considering UL 60950 Table 2N and the gap distances
stated above, 3.03mm external and 0.75mm internal,
the LTM8058 may be operated with up to 250V working
voltage in a pollution degree 2 environment. The actual
working voltage, insulation category, pollution degree and
other critical parameters for the specific end application
depend upon the actual environmental, application and
safety compliance requirements. It is therefore up to the
user to perform a safety and compliance review to ensure
that the LTM8058 is suitable for the intended application.
VOUT2 Post Regulator
VOUT2 is produced by a high performance low dropout
300mA regulator. At full load, its dropout is less than
430mV. Its output is set by applying a resistor from the
RADJ2 pin to GND; the value of RADJ2 can be calculated
by the equation:
R ADJ2 =
608.78
kΩ
VOUT2 – 1.22
ADJ1 and Line Regulation
For VOUT1 greater than 8V, parasitics in the transformer
interacting with the controller cause a localized increase in
minimum load. A small capacitor may need to be applied
from ADJ1 to GND to ensure proper line regulation. Care
must be taken when choosing this capacitor value. Too
small or no capacitor will result in poor line regulation;
in general, a larger capacitor is needed for higher VOUT1.
Too large of a capacitance will require excessive minimum
load to maintain regulation.
The plots in Figure 1 show LTM8058 line regulation with
three different capacitor values applied from ADJ1 to GND.
5
4
3
2
DEVIATION (%)
Isolation, Working Voltage and Safety Compliance
1
0
–1
–2
–3
NO CAP
8.2pF CAP
12pF CAP
–4
–5
0
6
12
VIN (V)
18
24
8058 F01
Figure 1. VOUT1 Line Regulation vs VIN
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LTM8058
APPLICATIONS INFORMATION
The plots in Figure 2 show the minimum load requirement
for the same three capacitors.
Carefully choose the appropriate capacitor value for the
intended application.
MINIMUM REQUIRED LOAD (mA)
25
BIAS = 5V FOR VIN ≥ 5V
BIAS = VIN FOR VIN < 5V
NO CAP
8.2pF CAP
12pF CAP
20
15
10
5
0
0
6
12
18
24
INPUT VOLTAGE (V)
8058 F02
Figure 2. Minimum Required Load vs Input Voltage
VOUT1 to VOUT– Reverse Voltage
The LTM8058 cannot tolerate a reverse voltage from VOUT1
to VOUT– during operation. If VOUT– raises above VOUT1
during operation, the LTM8058 may be damaged. To protect
against this condition, a low forward drop power Schottky
diode has been integrated into the LTM8058, anti-parallel
to VOUT1/VOUT–. This can protect the output against many
reverse voltage faults. Reverse voltage faults can be both
steady state and transient. An example of a steady-state
voltage reversal is accidentally misconnecting a powered
LTM8058 to a negative voltage source. An example of
transient voltage reversals is a momentary connection to
a negative voltage. It is also possible to achieve a VOUT1
reversal if the load is short circuited through a long cable.
The inductance of the long cable forms an LC tank circuit
with the VOUT1 capacitance, which drives VOUT1 negative.
Avoid these conditions.
VOUT2 Post Regulator Bypass Capacitance and Low
Noise Performance
The VOUT2 linear regulator may be used with the addition
of a 0.01μF bypass capacitor from VOUT to the BYP pin
to lower output voltage noise. A good quality low leakage
capacitor, such as a X5R or X7R ceramic, is recommended.
This capacitor will bypass the reference of the regulator,
lowering the output voltage noise to as low as 20µVRMS.
Using a bypass capacitor has the added benefit of improving transient response.
Safety Rated Capacitors
Some applications require safety rated capacitors, which
are high voltage capacitors that are specifically designed
and rated for AC operation and high voltage surges. These
capacitors are often certified to safety standards such as UL
60950, IEC 60950 and others. In the case of the LTM8058,
a common application of a safety rated capacitor would
be to connect it from GND to VOUT–. To provide maximum
flexibility, the LTM8058 does not include any components
between GND and VOUT–. Any safety capacitors must be
added externally.
The specific capacitor and circuit configuration for any
application depends upon the safety requirements of
the system into which the LTM8058 is being designed.
Table 2 provides a list of possible capacitors and their
manufacturers. The application of a capacitor from GND
to VOUT– may also reduce the high frequency output noise
on the output.
Table 2. Safety Rated Capacitors
MANUFACTURER PART NUMBER
DESCRIPTION
Murata
Electronics
GA343DR7GD472KW01L
4700pF, 250V AC, X7R,
4.5mm × 3.2mm
Capacitor
Johanson
Dielectrics
302R29W471KV3E-****-SC 470pF, 250V AC, X7R,
4.5mm × 2mm
Capacitor
Syfer Technology 1808JA250102JCTSP
100pF, 250V AC, C0G,
1808 Capacitor
PCB Layout
Most of the headaches associated with PCB layout have
been alleviated or even eliminated by the high level of
integration of the LTM8058. The LTM8058 is nevertheless a switching power supply, and care must be taken to
minimize electrical noise to ensure proper operation. Even
with the high level of integration, you may fail to achieve
specified operation with a haphazard or poor layout. See
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13
LTM8058
APPLICATIONS INFORMATION
Figure 3 for a suggested layout. Ensure that the grounding
and heat sinking are acceptable.
ADJ1
VOUT1
LTM8058
A few rules to keep in mind are:
1. Place the RADJ1 and RADJ2 resistors as close as possible
to their respective pins.
2. Place the CIN capacitor as close as possible to the VIN
and GND connections of the LTM8058.
3. Place the COUT1 capacitor as close as possible to VOUT1
and VOUT–. Likewise, place the COUT2 capacitor as close
as possible to VOUT2 and VOUT–.
4. Place the CIN and COUT capacitors such that their
ground current flow directly adjacent or underneath
the LTM8058.
5. Connect all of the GND connections to as large a copper
pour or plane area as possible on the top layer. Avoid
breaking the ground connection between the external
components and the LTM8058.
SS
COUT1
BIAS
CBIAS
VOUT–
RUN
ADJ2
BYP
COUT2
CIN
VOUT2
VIN
THERMAL/INTERCONNECT VIAS
8058 F03
Figure 3. Layout Showing Suggested External
Components, Planes and Thermal Vias
6. Use vias to connect the GND copper area to the board’s
internal ground planes. Liberally distribute these GND
vias to provide both a good ground connection and
thermal path to the internal planes of the printed circuit
board. Pay attention to the location and density of the
thermal vias in Figure 3. The LTM8058 can benefit from
the heat sinking afforded by vias that connect to internal
GND planes at these locations, due to their proximity
to internal power handling components. The optimum
number of thermal vias depends upon the printed
circuit board design. For example, a board might use
very small via holes. It should employ more thermal
vias than a board that uses larger holes.
twice the nominal input voltage, possibly exceeding the
LTM8058’s rating and damaging the part. If the input
supply is poorly controlled or the user will be plugging
the LTM8058 into an energized supply, the input network
should be designed to prevent this overshoot. This can be
accomplished by installing a small resistor in series to VIN,
but the most popular method of controlling input voltage
overshoot is adding an electrolytic bulk capacitor to the
VIN net. This capacitor’s relatively high equivalent series
resistance damps the circuit and eliminates the voltage
overshoot. The extra capacitor improves low frequency
ripple filtering and can slightly improve the efficiency of the
circuit, though it can be a large component in the circuit.
Hot-Plugging Safely
Thermal Considerations
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitor of the LTM8058. However, these capacitors can cause problems if the LTM8058 is plugged into a
live supply (see Linear Technology Application Note 88 for
a complete discussion). The low loss ceramic capacitor
combined with stray inductance in series with the power
source forms an underdamped tank circuit, and the voltage at the VIN pin of the LTM8058 can ring to more than
The LTM8058 output current may need to be derated if it
is required to operate in a high ambient temperature. The
amount of current derating is dependent upon the input
voltage, output power and ambient temperature. The
temperature rise curves given in the Typical Performance
Characteristics section can be used as a guide. These curves
were generated by the LTM8058 mounted to a 58cm2
4-layer FR4 printed circuit board. Boards of other sizes
and layer count can exhibit different thermal behavior, so
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14
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LTM8058
APPLICATIONS INFORMATION
it is incumbent upon the user to verify proper operation
over the intended system’s line, load and environmental
operating conditions.
For increased accuracy and fidelity to the actual application,
many designers use FEA to predict thermal performance.
To that end, the Pin Configuration section of the data sheet
typically gives four thermal coefficients:
θJA: Thermal resistance from junction to ambient
θJCbottom: Thermal resistance from junction to the bottom of the product case
θJCtop: Thermal resistance from junction to top of the
product case
θJCboard: Thermal resistance from junction to the printed
circuit board.
While the meaning of each of these coefficients may seem
to be intuitive, JEDEC has defined each to avoid confusion and inconsistency. These definitions are given in
JESD 51-12, and are quoted or paraphrased as follows:
θJA is the natural convection junction-to-ambient air
thermal resistance measured in a one cubic foot sealed
enclosure. This environment is sometimes referred to
as still air although natural convection causes the air to
move. This value is determined with the part mounted to a
JESD 51-9 defined test board, which does not reflect an
actual application or viable operating condition.
θJCbottom is the junction-to-board thermal resistance with
all of the component power dissipation flowing through the
bottom of the package. In the typical µModule converter,
the bulk of the heat flows out the bottom of the package,
but there is always heat flow out into the ambient environment. As a result, this thermal resistance value may
be useful for comparing packages but the test conditions
don’t generally match the user’s application.
θJCtop is determined with nearly all of the component power
dissipation flowing through the top of the package. As the
electrical connections of the typical µModule converter are
on the bottom of the package, it is rare for an application
to operate such that most of the heat flows from the junction to the top of the part. As in the case of θJCbottom, this
value may be useful for comparing packages but the test
conditions don’t generally match the user’s application.
θJCboard is the junction-to-board thermal resistance where
almost all of the heat flows through the bottom of the
µModule converter and into the board, and is really the
sum of the θJCbottom and the thermal resistance of the
bottom of the part through the solder joints and through a
portion of the board. The board temperature is measured
a specified distance from the package, using a two-sided,
two-layer board. This board is described in JESD 51-9.
Given these definitions, it should now be apparent that none
of these thermal coefficients reflects an actual physical
operating condition of a µModule converter. Thus, none
of them can be individually used to accurately predict the
thermal performance of the product. Likewise, it would
be inappropriate to attempt to use any one coefficient to
correlate to the junction temperature vs load graphs given
in the product’s data sheet. The only appropriate way to
use the coefficients is when running a detailed thermal
analysis, such as FEA, which considers all of the thermal
resistances simultaneously.
A graphical representation of these thermal resistances
is given in Figure 4.
The blue resistances are contained within the µModule
converter, and the green are outside.
The die temperature of the LTM8058 must be lower than
the maximum rating of 125°C, so care should be taken in
the layout of the circuit to ensure good heat sinking of the
LTM8058. The bulk of the heat flow out of the LTM8058
is through the bottom of the module and the BGA pads
into the printed circuit board. Consequently a poor printed
circuit board design can cause excessive heating, resulting in impaired performance or reliability. Please refer to
the PCB Layout section for printed circuit board design
suggestions.
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For more information www.linear.com/LTM8058
15
LTM8058
APPLICATIONS INFORMATION
JUNCTION-TO-AMBIENT RESISTANCE (JESD 51-9 DEFINED BOARD)
CASE (TOP)-TO-AMBIENT
RESISTANCE
JUNCTION-TO-CASE (TOP)
RESISTANCE
JUNCTION-TO-BOARD RESISTANCE
JUNCTION
AMBIENT
JUNCTION-TO-CASE
CASE (BOTTOM)-TO-BOARD
(BOTTOM) RESISTANCE
RESISTANCE
BOARD-TO-AMBIENT
RESISTANCE
8058 F04
µMODULE DEVICE
Figure 4
TYPICAL APPLICATIONS
3.3V Flyback Converter
VOUT2 Maximum Output Current vs VIN
300
VOUT1
•
(3.9V)
VOUT2
RUN
LOW
NOISE
LDO
•
2.2µF
ADJ2
BYP
–
VOUT
GND
VOUT2
3.3V
47µF
294k
10µF
BIAS
4.7µF
8.66k
OUTPUT CURRENT (mA)
VIN
VIN
9V TO 15V
SS
280
260
240
220
ADJ1
LTM8058
200
8058 TA02a
2kV AC ISOLATION
9
11
10
12
VIN (V)
14
13
15
8058 TA02b
12V Flyback Converter with Low Noise Bypass
VOUT2 Maximum Output Current vs VIN
260
VOUT1
•
RUN
(13V)
VOUT2
•
2.2µF
GND
LOW
NOISE
LDO
BYP
10µF
ADJ2
VOUT–
VOUT2
12V
0.01µF
10µF
56.2k
BIAS
4.7µF
2.49k
2.2pF
SS
220
OUTPUT CURRENT (mA)
VIN
VIN
5V TO 23V
180
140
100
ADJ1
LTM8058
8058 TA03a
2kV AC ISOLATION
60
5
10
15
20
25
VIN (V)
8058 TA03b
8058fb
16
For more information www.linear.com/LTM8058
LTM8058
TYPICAL APPLICATIONS
3.3V and 2.5V Flyback Converter
Total Maximum Output Current vs VIN
450
•
RUN
•
2.2µF
3.1V
VOUT1
3.3V
VOUT2
LOW
NOISE
LDO
ADJ2
BYP
VOUT–
GND
VOUT2
2.5V
100µF
487k
10µF
BIAS
4.7µF
10k
SS
400
OUTPUT CURRENT (mA)
VOUT1
VIN
VIN
3.1V TO 32V
350
300
250
200
150
ADJ1
LTM8058
8058 TA04a
2kV AC ISOLATION
100
8
0
16
24
32
VIN (V)
8058 TA04b
PACKAGE DESCRIPTION
Pin Assignment Table
(Arranged by Pin Number)
PIN FUNCTION PIN FUNCTION PIN FUNCTION PIN FUNCTION PIN FUNCTION PIN
B1
VOUT2
C1
D1
E1
GND
F1
A1
VOUT2
A2
ADJ2
B2
BYP
C2
D2
E2
GND
F2
A3
VOUT–
B3
VOUT–
C3
D3
E3
GND
F3
B4
VOUT–
C4
D4
E4
GND
F4
A4
VOUT–
–
B5
VOUT–
C5
D5
E5
GND
F5
A5
VOUT
B6
VOUT1
C6
D6
E6
GND
F6
A6
VOUT1
B7
VOUT1
C7
D7
E7
GND
F7
A7
VOUT1
FUNCTION
RUN
GND
GND
GND
GND
PIN
G1
G2
G3
G4
G5
G6
G7
FUNCTION PIN FUNCTION
VIN
H1
VIN
VIN
H2
VIN
H3
GND
H4
GND
GND
H5
BIAS
GND
H6
SS
ADJ1
H7
GND
PACKAGE PHOTO
8058fb
For more information www.linear.com/LTM8058
17
4
For more information www.linear.com/LTM8058
2.540
SUGGESTED PCB LAYOUT
TOP VIEW
1.270
PACKAGE TOP VIEW
0.3175
0.000
0.3175
PIN “A1”
CORNER
E
1.270
aaa Z
2.540
Y
4.445
3.175
1.905
0.635
0.000
0.635
1.905
3.175
4.445
D
X
4.7625
4.1275
aaa Z
SYMBOL
A
A1
A2
b
b1
D
E
e
F
G
H1
H2
aaa
bbb
ccc
ddd
eee
b1
DETAIL A
MAX
5.12
0.70
4.42
0.90
0.66
DIMENSIONS
NOM
4.92
0.60
4.32
0.75
0.63
11.25
9.0
1.27
8.89
7.62
0.32
4.00
BALL DIMENSION
PAD DIMENSION
BALL HT
NOTES
DETAIL B
PACKAGE SIDE VIEW
A2
A
SUBSTRATE THK
0.37
MOLD CAP HT
4.05
0.15
0.10
0.20
0.30
0.15
TOTAL NUMBER OF BALLS: 38
0.27
3.95
MIN
4.72
0.50
4.22
0.60
0.60
H1
SUBSTRATE
A1
ddd M Z X Y
eee M Z
DETAIL B
H2
MOLD
CAP
ccc Z
Øb (38 PLACES)
// bbb Z
(Reference LTC DWG # 05-08-1925 Rev B)
Z
18
Z
BGA Package
38-Lead (11.25mm × 9.00mm × 4.92mm)
F
e
7
5
4
3
2
PACKAGE BOTTOM VIEW
6
1
DETAIL A
H
G
F
E
D
C
B
A
PIN 1
DETAILS OF PIN #1 IDENTIFIER ARE OPTIONAL,
BUT MUST BE LOCATED WITHIN THE ZONE INDICATED.
THE PIN #1 IDENTIFIER MAY BE EITHER A MOLD OR
MARKED FEATURE
BALL DESIGNATION PER JESD MS-028 AND JEP95
TRAY PIN 1
BEVEL
COMPONENT
PIN “A1”
6
!
BGA 38 0517 REV B
PACKAGE IN TRAY LOADING ORIENTATION
LTMXXXXXX
µModule
PACKAGE ROW AND COLUMN LABELING MAY VARY
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
LAYOUT CAREFULLY
5. PRIMARY DATUM -Z- IS SEATING PLANE
4
3
2. ALL DIMENSIONS ARE IN MILLIMETERS
6
SEE NOTES
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994
b
3
SEE NOTES
G
LTM8058
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LTM8058#packaging for the most recent package drawings.
8058fb
3.810
3.810
LTM8058
REVISION HISTORY
REV
DATE
A
11/14
B
07/17
DESCRIPTION
PAGE NUMBER
Lowered Max Solder Temperature to 245°C (from 250°C)
2
Pin Label Corrected: Was VOUT+ to VOUT1
17
Connected RUN pin to VIN in Typical Application circuit example
16, 17, 20
8058fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection
of itsinformation
circuits as described
herein will not infringe on existing patent rights.
For more
www.linear.com/LTM8058
19
LTM8058
TYPICAL APPLICATION
Total Output Current vs VIN
5V Flyback Converter with Low Noise Bypass
450
VOUT1
•
RUN
(5.7V)
VOUT2
LOW
NOISE
LDO
•
2.2µF
BYP
22µF
ADJ2
GND
–
VOUT
VOUT2
5V
0.01µF
10µF
162k
BIAS
4.7µF
6.19k
SS
400
OUTPUT CURRENT (mA)
VIN
VIN
5V TO 23V
350
300
250
200
150
ADJ1
LTM8058
8058 TA05a
100
2kV AC ISOLATION
5
10
15
20
30
25
VIN (V)
8058 TA05b
DESIGN RESOURCES
SUBJECT
DESCRIPTION
µModule Design and Manufacturing Resources
Design:
•
Selector Guides
•
Demo Boards and Gerber Files
•
Free Simulation Tools
µModule Regulator Products Search
1. Sort table of products by parameters and download the result as a spread sheet.
Manufacturing:
•
Quick Start Guide/Demo Manual
•
PCB Design, Assembly and Manufacturing Guidelines
•
Package and Board Level Reliability
2. Search using the Quick Power Search parametric table.
TechClip Videos
Quick videos detailing how to bench test electrical and thermal performance of µModule products.
Digital Power System Management
Linear Technology’s family of digital power supply management ICs are highly integrated solutions that
offer essential functions, including power supply monitoring, supervision, margining and sequencing,
and feature EEPROM for storing user configurations and fault logging.
RELATED PARTS
Part Number
Description
Comments
LTM8057
LTM8058 without Low Noise Post Regulator
2.5V ≤ VOUT ≤ 12V, 5% VOUT Accuracy, UL60950 Recognized
LTM8046
Higher Output Power Than LTM8058, No Low 2.5W Output Power, 1.8V ≤ VOUT ≤12V, 5% VOUT Accuracy, UL60950 Recognized,
9mm x 15mm x 4.92mm BGA
Noise Post Regulator
LTM8048
Lower Isolation Voltage Than LTM8058
1.5W Ouput Power, 725V DC Isolation, 1.2V ≤ VOUT ≤ 12V
LTM8047
Lower Isolation Voltage Than LTM8058, No
Low Noise Post Regulator
1.5W Ouput Power, 725V DC Isolation, 2.5V ≤ VOUT ≤ 12V
LTM8045
Non-isolated SEPIC (Step-Up & Down) Up
to 700mA
2.8V ≤ VIN ≤ 18V, ±2.5V ≤ VOUT ≤ ±15V, Synchronizable, 6.25mm x 11.25mm x
4.92mm BGA
LTM4605
Non-isolated Buck-Boost Up to 5A
4.5V ≤ VIN ≤ 20V, 0.8 ≤ VOUT ≤ 16V, Synchronizable, 15mm x 15mm x 2.82mm BGA
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20
LT 0717 REV B • PRINTED IN USA
For more information www.linear.com/LTM8058
www.linear.com/LTM8058
© LINEAR TECHNOLOGY CORPORATION 2014
