LTM8071
60VIN, 5A Silent Switcher
µModule Regulator
FEATURES
DESCRIPTION
Complete Step-Down Switch Mode Power Supply
nn Low Noise Silent Switcher® Architecture
nn CISPR22 Class B Compliant
nn Wide Input Voltage Range: 3.6V to 60V
nn Wide Output Voltage Range: 0.97V to 15V
nn 5A Continuous Output Current at 24 , 3.3V
IN
OUT,
TA = 85°C
nn 7.25A Peak Current at 12V , 3.3V
IN
OUT
nn Parallelable for Increased Output Current
nn Selectable Switching Frequency: 200kHz to 2.2MHz
nn Programmable Soft-Start
nn 9mm × 11.25mm × 3.32mm RoHS Compliant BGA
Package
The LTM®8071 is a 60VIN, 5A (continuous) step-down
Silent Switcher µModule® (power module) regulator.
The Silent Switcher architecture minimizes EMI while
delivering high efficiency at frequencies up to 2.2MHz.
Included in the package are the switching controller,
power switches, inductor, and all support components.
Operating over an input voltage range of 3.6V to 60V,
the LTM8071 supports an output voltage range of 0.97V
to 15V and a switching frequency range of 200kHz to
2.2MHz, each set by a single resistor. Only the input and
output filter capacitors are needed to finish the design.
nn
nn
The LTM8071 is packaged in a compact over-molded
ball grid array (BGA) package suitable for automated
assembly by standard surface mount equipment. The
LTM8071 is available with SnPb (BGA) or RoHS compliant
terminal finish.
nn
All registered trademarks and trademarks are the property of their respective owners.
APPLICATIONS
Test and Measuement Equipment
Aviation
nn Distributed Supply Regulation
nn Industrial Supplies
nn Wall Transformer Regulation
TYPICAL APPLICATION
3.3VOUT from 4.5VIN to 60VIN Step-Down Converter
Efficiency, VOUT = 3.3V, BIAS = 5V
95
LTM8071
85
BIAS
AUX
RUN
1µF
VOUT
VOUT
3.3V
RT
56.2k
750kHz
GND
SYNC
FB
102k
100µF
EFFICIENCY (%)
VIN
VIN
4.5V TO 60V
75
65
8071 TA01a
12VIN
24VIN
36VIN
48VIN
55
PINS NOT USED IN THIS CIRCUIT: TR/SS, PG, SHARE
45
0
1
2
3
LOAD CURRENT (A)
4
5
8071 TA01b
Rev 0
Document Feedback
For more information www.analog.com
1
LTM8071
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Notes 1, 2, 4)
VIN, RUN Voltage.......................................................65V
PG Voltage.................................................................42V
AUX, VOUT, BIAS Voltage...........................................19V
FB, TR/SS Voltage.......................................................4V
SYNC Voltage...............................................................6V
Maximum Internal Temperature............................. 125°C
Storage Temperature.............................. –50°C to 125°C
Peak Reflow Solder Body Temperature.................. 250°C
TOP VIEW
GND RT RUN
A
SYNC
BANK 2
TR/SS
B
VIN
PG SHARE
C
FB
D
AUX
BIAS
E
BANK 1
F
GND
G
H
J
1
BANK 3
VOUT
3
5
2
4
K
6
7
8
BGA PACKAGE
80-LEAD (11.25mm × 9mm × 3.32mm)
TJMAX = 125°C, θJA = 18°C/W, θJCbottom = 3.4°C/W,
θJCtop = 8.4°C/W, θJB = 2.8°C/W, WEIGHT = 1.0g
θ VALUES DETERMINED PER JEDEC 51-9, 51-12
ORDER INFORMATION
PART MARKING*
PART NUMBER
LTM8071EY#PBF
LTM8071IY#PBF
LTM8071IY
TERMINAL FINISH
SAC305 (RoHS)
SnPb (63/37)
DEVICE
LTM8071
FINISH CODE
e1
PACKAGE
TYPE
MSL
RATING
BGA
3
TEMPERATURE RANGE (NOTE 3, 4)
–40°C to 125°C
e0
• Consult Marketing for parts specified with wider operating temperature • Recommended LGA and BGA PCB Assembly and Manufacturing
ranges. *Device temperature grade is indicated by a label on the
Procedures
shipping container. Pad or ball finish code is per IPC/JEDEC J-STD-609. • LGA and BGA Package and Tray Drawings
2
Rev 0
For more information www.analog.com
LTM8071
ELECTRICAL
CHARACTERISTICS
The
l denotes the specifications which apply over the specified operating
temperature range, otherwise specifications are at TJ = 25°C. VIN = 12V, RUN = 2V, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
Minimum Input Voltage
VIN Rising
Output DC Voltage
RFB Open
RFB = 17.2kΩ
Peak Output DC Current
VOUT = 3.3V, fSW = 1MHz
Quiescent Current Into VIN
RUN = 0V
BIAS = 0V, No Load, SYNC = 0V, Not Switching
3
300
µA
µA
Quiescent Current Into BIAS
BIAS = 5V, RUN = 0V
BIAS = 5V, No Load, SYNC = 0V, Not Switching
BIAS = 5V, VOUT = 3.3V, IOUT = 3.5A, fSW = 1MHz
1
275
25
µA
µA
mA
Line Regulation
5.5V < VIN < 36V, IOUT = 1A
0.5
%
Load Regulation
0.1A < IOUT < 3.5A
0.5
%
Output Voltage Ripple
IOUT = 3.5A
10
mV
Switching Frequency
RT = 232kΩ
RT = 41.2kΩ
RT = 15.8kΩ
200
1
2.2
kHz
MHz
MHz
RUN Threshold Voltage
Run Rising
3.6
955
TR/SS = 0V
TR/SS Pull-Down
PG Threshold Voltage at FB (Upper)
V
A
970
0.9
Run Leakage Current
TR/SS Current
UNITS
V
V
7.25
l
(Note 5)
MAX
0.97
15
Voltage at FB
Minimum BIAS Voltage
TYP
l
985
mV
3.2
V
1.06
V
1
µA
2
µA
TR/SS = 0.1V
200
Ω
FB Falling (Note 6)
1.05
V
PG Threshold Voltage at FB (Lower)
FB Rising (Note 6)
0.89
PG Leakage Current
PG = 42V
PG Sink Current
PG = 0.1V
V
1
150
µA
µA
SYNC Threshold Voltage
Synchronization
0.4
1.5
V
SYNC Voltage
To Enable Spread Spectrum
2.9
4.2
V
SYNC Current
SYNC = 0V
35
µA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Unless otherwise noted, the absolute minimum voltage is zero.
Note 3: The LTM8071E is guaranteed to meet performance specifications
from 0°C to 125°C internal. Specifications over the full –40°C to
125°C internal operating temperature range are assured by design,
characterization and correlation with statistical process controls. The
LTM8071I is guaranteed to meet specifications over the full –40°C to
125°C internal operating temperature range. Note that the maximum
internal temperature is determined by specific operating conditions in
conjunction with board layout, the rated package thermal resistance and
other environmental factors.
Note 4: The LTM8071 contains overtemperature protection that is
intended to protect the device during momentary overload conditions. The
internal temperature exceeds the maximum operating junction temperature
when the overtemperature protection is active. Continuous operation
above the specified maximum operating junction temperature may impair
device reliability.
Note 5. Below this specified voltage, internal circuitry will draw power
from VIN.
Note 6. PG transitions from low to high.
Rev 0
For more information www.analog.com
3
LTM8071
TYPICAL PERFORMANCE CHARACTERISTICS
95
75
65
12VIN
24VIN
36VIN
48VIN
55
45
0
1
2
3
LOAD CURRENT (A)
4
75
65
12VIN
24VIN
36VIN
48VIN
55
45
5
0
1
95
4
12VIN
24VIN
36VIN
48VIN
55
0
1
2
3
LOAD CURRENT (A)
4
95
75
65
45
5
12VIN
24VIN
36VIN
48VIN
85
90
12VIN
24VIN
36VIN
48VIN
0
1
2
3
LOAD CURRENT (A)
4
0
1
2
3
LOAD CURRENT (A)
4
Efficiency vs Load Current
VOUT = 3.3V, BIAS = 5V
12VIN
24VIN
36VIN
48VIN
0
1
2
3
LOAD CURRENT (A)
4
5
8071 G06
Efficiency vs Load Current
VOUT = 5V, BIAS = 5V
fSW = 2MHz
100
90
80
70
50
5
65
45
5
12VIN
24VIN
36VIN
48VIN
0
1
2
3
LOAD CURRENT (A)
4
80
70
12VIN
24VIN
36VIN
48VIN
60
5
8071 G08
8071 G07
4
4
75
Efficiency vs Load Current
VOUT = 5V, BIAS = 5V
60
5
2
3
LOAD CURRENT (A)
55
EFFICIENCY (%)
100
EFFICIENCY (%)
EFFICIENCY (%)
95
55
1
8071 G05
Efficiency vs Load Current
VOUT = 3.3V, BIAS = 5V
fSW = 2MHz
65
0
85
55
75
12VIN
24VIN
36VIN
48VIN
8071 G03
Efficiency vs Load Current
VOUT = 2.5V, BIAS = 5V
8071 G04
45
45
5
EFFICIENCY (%)
65
65
55
85
EFFICIENCY (%)
EFFICIENCY (%)
85
45
2
3
LOAD CURRENT (A)
75
8071 G02
Efficiency vs Load Current
VOUT = 1.8V, BIAS = 5V
75
Efficiency vs Load Current
VOUT = 1.5V, BIAS = 5V
85
8071 G01
95
95
85
EFFICIENCY (%)
EFFICIENCY (%)
85
Efficiency vs Load Current
VOUT = 1.2V, BIAS = 5V
EFFICIENCY (%)
95
Efficiency vs Load Current
VOUT = 0.97V, BIAS = 5V
TA = 25°C, unless otherwise noted.
50
0
1
2
3
LOAD CURRENT (A)
4
5
8071 G09
Rev 0
For more information www.analog.com
LTM8071
TYPICAL PERFORMANCE CHARACTERISTICS
100
80
70
12VIN
24VIN
36VIN
48VIN
60
50
100
90
EFFICIENCY (%)
EFFICIENCY (%)
90
Efficiency vs Load Current
VOUT = 12V, BIAS = 5V
0
1
2
3
LOAD CURRENT (A)
4
80
70
50
0
1
8071 G10
2
3
LOAD CURRENT (A)
4
50
5
85
85
85
12VIN
24VIN
36VIN
48VIN
45
0
1
2
3
LOAD CURRENT (A)
4
EFFICIENCY (%)
95
55
75
65
12VIN
24VIN
36VIN
48VIN
55
45
5
0
1
2
3
LOAD CURRENT (A)
4
50
45
1
2
3
LOAD CURRENT (A)
70
60
4
8071 G16
1
2
3
LOAD CURRENT (A)
50
4
5
1.2
INPUT CURRENT (A)
EFFICIENCY (%)
0
0
Input vs Load Current
VOUT = 0.97V
80
12VIN
24VIN
36VIN
48VIN
12VIN
24VIN
36VIN
48VIN
8071 G15
90
80
5
65
Efficiency vs Load Current
VOUT = –15V, BIAS Tied to
LTM8071 GND
90
4
75
8071 G14
Efficiency vs Load Current
VOUT = –12V, BIAS Tied to
LTM8071 GND
60
2
3
LOAD CURRENT (A)
55
5
8071 G13
70
1
Efficiency vs Load Current
VOUT = –8V, BIAS Tied to
LTM8071 GND
95
65
0
8071 G12
95
75
24VIN
36VIN
48VIN
60
Efficiency vs Load Current
VOUT = –5V, BIAS Tied to
LTM8071 GND
EFFICIENCY (%)
EFFICIENCY (%)
70
8071 G11
Efficiency vs Load Current
VOUT = –3.3V, BIAS Tied to
LTM8071 GND
EFFICIENCY (%)
80
24VIN
36VIN
48VIN
60
5
Efficiency vs Load Current
VOUT = 15V, BIAS 5V
90
EFFICIENCY (%)
100
Efficiency vs Load Current
VOUT = 8V, BIAS = 5V
TA = 25°C, unless otherwise noted.
12VIN
24VIN
36VIN
0
1
2
LOAD CURRENT (A)
3
8071 G17
12VIN
24VIN
36VIN
48VIN
0.9
0.6
0.3
0
0
2
4
6
LOAD CURRENT (A)
8
8071 G18
Rev 0
For more information www.analog.com
5
LTM8071
TYPICAL PERFORMANCE CHARACTERISTICS
1.5
0.3
0
2
4
6
LOAD CURRENT (A)
1.0
0.5
0
8
0
2
8071 G19
2.5
1.0
0.5
0
0
2
4
6
LOAD CURRENT (A)
1.0
0
Input vs Load Current
VOUT = 8V
3
3
2
0
2
4
6
LOAD CURRENT (A)
2
4
6
LOAD CURRENT (A)
8
8
12VIN
24VIN
36VIN
48VIN
2
1
0
2
4
6
LOAD CURRENT (A)
8
8071 G24
Input vs Load Current
VOUT = 12V
4
24VIN
36VIN
48VIN
2
1
0
0
2
4
LOAD CURRENT (A)
6
8071 G26
8071 G25
6
4
6
LOAD CURRENT (A)
Input vs Load Current
VOUT = 5V
3
0
8
1
0
2
8071 G23
INPUT CURRENT (A)
INPUT CURRENT (A)
4
1.5
8
12VIN
24VIN
36VIN
48VIN
0
8071 G21
0.5
4
0
0
8
12VIN
24VIN
36VIN
48VIN
8071 G22
5
0.5
Input vs Load Current
VOUT = 3.3V
2.0
INPUT CURRENT (A)
INPUT CURRENT (A)
2.0
1.5
12VIN
24VIN
36VIN
48VIN
8071 G20
Input vs Load Current
VOUT = 2.5V
12VIN
24VIN
36VIN
48VIN
4
6
LOAD CURRENT (A)
Input vs Load Current
VOUT = 1.8V
1.0
INPUT CURRENT (A)
0
12VIN
24VIN
36VIN
48VIN
INPUT CURRENT (A)
0.6
1.5
INPUT CURRENT (A)
12VIN
24VIN
36VIN
48VIN
0.9
INPUT CURRENT (A)
Input vs Load Current
VOUT = 1.5V
Input vs Load Current
VOUT = 1.2V
INPUT CURRENT (A)
1.2
TA = 25°C, unless otherwise noted.
Input vs Load Current
VOUT = 15V
24VIN
36VIN
48VIN
3
2
1
0
0
1
2
3
LOAD CURRENT (A)
4
5
8071 G27
Rev 0
For more information www.analog.com
LTM8071
TYPICAL PERFORMANCE CHARACTERISTICS
2.0
12VIN
24VIN
36VIN
48VIN
1.5
INPUT CURRENT (A)
INPUT CURRENT (A)
2.0
1.0
0.5
0
0
2
4
LOAD CURRENT (A)
Input vs Load Current
VOUT = –5V
BIAS Tied to LTM8071 GND
3
12VIN
24VIN
36VIN
48VIN
1.5
1.0
0.5
0
6
0
1
2
3
LOAD CURRENT (A)
4
Input vs Load Current
VOUT = –12V
BIAS Tied to LTM8071 GND
3
30
2.5
12VIN
24VIN
36VIN
1
1.5
0
1
2
LOAD CURRENT (A)
1.0
0
3
6
0
0.5
1
1.5
LOAD CURRENT (A)
15
10
Input Current vs VIN
VOUT Short-Circuited
0
2
4
6
LOAD CURRENT (A)
8
8071 G34
0.5
1
1.5
2
SWITCHING FREQUENCY (MHz)
6
4
3
2
0
0
15
30
VIN (V)
2.5
Maximum Load Current vs VIN
BIAS Tied to LTM8071 GND
1
0
0
8071 G33
MAXIMUM LOAD CURRENT (A)
INPUT CURRENT (mA)
DROPOUT VOLTAGE (mV)
200
0
2
5
400
4
IBIAS vs Switching Frequency
VBIAS = 5V, VIN = 24V, VOUT = 5V
8071 G32
Dropout Voltage vs Load Current
VOUT = 5V, BIAS = 5V
600
2
3
LOAD CURRENT (A)
5
8071 G31
800
1
20
0.5
0
0
25
BIAS CURRENT (mA)
2.0
INPUT CURRENT (A)
2
1
8071 G30
Input vs Load Current
VOUT = –15V
BIAS Tied to LTM8071 GND
12VIN
24VIN
36VIN
48VIN
2
0
5
12VIN
24VIN
36VIN
48VIN
8071 G29
8071 G28
INPUT CURRENT (A)
Input vs Load Current
VOUT = –8V
BIAS Tied to LTM8071 GND
INPUT CURRENT (A)
Input vs Load Current
VOUT = –3.3V
BIAS Tied to LTM8071 GND
TA = 25°C, unless otherwise noted.
45
60
8071 G35
4
2
0
–3.3VOUT
–5VOUT
–8VOUT
0
20
40
INPUT VOLTAGE (V)
60
8071 G36
Rev 0
For more information www.analog.com
7
LTM8071
TYPICAL PERFORMANCE CHARACTERISTICS
Maximum Load Current vs VIN
BIAS Tied to LTM8071 GND
Derating, VOUT = 0.97V,
BIAS = 5V, DC2387A Demo Board
1
20
40
INPUT VOLTAGE (V)
6
4
12VIN
24VIN
36VIN
48VIN
2
0
60
0
25
50
75
100
AMBIENT TEMPERATURE (°C)
Derating, VOUT = 1.5V,
BIAS = 5V, DC2387A Demo Board
8
8
12VIN
24VIN
36VIN
48VIN
4
12VIN
24VIN
36VIN
48VIN
2
0
125
0
25
50
75
100
AMBIENT TEMPERATURE (°C)
12VIN
24VIN
36VIN
48VIN
2
0
25
50
75
100
AMBIENT TEMPERATURE (°C)
Derating, VOUT = 8V,
BIAS = 5V, DC2387A Demo Board
8
4
12VIN
24VIN
36VIN
48VIN
125
0 LFM
MAXIMUM LOAD CURRENT (A)
6
6
4
12VIN
24VIN
36VIN
48VIN
2
0
125
8071 G42
0 LFM
MAXIMUM LOAD CURRENT (A)
MAXIMUM LOAD CURRENT (A)
4
0
125
8
25
50
75
100
AMBIENT TEMPERATURE (°C)
6
Derating, VOUT = 5V,
BIAS = 5V, DC2387A Demo Board
0 LFM
0
25
50
75
100
AMBIENT TEMPERATURE (°C)
125
8071 G44
8071 G43
8
Derating, VOUT = 2.5V,
BIAS = 5V, DC2387A Demo Board
8071 G41
8
125
0 LFM
6
Derating, VOUT = 3.3V,
BIAS = 5V, DC2387A Demo Board
0
25
50
75
100
AMBIENT TEMPERATURE (°C)
8
8071 G40
2
0
8071 G39
MAXIMUM LOAD CURRENT (A)
MAXIMUM LOAD CURRENT (A)
MAXIMUM LOAD CURRENT (A)
4
0
0
125
12VIN
24VIN
36VIN
48VIN
2
0 LFM
6
25
50
75
100
AMBIENT TEMPERATURE (°C)
4
Derating, VOUT = 1.8V,
BIAS = 5V, DC2387A Demo Board
0 LFM
0
6
8071 G38
8071 G37
2
0 LFM
MAXIMUM LOAD CURRENT (A)
MAXIMUM LOAD CURRENT (A)
MAXIMUM LOAD CURRENT (A)
2
0
8
0 LFM
–12VOUT
–15VOUT
0
Derating, VOUT = 1.2V,
BIAS = 5V, DC2387A Demo Board
8
3
0
TA = 25°C, unless otherwise noted.
6
4
12VIN
24VIN
36VIN
48VIN
2
0
0
25
50
75
100
AMBIENT TEMPERATURE (°C)
125
8071 G45
Rev 0
For more information www.analog.com
LTM8071
TYPICAL PERFORMANCE CHARACTERISTICS
6
Derating, VOUT = 12V,
BIAS = 5V, DC2387A Demo Board
5
Derating, VOUT = 15V,
BIAS = 5V, DC2387A Demo Board
24VIN
36VIN
48VIN
0
25
50
75
100
AMBIENT TEMPERATURE (°C)
4
3
2
1
0
125
24VIN
36VIN
48VIN
0
25
50
75
100
AMBIENT TEMPERATURE (°C)
25
50
75
100
AMBIENT TEMPERATURE (°C)
2
12VIN
24VIN
36VIN
48VIN
3
0 LFM
3
12VIN
24VIN
36VIN
48VIN
2
1
0
125
125
Derating, VOUT = –12V,
BIAS Tied to LTM8071 GND
DC2387A Demo Board
MAXIMUM LOAD CURRENT (A)
MAXIMUM LOAD CURRENT (A)
3
0
25
50
75
100
AMBIENT TEMPERATURE (°C)
8071 G49
2
1
0
125
12VIN
24VIN
36VIN
48VIN
0
25
50
75
100
AMBIENT TEMPERATURE (°C)
125
8071 G51
8071 G50
Derating, VOUT = –15V,
BIAS Tied to LTM8071 GND
DC2387A Demo Board
CISPR22 Class B Emissions
DC2387A Demo Board, No EMI Filter
(FB1 Short, C5, C6 Open)
2.0
55
5VOUT, 4.3A Load
0 LFM
45
1.5
AMPLITUDE (dBuV/m)
MAXIMUM LOAD CURRENT (A)
0
0 LFM
4
25
50
75
100
AMBIENT TEMPERATURE (°C)
12VIN
24VIN
36VIN
48VIN
8071 G48
4
0 LFM
MAXIMUM LOAD CURRENT (A)
0
Derating, VOUT = –8V,
BIAS Tied to LTM8071 GND
DC2387A Demo Board
5
0
2
8071 G47
Derating, VOUT = –5V,
BIAS Tied to LTM8071 GND
DC2387A Demo Board
1
4
125
8071 G46
0
0 LFM
MAXIMUM LOAD CURRENT (A)
4
0
6
Derating, VOUT = –3.3V,
BIAS Tied to LTM8071 GND
DC2387A Demo Board
0 LFM
MAXIMUM LOAD CURRENT (A)
MAXIMUM LOAD CURRENT (A)
0 LFM
2
TA = 25°C, unless otherwise noted.
12VIN
24VIN
36VIN
1.0
0.5
14VIN, fSW = 1.3MHz
Class
ClassBBLimit
Limit
35
25
15
5
0
0
25
50
75
100
AMBIENT TEMPERATURE (°C)
125
–5
0
8071 G52
200
400
600
FREQUENCY (MHz)
800
1000
8071 G53
Rev 0
For more information www.analog.com
9
LTM8071
PIN FUNCTIONS
GND (Bank 1, A1): Tie these GND pins to a local ground
plane below the LTM8071 and the circuit components.
In most applications, the bulk of the heat flow out of the
LTM8071 is through these pads, so the printed circuit
design has a large impact on the thermal performance of
the part. See the PCB Layout and Thermal Considerations
sections for more details.
VIN (Bank 2): VIN supplies current to the LTM8071’s
internal regulator and to the internal power switch. These
pins must be locally bypassed with an external, low ESR
capacitor; see Table 1 for recommended values.
VOUT (Bank 3): Power Output Pins. Apply the output
filter capacitor and the output load between these pins
and GND pins.
BIAS (Pin E1): The BIAS pin connects to the internal
power bus. Connect to a power source greater than 3.2V.
If VOUT is greater than 3.2V, connect this pin to AUX.
Decouple this pin with at least 1µF if the voltage source
for BIAS is remote.
PG (Pin C1): The PG pin is the open-collector output
of an internal comparator. PG remains low until the FB
pin voltage is between 0.89V and 1.05V typical. The PG
signal is valid when VIN is above 3.6V. If VIN is above
3.6V and RUN is low, PG will drive low. If this function
is not used, leave this pin floating.
SHARE (Pin C2): Tie this to the SHARE pin of another
LTM8071 to load share. Otherwise leave floating. Do not
drive this pin.
RT (Pin A2): The RT pin is used to program the switching
frequency of the LTM8071 by connecting a resistor from
this pin to ground. The Applications Information section
of the data sheet includes a table to determine the resistance value based on the desired switching frequency.
Minimize capacitance at this pin. Do not drive this pin.
FB (Pin D1): The LTM8071 regulates its FB pin to 0.97V.
Connect the adjust resistor from this pin to ground. The
value of RFB is given by the equation RFB = 241.5/(VOUT
– 0.97), where RFB is in kΩ.
10
AUX (Pin E2): Low Current Voltage Source for BIAS.
In many designs, the BIAS pin is simply connected to
VOUT. The AUX pin is internally connected to VOUT and
is placed adjacent to the BIAS pin to ease printed circuit board routing. Also, some applications require a
feed-forward capacitor; it can be connected from AUX
to FB for convenient PCB routing. Although this pin is
internally connected to VOUT, it is not intended to deliver
a high current, so do not draw current from this pin to
the load.
SYNC (Pin B1): External clock synchronization input
and operational mode. This pin programs four different
operating modes: 1) Burst Mode®. Tie this pin to ground
for Burst Mode operation at low output loads—this will
result in low quiescent current. 2) Pulse-skipping mode.
Float this pin for pulse-skipping mode. This mode offers
full frequency operation down to low output loads before
pulse-skipping mode occurs. 3) Spread spectrum mode.
Tie this pin high (between 2.9V and 4.2V) for pulseskipping mode with spread spectrum modulation. 4)
Synchronization mode. Drive this pin with a clock source
to synchronize to an external frequency. During synchronization the part will operate in pulse-skipping mode.
TR/SS (Pin B2): The TR/SS pin is used to provide a
soft-start or tracking function. The internal 2μA pull-up
current in combination with an external capacitor tied
to this pin creates a voltage ramp. The output voltage
tracks to this voltage. For tracking, tie a resistor divider
to this pin from the tracked output. This pin is pulled to
ground with an internal MOSFET during shutdown and
fault conditions; use a series resistor if driving from a
low impedance output. This pin may be left floating if the
tracking function is not needed. During start-up, if a relatively low capacitor is used on TR/SS, the output voltage
may take longer to reach regulation than expected. If
accurate start-up timing is required, please refer to the
LTM8071 simulation model in LTspice for help selecting
an appropriate soft-start capacitor.
RUN (Pin A3): Pull the RUN pin below 0.9V to shut down
the LTM8071. Tie to 1.06V or more for normal operation. If the shutdown feature is not used, tie this pin to
the VIN pin.
Rev 0
For more information www.analog.com
LTM8071
BLOCK DIAGRAM
VIN
VIN
BIAS
CIN
AUX
0.2µF
2.2µH
CURRENT
MODE
CONTROLLER
VOUT
249k
COUT
10nF
0.02µF
GND
FB
RUN
SHARE
TR/SS
SYNC
RT
PG
8071 BD
VIN
OPERATION
The LTM8071 is a standalone nonisolated step-down
switching DC/DC power supply that can deliver 7.25A at
3.3VOUT. The continuous current is determined by the
internal operating temperature. It provides a precisely
regulated output voltage programmable via one external resistor from 0.97V to 15V. The input voltage range
is 3.6V to 60V. Given that the LTM8071 is a step-down
converter, make sure that the input voltage is high enough
to support the desired output voltage and load current. A
simplified Block Diagram is given above.
The LTM8071 contains a current mode controller, power
switching elements, power inductor and a modest amount
of input and output capacitance. The LTM8071 is a fixed
frequency PWM regulator. The switching frequency is set
by simply connecting the appropriate resistor value from
the RT pin to GND.
An internal regulator provides power to the control circuitry. This bias regulator normally draws power from the
VIN pin, but if the BIAS pin is connected to an external
voltage higher than 3.2V, bias power is drawn from the
external source (typically the regulated output voltage).
This improves efficiency. The RUN pin is used to place
the LTM8071 in shutdown, disconnecting the output and
reducing the input current to a few μA.
If SYNC is less than about 0.4V, the LTM8071 automatically switches to enhanced efficiency Burst Mode operation in light or no load situations. Between bursts, all
circuitry associated with controlling the output switch is
shut down reducing the input supply current.
The oscillator reduces the LTM8071’s operating frequency
when the voltage at the FB pin is low. This frequency foldback helps to control the output current during start-up
and overload.
The TR/SS node acts as an auxiliary input to the error
amplifier. The voltage at FB servos to the TR/SS voltage
until TR/SS exceeds about 1.6V. Soft-start is implemented
by generating a voltage ramp at the TR/SS pin using an
external capacitor which is charged by an internal constant current. Alternatively, driving the TR/SS pin with
a signal source or resistive network provides a tracking
function. Do not drive the TR/SS pin with a low impedance
voltage source. See the Applications Information section
for more details.
The LTM8071 contains a power good comparator which
trips when the FB pin is between 0.89V and 1.05V, typical.
The PG output is an open-drain transistor that is off when
the output is in regulation, allowing an external resistor
to pull the PG pin high. The PG signal is valid when VIN
is above 3.6V. If VIN is above 3.6V and RUN is low, PG
will drive low.
The LTM8071 is equipped with a thermal shutdown that
inhibits power switching at high junction temperatures.
The activation threshold of this function is above 125°C to
avoid interfering with normal operation, so prolonged or
repetitive operation under a condition in which the thermal
shutdown activates may damage or impair the reliability
of the device.
For more information www.analog.com
Rev 0
11
LTM8071
APPLICATIONS INFORMATION
For most applications, the design process is straightforward, summarized as follows:
1. Look at Table 1 and find the row that has the desired
input range and output voltage.
2. Apply the recommended CIN, COUT, RFB and RT values.
3. Connect BIAS as indicated.
While these component combinations have been tested
for proper operation, it is incumbent upon the user to verify proper operation over the intended system’s line, load
and environmental conditions. Bear in mind that the maximum output current is limited by junction temperature, the
relationship between the input and output voltage magnitude and polarity and other factors. Please refer to the
graphs in the Typical Performance Characteristics section
for guidance.
The maximum frequency (and attendant RT value) at
which the LTM8071 should be allowed to switch is given
in Table 1 in the Maximum fSW column, while the recommended frequency (and RT value) for optimal efficiency
over the given input condition is given in the fSW column.
There are additional conditions that must be satisfied if
the synchronization function is used. Please refer to the
Synchronization section for details.
Table 1. Recommended Component Values and Configuration (TA = 25°C)
MAX VIN
VOUT
RFB
CIN2
BIAS
fSW
RT
MAX fSW
MINRT
3.6V to 60V
0.97
Open
1µF 100V 1206 X7R
2x 100µF 4V 0805 X5R
3.2V to 19V
400kHz
110k
500kHz
88.7k
3.6V to 60V
1.2
1.05M
1µF 100V 1206 X7R
2x 100µF 4V 0805 X5R
3.2V to 19V
400kHz
110k
550kHz
73.2k
3.6V to 60V
1.5
442k
1µF 100V 1206 X7R
100µF 4V 0805 X5R
3.2V to 19V
400kHz
110k
700kHz
60.4k
3.6V to 60V
1.8
287k
1µF 100V 1206 X7R
100µF 4V 0805 X5R
3.2V to 19V
400kHz
110k
850kHz
47.5k
3.6V to 60V
2.5
154k
1µF 100V 1206 X7R
2x 100µF 4V 0805 X5R
3.2V to 19V
500kHz
88.7k
1MHZ
41.2k
4.5V to 60V1
3.3
102k
1µF 100V 1206 X7R
100µF 4V 0805 X5R
3.2V to 19V
750kHz
56.2k
1.4MHz
28k
5
59k
1µF 100V 1206 X7R
100µF 6.3V 1206 X5R
3.2V to 19V
1MHz
41.2k
2.2MHz
15.8k
7V to 60V1
COUT
11V to 60V1
8
34k
1µF 100V 1210 X7R
3x 47µF 10V 1206 X5R
3.2V to 19V
1.2MHz
33.2k
2.2MHz
15.8k
16V to 60V1
12
21.5k
1µF 100V 1210 X7R
2x 47µF 16V 1210 X5R
3.2V to 19V
1.4MHz
28k
2.2MHz
15.8k
20V to 60V1
15
16.9k
1µF 100V 1210 X7R
2x 47µF 16V 1210 X5R
3.2V to 19V
1.8MHz
20.5k
2.2MHz
15.8k
3.6V to 56V
–3.3
102k
1µF 100V 1206 X7R
100µF 4V 0805 X5R
LTM8071 GND
750kHz
56.2k
1.4MHz
28k
3.6V to 55V
–5
59k
1µF 100V 1206 X7R
100µF 6.3V 1206 X5R
LTM8071 GND
1MHz
41.2k
2.2MHz
15.8k
3.6V to 52V
–8
34k
1µF 100V 1210 X7R
3x 47µF 10V 1206 X5R
LTM8071 GND
1.2MHz
33.2k
2.2MHz
15.8k
3.6V to 48V
–12
21.5k
1µF 100V 1210 X7R
2x 47µF 16V 1210 X5R
LTM8071 GND
1.4MHz
28k
2.2MHz
15.8k
3.6V to 45V
–15
16.9k
1µF 100V 1210 X7R
2x 47µF 16V 1210 X5R
LTM8071 GND
1.8MHz
20.5k
2.2MHz
15.8k
Note 1: The LTM8071 may be capable of operating lower input voltages but may skip off cycles.
Note 2: An input bulk capacitor is required.
12
Rev 0
For more information www.analog.com
LTM8071
APPLICATIONS INFORMATION
Capacitor Selection Considerations
Frequency Selection
The CIN and COUT capacitor values in Table 1 are the minimum recommended values for the associated operating
conditions. Applying capacitor values below those indicated in Table 1 is not recommended, and may result in
undesirable operation. Using larger values is generally
acceptable, and can yield improved dynamic response,
if it is necessary. Again, it is incumbent upon the user to
verify proper operation over the intended system’s line,
load and environmental conditions.
The LTM8071 uses a constant frequency PWM architecture that can be programmed to switch from 200kHz to
2.2MHz by using a resistor tied from the RT pin to ground.
Table 2 provides a list of RT resistor values and their resultant frequencies.
Table 2. SW Frequency vs RT Value
fSW (MHz)
RT (kΩ)
0.2
232
0.3
150
Ceramic capacitors are small, robust and have very low
ESR. However, not all ceramic capacitors are suitable. X5R
and X7R types are stable over temperature and applied
voltage and give dependable service. Other types, including Y5V and Z5U have very large temperature and voltage
coefficients of capacitance. In an application circuit they
may have only a small fraction of their nominal capacitance resulting in much higher output voltage ripple than
expected.
Ceramic capacitors are also piezoelectric. In Burst Mode
operation, the LTM8071’s switching frequency depends
on the load current, and can excite a ceramic capacitor
at audio frequencies, generating audible noise. Since the
LTM8071 operates at a lower current limit during Burst
Mode operation, the noise is typically very quiet to a
casual ear.
If this audible noise is unacceptable, use a high performance electrolytic capacitor at the output. It may also be
a parallel combination of a ceramic capacitor and a low
cost electrolytic capacitor.
A final precaution regarding ceramic capacitors concerns
the maximum input voltage rating of the LTM8071. A
ceramic input capacitor combined with trace or cable
inductance forms a high-Q (underdamped) tank circuit.
If the LTM8071 circuit is plugged into a live supply, the
input voltage can ring to twice its nominal value, possibly exceeding the device’s rating. This situation is easily
avoided; see the Hot-Plugging Safely section.
0.4
110
0.5
88.7
0.6
73.2
0.7
60.4
0.8
52.3
1.0
41.2
1.2
33.2
1.4
28.0
1.6
23.7
1.8
20.5
2.0
18.2
2.2
15.8
Operating Frequency Trade-Offs
It is recommended that the user apply the optimal RT
value given in Table 1 for the input and output operating
condition. System level or other considerations, however,
may necessitate another operating frequency. While the
LTM8071 is flexible enough to accommodate a wide range
of operating frequencies, a haphazardly chosen one may
result in undesirable operation under certain operating or fault conditions. A frequency that is too high can
reduce efficiency, generate excessive heat or even damage the LTM8071 if the output is overloaded or shortcircuited. A frequency that is too low can result in a final
design that has too much output ripple or too large of an
output capacitor.
Rev 0
For more information www.analog.com
13
LTM8071
APPLICATIONS INFORMATION
BIAS Pin Considerations
The BIAS pin is used to provide drive power for the internal power switching stage and operate other internal circuitry. For proper operation, it must be powered by at
least 3.2V. If the output voltage is programmed to 3.2V
or higher, BIAS may be simply tied to AUX. If VOUT is less
than 3.2V, BIAS can be tied to VIN or some other voltage
source. If the BIAS pin voltage is too high, the efficiency
of the LTM8071 may suffer. The optimum BIAS voltage is
dependent upon many factors, such as load current, input
voltage, output voltage and switching frequency. In all
cases, ensure that the maximum voltage at the BIAS pin
is less than 19V. If BIAS power is applied from a remote
or noisy voltage source, it may be necessary to apply a
decoupling capacitor locally to the pin. A 1µF ceramic
capacitor works well. The BIAS pin may also be left open
at the cost of a small degradation in efficiency.
If the LTM8071 is configured to provide a negative output,
do not connect BIAS to VOUT or AUX. Instead, tie to BIAS to
the LTM8071 GND, which should be the negative output.
Maximum Load
The maximum practical continuous load that the LTM8071
can drive, while rated at 5A, actually depends upon both
the internal current limit and the internal temperature.
The internal current limit is designed to prevent damage
to the LTM8071 in the case of overload or short-circuit.
The internal temperature of the LTM8071 depends upon
operating conditions such as the ambient temperature,
the power delivered, and the heat sinking capability of
the system. For example, if the LTM8071 is configured
to regulate at 1.2V, it may continuously deliver more than
7A from 12VIN if the ambient temperature is controlled
to less than 55°C; this is more than the 5A continuous
rating. Please see the Derating, VOUT = 1.2V curve in the
Typical Performance Characteristics section. Similarly, if
the output voltage is 15V and the ambient temperature
is 100°C, the LTM8071 will deliver at most 0.25A from
48VIN, which is less than the 5A continuous rating.
Load Sharing
Two or more LTM8071s may be paralleled to produce higher currents. To do this, tie the VIN, VOUT and
14
SHARE pins of all the paralleled LTM8071s together.
To ensure that paralleled modules start up together, the
TR/SS pins may be tied together, as well. If it is inconvenient
to tie the TR/SS pins together, make sure that the same
valued soft-start capacitors are used for each µModule
regulator. An example of two LTM8071s configured for
load sharing is given in the Typical Applications section.
For closer load sharing, synchronize the LTM8071s to an
external clock source. When load sharing among n units
and using a single RFB resistor, the value of the resistor is:
R FB =
241.5
n ( VOUT – 0.97 )
where RFB is in kΩ.
Burst Mode Operation
If SYNC is less than about 0.4V, the LTM8071 automatically switches to Burst Mode operation which keeps the
output capacitor charged to the proper voltage while minimizing the input quiescent current. During Burst Mode
operation, the LTM8071 delivers single cycle bursts of
current to the output capacitor followed by sleep periods
where most of the internal circuitry is powered off and
energy is delivered to the load by the output capacitor.
During the sleep time, VIN and BIAS quiescent currents
are greatly reduced, so, as the load current decreases
towards a no load condition, the percentage of time that
the LTM8071 operates in sleep mode increases and the
average input current is greatly reduced, resulting in
higher light load efficiency.
Minimum Input Voltage
The LTM8071 is a step-down converter, so a minimum
amount of headroom is required to keep the output in
regulation. Keep the input above 3.6V to ensure proper
operation. Voltage transients or ripple valleys that cause
the input to fall below 3.6V may turn off the LTM8071.
Output Voltage Tracking and Soft-Start
The LTM8071 allows the user to program its output voltage ramp rate by means of the TR/SS pin. An internal 2μA
pulls up the TR/SS pin to about 2.4V. Putting an external
capacitor on TR/SS enables soft starting the output to
Rev 0
For more information www.analog.com
LTM8071
APPLICATIONS INFORMATION
reduce current surges on the input supply. During the
soft-start ramp the output voltage will proportionally
track the TR/SS pin voltage. For output tracking applications, TR/SS can be externally driven by another voltage
source. From 0V to 1.6V, the TR/SS voltage will override
the internal 0.97V reference input to the error amplifier,
thus regulating the FB pin voltage to that of the TR/SS
pin. When TR/SS is above 1.6V, tracking is disabled and
the feedback voltage will regulate to the internal reference
voltage. The TR/SS pin may be left floating if the function
is not needed.
During start-up, if a relatively low capacitor is used on
TR/SS, the output voltage may take longer to reach
regulation than expected. If accurate start-up timing is
required, please refer to the LTM8071 simulation model
in LTspice for help selecting an appropriate soft-start
capacitor.
An active pull-down circuit is connected to the TR/SS pin
which will discharge the external soft-start capacitor in
the case of fault conditions and restart the ramp when the
faults are cleared. Fault conditions that clear the soft-start
capacitor are the RUN pin transitioning low, VIN voltage
falling too low, or thermal shutdown.
Prebiased Output
As discussed in the Output Voltage Tracking and Soft-Start
section, the LTM8071 regulates the output to the FB voltage determined by the TR/SS pin whenever TR/SS is less
than 1.6V. If the LTM8071 output is higher than the target
output voltage, the LTM8071 will attempt to regulate the
output to the target voltage by returning a small amount
of energy back to the input supply. If there is nothing loading the input supply, its voltage may rise. Take care that
it does not rise so high that the input voltage exceeds the
absolute maximum rating of the LTM8071.
Frequency Foldback
The LTM8071 is equipped with frequency foldback which
acts to reduce the thermal and energy stress on the internal power elements during a short-circuit or output overload condition. If the LTM8071 detects that the output
has fallen out of regulation, the switching frequency is
reduced as a function of how far the output is below the
target voltage. This in turn limits the amount of energy
that can be delivered to the load under fault. During the
start-up time, frequency foldback is also active to limit
the energy delivered to the potentially large output capacitance of the load. When a clock is applied to the SYNC
pin, the SYNC pin is floated or held high, the frequency
foldback is disabled and the switching frequency will slow
down only during overcurrent conditions.
Synchronization
To select low ripple Burst Mode operation, tie the SYNC
pin below about 0.4V (this can be ground or a logic low
output). To synchronize the LTM8071 oscillator to an
external frequency connect a square wave (with about
20% to 80% duty cycle) to the SYNC pin. The square
wave amplitude should have valleys that are below 0.4V
and peaks above 1.5V.
The LTM8071 will not enter Burst Mode operation at
low output loads while synchronized to an external
clock, but instead will pulse skip to maintain regulation.
The LTM8071 may be synchronized over a 200kHz to
2.2MHz range. The RT resistor should be chosen to set
the LTM8071 switching frequency equal to or below the
lowest synchronization input. For example, if the synchronization signal will be 500kHz and higher, the RT should
be selected for 500kHz.
For some applications it is desirable for the LTM8071 to
operate in pulse-skipping mode, offering two major differences from Burst Mode operation. The first is that the
clock stays awake at all times and all switching cycles
are aligned to the clock. Second is that full switching frequency is reached at lower output load than in Burst Mode
operation. These two differences come at the expense
of increased quiescent current. To enable pulse-skipping
mode, the SYNC pin is floated.
The LTM8071 features spread spectrum operation to further reduce EMI emissions. To enable spread spectrum
operation, apply between 2.9V and 4.2V to the SYNC pin.
In this mode, triangular frequency modulation is used
to vary the switching frequency between the value programmed by RT to about 20% higher than that value. The
modulation frequency is about 3kHz. For example, when
the LTM8071 is programmed to 1MHz, the frequency will
Rev 0
For more information www.analog.com
15
LTM8071
APPLICATIONS INFORMATION
vary from 1MHz to 1.2MHz at a 3kHz rate. When spread
spectrum operation is selected, Burst Mode operation is
disabled, and the part will run in pulse-skipping mode.
cause damage. Carefully evaluate whether the negative
buck configuration is suitable for the application.
VIN
The LTM8071 does not operate in forced continuous
mode regardless of SYNC signal.
VIN
Negative Output
LTM8071
The LTM8071 is capable of generating a negative output
voltage by connected its VOUT to system GND and the
LTM8071 GND to the negative voltage rail. An example
of this is shown in the Typical Applications section. The
most versatile way to generate a negative output is to
use a dedicated regulator that was designed to generate
a negative voltage, but using a buck regulator like the
LTM8071 to generate a negative voltage is a simple and
cost effective solution, as long as certain restrictions are
kept in mind.
Figure 1a shows a typical negative output voltage application. Note that LTM8071 VOUT is tied to system GND and
input power is applied from VIN to LTM8071 VOUT. As a
result, the LTM8071 is not behaving as a true buck regulator, and the maximum output current is depends upon
the input voltage. In the example shown in the Typical
Applications section, there is an attending graph that
shows how much current the LTM8071 deliver for given
input voltages.
GND
VIN
FAST LOAD
TRANSIENT
OUTPUT
TRANSIENT
RESPONSE
8071 F01b
Figure 1b. Any Output Voltage Transient Appears on
LTM8071 GND
The CIN and COUT capacitors in Figure 1c form an AC
divider at the negative output voltage node. If VIN is hotplugged or rises quickly, the resultant VOUT will be a positive transient, which may be unhealthy for the application
load. An antiparallel Schottky diode may be able to prevent
this positive transient from damaging the load. The location of this Schottky diode is important. For example, in
a system where the LTM8071 is far away from the load,
placing the Schottky diode closest to the most sensitive
load component may be the best design choice. Carefully
evaluate whether the negative buck configuration is suitable for the application.
FAST VIN
TRANSIENT
VIN
VIN
VIN
VOUT
LTM8071
CIN
OUTPUT EXPERIENCES
A POSITIVE TRANSIENT
VOUT
LTM8071
COUT
GND
GND
NEGATIVE
OUTPUT VOLTAGE
AC DIVIDER
8071 F01a
Figure 1a. The LTM8071 Can Be Used to Generate a
Negative Voltage
Note that this configuration requires that any load current
transient will directly impress the transient voltage onto
the LTM8071 GND, as shown in Figure 1b, so fast load
transients can disrupt the LTM8071’s operation or even
16
VOUT
OPTIONAL
SCHOTTKY
DIODE
8071 F01c
Figure 1c. A Schottky Diode Can Limit the Transient
Caused by a Fast Rising VIN to Safe Levels
If the LTM8071 is configured to provide a negative output,
do not connect BIAS to VOUT or AUX. Instead, tie to BIAS to
the LTM8071 GND, which should be the negative output.
Rev 0
For more information www.analog.com
LTM8071
APPLICATIONS INFORMATION
Shorted Input Protection
Care needs to be taken in systems where the output is
held high when the input to the LTM8071 is absent. This
may occur in battery charging applications or in battery
backup systems where a battery or some other supply is
diode OR-ed with the LTM8071’s output. If the VIN pin
is allowed to float and the RUN pin is held high (either
by a logic signal or because it is tied to VIN), then the
LTM8071’s internal circuitry pulls its quiescent current
through its internal power switch. This is fine if your
system can tolerate a few milliamps in this state. If you
ground the RUN pin, the internal current drops to essentially zero. However, if the VIN pin is grounded while the
output is held high, parasitic diodes inside the LTM8071
can pull large currents from the output through the VIN
pin. Figure 2 shows a circuit that runs only when the input
voltage is present and that protects against a shorted or
reversed input.
VIN
VIN
LTM8071
RUN
8071 F02
Figure 2. The Input Diode Prevents a Shorted Input from
Discharging a Backup Battery Tied to the Output. It Also Protects
the Circuit from a Reversed Input. The LTM8071 Runs Only
When the Input Is Present.
PCB Layout
Most of the headaches associated with PCB layout have
been alleviated or even eliminated by the high level of
integration of the LTM8071. The LTM8071 is nevertheless a switching power supply, and care must be taken to
minimize EMI and ensure proper operation. Even with the
high level of integration, you may fail to achieve specified
operation with a haphazard or poor layout. See Figure 3
for a suggested layout. Ensure that the grounding and
heat sinking are acceptable.
A few rules to keep in mind are:
1. Place RFB and RT as close as possible to their respective pins.
2. Place the CIN capacitor as close as possible to the VIN
and GND connection of the LTM8071.
3. Place the COUT capacitor as close as possible to the
VOUT and GND connection of the LTM8071.
4. Place the CIN and COUT capacitors such that their
ground current flow directly adjacent to or underneath
the LTM8071.
5. Connect all of the GND connections to as large a copper
pour or plane area as possible on the top layer. Avoid
breaking the ground connection between the external
components and the LTM8071.
6. Use vias to connect the GND copper area to the board’s
internal ground planes. Liberally distribute these GND
vias to provide both a good ground connection and
thermal path to the internal planes of the printed circuit board. Pay attention to the location and density of
the thermal vias in Figure 3. The LTM8071 can benefit
from the heat-sinking afforded by vias that connect
to internal GND planes at these locations, due to their
proximity to internal power handling components.
The optimum number of thermal vias depends upon
the printed circuit board design. For example, a board
might use very small via holes. It should employ more
thermal vias than a board that uses larger holes.
Rev 0
For more information www.analog.com
17
LTM8071
APPLICATIONS INFORMATION
COUT
GND
VOUT
overshoot. The extra capacitor improves low frequency
ripple filtering and can slightly improve the efficiency of
the circuit, though it is likely to be the largest component
in the circuit.
Thermal Considerations
CIN
VIN
RUN
RT
TR/SS SHARE
AUX
THERMAL/GND VIAS
BIAS
FB
PC
GND
SYNC
RT
RFB
GND
8071 F03
Figure 3. Layout Showing Suggested External Components, GND
Plane and Thermal Vias
Hot-Plugging Safely
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitor of LTM8071. However, these capacitors can cause problems if the LTM8071 is plugged into
a live supply (see Analog Devices’ Application Note 88
for a complete discussion). The low loss ceramic capacitor combined with stray inductance in series with the
power source forms an underdamped tank circuit, and
the voltage at the VIN pin of the LTM8071 can ring to
more than twice the nominal input voltage, possibly
exceeding the LTM8071’s rating and damaging the part.
If the input supply is poorly controlled or the LTM8071 is
hot-plugged into an energized supply, the input network
should be designed to prevent this overshoot. This can
be accomplished by installing a small resistor in series
to VIN, but the most popular method of controlling input
voltage overshoot is add an electrolytic bulk cap to the
VIN net. This capacitor’s relatively high equivalent series
resistance damps the circuit and eliminates the voltage
18
The LTM8071 output current may need to be derated if
it is required to operate in a high ambient temperature.
The amount of current derating is dependent upon the
input voltage, output power and ambient temperature.
The derating curves given in the Typical Performance
Characteristics section can be used as a guide. These
curves were generated by the LTM8071 mounted to a
58cm2 4-layer FR4 printed circuit board. Boards of other
sizes and layer count can exhibit different thermal behavior, so it is incumbent upon the user to verify proper operation over the intended system’s line, load and environmental operating conditions.
For increased accuracy and fidelity to the actual application, many designers use FEA (finite element analysis) to
predict thermal performance. To that end, Page 2 of the
data sheet typically gives four thermal coefficients:
JA – Thermal resistance from junction to ambient
JCbottom – Thermal resistance from junction to the bottom of the product case
JCtop – Thermal resistance from junction to top of the
product case
JB – Thermal resistance from junction to the printed circuit board.
While the meaning of each of these coefficients may seem
to be intuitive, JEDEC has defined each to avoid confusion
and inconsistency. These definitions are given in JESD
51-12, and are quoted or paraphrased below:
JA is the natural convection junction-to-ambient air thermal resistance measured in a one cubic foot sealed enclosure. This environment is sometimes referred to as still
air although natural convection causes the air to move.
Rev 0
For more information www.analog.com
LTM8071
APPLICATIONS INFORMATION
This value is determined with the part mounted to a JESD
51-9 defined test board, which does not reflect an actual
application or viable operating condition.
JCbottom is the junction-to-board thermal resistance with
all of the component power dissipation flowing through
the bottom of the package. In the typical µModule regulator, the bulk of the heat flows out the bottom of the package, but there is always heat flow out into the ambient
environment. As a result, this thermal resistance value
may be useful for comparing packages but the test conditions don’t generally match the user’s application.
JCtop is determined with nearly all of the component
power dissipation flowing through the top of the package. As the electrical connections of the typical µModule
regulator are on the bottom of the package, it is rare for
an application to operate such that most of the heat flows
from the junction to the top of the part. As in the case of
JCbottom, this value may be useful for comparing packages but the test conditions don’t generally match the
user’s application.
JB is the junction-to-board thermal resistance where
almost all of the heat flows through the bottom of the
µModule regulator and into the board, and is often just
the sum of the JCbottom and the thermal resistance of the
bottom of the part through the solder joints and through a
portion of the board. The board temperature is measured
a specified distance from the package, using a two sided,
two layer board. This board is described in JESD 51-9.
Given these definitions, it should now be apparent that
none of these thermal coefficients reflects an actual physical operating condition of a µModule regulator. Thus, none
of them can be individually used to accurately predict the
thermal performance of the product. Likewise, it would
be inappropriate to attempt to use any one coefficient to
correlate to the junction temperature vs load graphs given
in the product’s data sheet. The only appropriate way to
use the coefficients is when running a detailed thermal
analysis, such as FEA, which considers all of the thermal
resistances simultaneously.
A graphical representation of these thermal resistances
is given in Figure 4. The blue resistances are contained
within the µModule regulator, and the green are outside.
The die temperature of the LTM8071 must be lower than
the maximum rating of 125°C, so care should be taken
in the layout of the circuit to ensure good heat sinking
of the LTM8071. The bulk of the heat flow out of the
LTM8071 is through the bottom of the package and the
pads into the printed circuit board. Consequently a poor
printed circuit board design can cause excessive heating,
resulting in impaired performance or reliability. Please
refer to the PCB Layout section for printed circuit board
design suggestions.
JUNCTION-TO-AMBIENT RESISTANCE (JESD 51-9 DEFINED BOARD)
JUNCTION-TO-CASE (TOP)
RESISTANCE
JUNCTION
CASE (TOP)-TO-AMBIENT
RESISTANCE
JUNCTION-TO-BOARD RESISTANCE
JUNCTION-TO-CASE
CASE (BOTTOM)-TO-BOARD
(BOTTOM) RESISTANCE
RESISTANCE
AMBIENT
BOARD-TO-AMBIENT
RESISTANCE
8071 F04
µMODULE REGULATOR
Figure 4. Graphical Representation of the Thermal Resistances Between the Device Junction and Ambient
Rev 0
For more information www.analog.com
19
LTM8071
TYPICAL APPLICATIONS
15VOUT from 20VIN to 60VIN Step-Down Converter. BIAS Is Tied to AUX
LTM8071
VIN
VIN
20V TO 60V
BIAS
AUX
RUN
1µF
VOUT
15V
3.3A
VOUT
RT
20.5k
1.8MHz
47µF
2×
FB
GND
SYNC
16.9k
8071 TA02
PINS NOT USED IN THIS CIRCUIT: TR/SS, PG, SHARE
1.2VOUT from 3.6VIN to 60VIN Step-Down Converter. BIAS Is Tied to an External 3.3V Source
LTM8071
VIN
VIN
3.6V TO 60V
RUN
1µF
VOUT
100µF
×2
BIAS
EXT 3.3V
RT
GND
SYNC
FB
VOUT
1.2V
5.75A
1.05M
110k
400kHz
PINS NOT USED IN THIS CIRCUIT: TR/SS, PG, SHARE, AUX
8071 TA03
2.5VOUT from 4VIN to 15VIN Step-Down Converter. BIAS Is Tied to VIN
LTM8071
VIN
VIN
4V TO 15V
RUN
BIAS
VOUT
1µF
RT
88.7k
500kHz
GND
SYNC
FB
PINS NOT USED IN THIS CIRCUIT: TR/SS, PG, SHARE, AUX
20
154k
100µF
2×
VOUT
2.5V
5.5A
8071 TA04
Rev 0
For more information www.analog.com
LTM8071
TYPICAL APPLICATIONS
–5VOUT from 3.6VIN to 55VIN Positive to Negative Converter. BIAS Is Tied to LTM8071 GND
Maximum Load Current vs VIN,
BIAS Tied to LTM8071 GND
INPUT BULK CAP
+
VIN
3.6V TO 55V
VIN
6
MAXIMUM LOAD CURRENT (A)
LTM8071
RUN
41.2k
1MHz
OPTIONAL
SCHOTTKY
DIODE
VOUT
1µF
RT
FB
GND
SYNC BIAS
100µF
59k
VOUT
–5V
PINS NOT USED IN THIS CIRCUIT: TR/SS, PG, SHARE, AUX
4
2
8071 TA05a
0
3.4
20.6
37.8
INPUT VOLTAGE (V)
55
8071 TA05b
Two LTM8071s Powered from the Same Input Source to Deliver Up to 9A
VIN
VIN
7V TO 60V
LTM8071
BIAS
AUX
RUN
1µF
VOUT
5V
9A
VOUT
RT
41.2k
1MHz
100µF
FB
TR/SS
GND
SYNC SHARE
59k
OPTIONAL
SYNC
TR/SS
VIN
LTM8071
SHARE
BIAS
AUX
RUN
1µF
VOUT
RT
41.2k
1MHz
100µF
FB
GND
SYNC
59k
OPTIONAL
SYNC
PIN NOT USED IN THIS CIRCUIT: PG
8071 TA06
Rev 0
For more information www.analog.com
21
LTM8071
PACKAGE DESCRIPTION
Table 3. LTM8071 Pinout (Sorted by Pin Number)
PIN
NAME
PIN
NAME
PIN
NAME
PIN
A1
GND
A2
RT
A3
A4
NAME
PIN
NAME
B1
SYNC
B2
TR/SS
C1
PG
C2
SHARE
D1
FB
E1
BIAS
D2
GND
E2
AUX
RUN
B3
VIN
B4
GND
C3
VIN
C4
GND
D3
GND
E3
GND
VIN
D4
VIN
E4
GND
A5
VIN
B5
VIN
C5
VIN
D5
VIN
E5
GND
A6
A7
GND
B6
GND
B7
GND
C6
GND
D6
GND
E6
GND
GND
C7
GND
D7
GND
E7
GND
A8
GND
B8
GND
C8
GND
D8
GND
E8
GND
PIN
NAME
PIN
NAME
PIN
NAME
PIN
NAME
PIN
NAME
F1
GND
G1
GND
H1
GND
J1
VOUT
K1
VOUT
F2
GND
G2
GND
H2
GND
J2
VOUT
K2
VOUT
F3
GND
G3
GND
H3
GND
J3
VOUT
K3
VOUT
F4
GND
G4
GND
H4
GND
J4
VOUT
K4
VOUT
F5
GND
G5
GND
H5
GND
J5
VOUT
K5
VOUT
F6
GND
G6
GND
H6
GND
J6
VOUT
K6
VOUT
F7
GND
G7
GND
H7
GND
J7
VOUT
K7
VOUT
F8
GND
G8
GND
H8
GND
J8
VOUT
K8
VOUT
PACKAGE PHOTOS
22
Rev 0
For more information www.analog.com
0.50 ±0.025 Ø 80x
1.5
2.5
SUGGESTED PCB LAYOUT
TOP VIEW
0.000
aaa Z
2×
E
PACKAGE TOP VIEW
0.5
4
0.5
PIN “A1”
CORNER
1.5
Y
X
D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
more by
information
www.analog.com
subject to change without notice. No license For
is granted
implication or
otherwise under any patent or patent rights of Analog Devices.
4.5
3.5
2.5
1.5
0.5
0.5
1.5
2.5
3.5
4.5
2×
0.000
aaa Z
b1
NOM
3.32
0.50
2.82
0.60
0.50
11.25
9.00
1.00
9.00
7.00
0.32 REF
2.50 REF
MAX
3.52
0.60
2.92
0.70
0.53
DIMENSIONS
ddd M Z X Y
eee M Z
H1
SUBSTRATE
2.5
3.5
3.5
A
A2
SUBSTRATE THK
MOLD CAP HT
BALL DIMENSION
PAD DIMENSION
BALL HT
NOTES
DETAIL B
PACKAGE SIDE VIEW
0.15
0.10
0.20
0.25
0.10
TOTAL NUMBER OF BALLS: 80
MIN
3.12
0.40
2.72
0.50
0.47
DETAIL A
Øb (80 PLACES)
DETAIL B
H2
MOLD
CAP
ccc Z
A1
Z
(Reference LTC DWG # 05-08-1997 Rev B)
SYMBOL
A
A1
A2
b
b1
D
E
e
F
G
H1
H2
aaa
bbb
ccc
ddd
eee
// bbb Z
BGA Package
80-Lead (11.25mm × 9mm × 3.32mm)
e
b
7
5
G
4
e
3
2
1
DETAIL A
PACKAGE BOTTOM VIEW
6
K
J
H
G
F
E
D
C
B
A
3
SEE NOTES
PIN 1
DETAILS OF PIN #1 IDENTIFIER ARE OPTIONAL,
BUT MUST BE LOCATED WITHIN THE ZONE INDICATED.
THE PIN #1 IDENTIFIER MAY BE EITHER A MOLD OR
MARKED FEATURE
BALL DESIGNATION PER JEP95
TRAY PIN 1
BEVEL
COMPONENT
PIN “A1”
6
!
PACKAGE IN TRAY LOADING ORIENTATION
LTMXXXXXX
µModule
BGA 80 0418 REV B
PACKAGE ROW AND COLUMN LABELING MAY VARY
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
LAYOUT CAREFULLY
5. PRIMARY DATUM -Z- IS SEATING PLANE
4
3
2. ALL DIMENSIONS ARE IN MILLIMETERS
6
SEE NOTES
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994
F
b
8
LTM8071
PACKAGE DESCRIPTION
Rev 0
23
Z
LTM8071
TYPICAL APPLICATION
0.97VOUT from 3.6VIN to 60VIN Step-Down Converter with Spread Spectrum. BIAS Is Tied to an External 3.3V Source
LTM8071
VIN
VIN
3.6V TO 60V
RUN
FB
1µF
VOUT
EXT 3.3V
BIAS
SYNC
100µF
×2
GND
RT
VOUT
0.97V
6A
8071 TA07
110k
400kHz
PINS NOT USED IN THIS CIRCUIT:
TR/SS, PG, SHARE, AUX
DESIGN RESOURCES
SUBJECT
DESCRIPTION
µModule Design and Manufacturing Resources
Design:
• Selector Guides
• Demo Boards and Gerber Files
• Free Simulation Tools
µModule Regulator Products Search
1. Sort table of products by parameters and download the result as a spread sheet.
Manufacturing:
• Quick Start Guide
• PCB Design, Assembly and Manufacturing Guidelines
• Package and Board Level Reliability
2. Search using the Quick Power Search parametric table.
Digital Power System Management
Analog Devices’ family of digital power supply management ICs are highly integrated solutions that
offer essential functions, including power supply monitoring, supervision, margining and sequencing,
and feature EEPROM for storing user configurations and fault logging.
RELATED PARTS
PART
NUMBER
DESCRIPTION
COMMENTS
LTM8050
58V, 2A Step-Down µModule Regulator
3.6V ≤ VIN ≤ 58V, 0.8V ≤ VOUT ≤ 24V, 9mm × 15mm × 4.92mm BGA
LTM8073
60V, 3A Step-Down Silent Switcher µModule Regulator 3.4V ≤ VIN ≤ 60V, 0.8V ≤ VOUT ≤ 15V, 6.25mm × 9mm × 3.32mm BGA
LTM8064
58V, ±6A CVCC Step-Down µModule Regulator
6V ≤ VIN ≤ 58V, 1.2V ≤ VOUT ≤ 36V, 11.9mm × 16mm × 4.92mm BGA
LTM4651
EN55022B Compliant, 58VIN, 24W Inverting-Output
µModule Regulator
3.6V ≤ VIN ≤ 58V, –26.5V ≤ VOUT ≤ –0.5V, IOUT ≤ 4A, 15mm × 9mm × 5.01mm BGA
LTM4653
EN55022B Compliant, 58VIN, 4A, Step-Down µModule
Regulator
3.6V ≤ VIN ≤ 58V, –26.5V ≤ VOUT ≤ –0.5V, IOUT ≤ 4A, 15mm × 9mm × 5.01mm BGA
LTM8052
36V, ±5A CVCC Step-Down µModule Regulator
6V ≤ VIN ≤ 36V, 1.2V ≤ VOUT ≤ 24V, 11.25mm × 15mm × 2.82mm LGA,
11.25mm × 15mm × 3.42mm BGA
LTM8053
40V, 3.5A Step-Down Silent Switcher µModule
Regulator
3.4V ≤ VIN ≤ 40V, 0.97V ≤ VOUT ≤ 15V, 6.25mm × 9mm × 3.32mm BGA
LTM4613
EN55022B Compliant, 36V, 8A Step-Down µModule
Regulator
5V ≤ VIN ≤ 36V, 3.3V ≤ VOUT ≤ 15V, 15mm × 15mm × 4.32mm LGA,
15mm × 15mm × 4.92mm BGA
24
Rev 0
10/18
www.analog.com
For more information www.analog.com
ANALOG DEVICES, INC. 2018
工商网监
湘ICP备2023018690号
