EVALUATION KIT AVAILABLE
MAX14746/MAX14747
General Description
The MAX14746/MAX14747 are a series of USB charger
detectors with an integrated Smart Power Selector™ linear
charger solutions that provide a single-chip solution for
charging and charger detection.
The MAX14746/MAX14747 charger detectors are compliant
to USB Battery Charger Detection Rev 1.2* and capable
of detecting multiple USB battery-charging methods,
including Standard Downstream Ports (SDP), Charging
Downstream Ports (CDP), and Dedicated Charger Ports
(DCP). The devices also detect common proprietary
charge adapters, including those from Apple.
The MAX14746/MAX14747 battery chargers feature
Smart Power Selector operation, allowing operation with
dead or no battery present. The devices limit USB VBUS
current based on the detect charger source type. If the
charger power source is unable to supply the entire system
load, the smart-power control circuit supplements the
system load with current from the battery.
USB Detection with Smart Power
Selector Li+ Chargers
Benefits and Features
●● Flexible System Design to Operate with Any USB
Charger Source
• Compliant to USB Battery Charger Rev 1.2
Specification*
• Supports Proprietary USB Charging Sources,
Including Apple
• D+/D- Bias Voltage Supported
●● Easy to Implement Li+ Battery Charging
• Smart Power Selector
• Fully Compliant with Dead Battery/Weak Battery
Charging According to USB 2.0 Specification
• JEITA Charge Protection
• Thermal Protection
• Internal USB D+/D- Switch to Manage Connection
●● Integrates High Level of Protection
• 28V Tolerant Input on VB
• ±15kV Human Body Model ESD Protection on
CDP and CDN
The devices protect against overvoltage faults up to 28V.
This series of USB charger detectors are available with
several options, with slight variations in, for example,
power-up states. These variations are noted throughout
this data sheet.
There are five options available, with slight variations in,
for example, power-up states (see Ordering Information).
The devices are available in a 25-ball, 0.4mm pitch waferlevel package (WLP), and are specified over the -40°C to
+85°C extended temperature range.
Applications
●●
●●
●●
●●
Portable Consumer Devices
Portable Digital Cameras
Portable Digital Video Cameras
Portable Industrial Devices
*Except DCD timeout extended from 900ms to 2s for the
MAX14746/MAX14747.
Smart Power Selector™ is a trademark of Maxim Integrated
Products, Inc.
19-8036; Rev 2; 11/17
Ordering Information appears at end of data sheet.
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
Absolute Maximum Ratings
(All voltages referenced to GND.)
BAT, INT, THM, LED, UOK1, CTYP, IDEF, FSUS,
TDN, TDP, CDN, CDP, SYS, SCL, SDA...............-0.3V to +6V
UOK2/EXT................................................................VSYS + 0.3V
SFOUT, CAP............................-0.3V to min ((VVB + 0.3V), +6V)
VB...........................................................................-0.3V to +30V
NVP............................................................-0.3V to (VVB + 0.3V)
Continuous Current into VB, BAT, SYS..................................±3A
Continuous Current into any Other Terminal...................±100mA
Continuous Power Dissipation (TA = +70°C)
WLP (derate 19.2mW/NC above +70°C)................1536mW
Operating Temperature Range............................ -40°C to +85°C
Junction Temperature.......................................................+150°C
Storage Temperature Range............................. -65NC to +150°C
Reflow Temperature.........................................................+260°C
Package Thermal Characteristics (Note 1)
WLP
Junction-to-Ambient Thermal Resistance (θJA)...........52°C/W
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Electrical Characteristics
(VVB = 5.0V, VBAT = 4.2V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VBAT = 3.6V, VVB = 5.0V, VSYS = VSYS_REG,
TA = +25°C.) (Note 2)
PARAMETER
CONDITIONS
SYMBOL
MIN
TYP
MAX
UNITS
SUPPLY CHARACTERISTICS
VB Input Voltage Range
VVB
0
28
V
VBAT Input Voltage Range
VBAT
0
5.5
V
VB Detection Threshold
VVBDET
VB Overvoltage Threshold
VVBOV
VB Overvoltage Hysteresis
VVBOV_HYS
VB Valid Trip Point
VVB rising
3.8
3.9
4.1
VVB falling
3.0
3.1
3.2
VVB rising
7.2
7.5
7.8
200
VVB_TRIP
30
VB Valid Trip Point Hysteresis
VVB_TP_HYS
VB Charger-Detection-Active
Supply Current
IB_CDETON
VBAT = 0V, ISYS = 0mA
charger detection active, analog switch open
VB Charger-Detection-Idle
Supply Current
IB_CDCIDLE
VBAT = 0V, ISYS = 0mA
charger detection idle,
analog switch closed
VCCINT UVLO Threshold
VUVLO
VCCINT rising (Note 3)
VCCINT UVLO Hysteresis
VUVLO_HYS
BAT Overvoltage Threshold
VBATOV
BAT Overvoltage Hysteresis
VBATOV_HYS
BAT UVLO Threshold
VBAT_UVLO
BAT UVLO Hysteresis
VBAT_UVLOH
www.maximintegrated.com
145
(Note 3)
VBAT rising, VB not connected
2.2
290
5.15
2.5
mA
2
mA
2.6
V
mV
5.7
100
VBAT rising (Note 4)
1.9
2.05
50
mV
mV
50
4.8
V
mV
275
1.6
V
V
mV
2.2
V
mV
Maxim Integrated │ 2
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
Electrical Characteristics (continued)
(VVB = 5.0V, VBAT = 4.2V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VBAT = 3.6V, VVB = 5.0V, VSYS = VSYS_REG,
TA = +25°C.) (Note 3)
PARAMETER
BAT Supply Current With VB
BAT Supply Current No VB
CAP Regulator Voltage
SFOUT Regulator Voltage
SYMBOL
IBAT_NOCHG
IBAT_NOVB
VCAP
VSFOUT
TYP
MAX
UNITS
VBAT = 4.2V, VB connected,
charger disabled
CONDITIONS
MIN
4
8
µA
VBAT = 4.2V, VB not connected
6
11
µA
V
VVB = 5V
3.9
4.2
4.7
VVB = 6.0V, ISFOUT = 0mA
5.0
5.25
5.5
VVB = 5.0V, ISFOUT = 15mA
4.9
(Note 5)
17
V
SFOUT Overvoltage
Protection Voltage
VSFOUT_OVP
NVP Clamp Voltage
VNVP
Measured between VB and NVP,
VVB > 10V
NVP Resistance
RNVP
VVB < 5V
Thermal Shutdown Threshold
TSHDN_LIM
(Note 6)
150
°C
Current Reduce Thermal
Threshold
TCHG_LIM
(Note 7)
120
°C
V
5
7
10
V
120
200
300
Ω
THERMAL PROTECTION
VB-TO-SYS PATH
SYS Regulation Voltage
VSYS_REG
ISYS = 5mA
MAX14746
MAX14747
VB-to-SYS Voltage Drop
VVB_SYS
VB-to-SYS On-Resistance
RVB_SYS
Soft-Start Input Current Time
VVB = 4.4V, ISYS = 400mA
tSS_VB_SYS
www.maximintegrated.com
ILIMIT
VBAT_
REG +
0.2
VBAT_
REG +
0.26
V
4.8
40
160
mV
350
1
FSUS = 1
USB Input Current Limit
VBAT_
REG +
0.14
mΩ
ms
0
IDEF = 0, IBusLim = 1, IBusDetSw[1:0]
= 11, ILimSet[2:0] = 000
96.5
IDEF = 0, IBusLim = 1, IBusDetSw[1:0]
= 11, ILimSet[2:0] = 001
475
IDEF = 0, IBusLim = 1, IBusDetSw[1:0]
= 11, ILimSet[2:0] = 010
633
IDEF = 0, IBusLim = 1, IBusDetSw[1:0]
= 11, ILimSet[2:0] = 011
737
IDEF = 0, IBusLim = 1, IBusDetSw[1:0]
= 11, ILimSet[2:0] = 100
944
IDEF = 0, IBusLim = 1, IBusDetSw[1:0]
= 11, ILimSet[2:0] = 101
1048
IDEF = 0, IBusLim = 1, IBusDetSw[1:0]
= 11, ILimSet[2:0] = 110
1570
IDEF = 0, IBusLim = 1, IBusDetSw[1:0]
= 11, ILimSet[2:0] = 111
1885
500
mA
Maxim Integrated │ 3
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
Electrical Characteristics (continued)
(VVB = 5.0V, VBAT = 4.2V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VBAT = 3.6V, VVB = 5.0V, VSYS = VSYS_REG,
TA = +25°C.) (Note 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
VBAT = 5V, IBAT = 400mA
40
80
VBAT = 1.9V, IBAT = 100mA
83
UNITS
CHARGER PATH
BAT to SYS On-Resistance
BAT to SYS Switch-On
Threshold
BAT to SYS Switch-Off
Threshold
RBAT_SYS
VBAT_SYS_ON
VSYS falling
10
22
35
mV
VBAT_SYS_OFF
VSYS rising
-3
-1.5
0
mV
VBAT +
0.1
SysMin[2:0] = 000, VBAT > 3.6V
SysMin[2:0] = 000, VBAT < 3.4V
SYS Charger CurrentLimiting Threshold Voltage
mΩ
VSYS_LIM
SysMin[2:0] = 001, VBAT < 3.4V
3.6
3.7
SysMin[2:0] = 010, VBAT < 3.4V
3.8
SysMin[2:0] = 011, VBAT < 3.4V
SysMin[2:0] =100, VBAT < 3.4V
3.86
3.9
4
SysMin[2:0] =101, VBAT < 3.4V
4.1
SysMin[2:0] =110, VBAT < 3.4V
4.2
SysMin[2:0] =111, VBAT < 3.4V
4.3
1
Charger Current Soft-Start Time
4.14
ms
BATTERY CHARGER LEVELS
Precharge Current
IPCHG
IPChg[1:0] = 00
IPChg[1:0] = 01
IPChg[1:0] = 10
PChg[1:0] = 11
30
50
70
100
VPChg = 0, VPChgLow[1:0] = 00, VBAT rising
2.15
VPChg = 0, VPChgLow[1:0] = 01, VBAT rising
Prequalification Threshold
VBAT_PCHG
www.maximintegrated.com
VBAT_PCHG_HYS
2.25
VPChg = 0, VPChgLow[1:0] = 10, VBAT rising
2.35
VPChg = 0, VPChgLow[1:0] = 11, VBAT rising
2.45
VPChg = 1, VPChgHigh[1:0] = 00, VBAT rising
2.7
VPChg = 1, VPChgHigh[1:0] = 01, VBAT rising
Prequalification Threshold
Hysteresis
2.15
2.70
2.80
VPChg = 1, VPChgHigh[1:0] = 10, VBAT rising
2.9
VPChg = 1, VPChgHigh[1:0] = 11, VBAT rising
3
100
mA
2.35
V
2.90
mV
Maxim Integrated │ 4
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
Electrical Characteristics (continued)
(VVB = 5.0V, VBAT = 4.2V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VBAT = 3.6V, VVB = 5.0V, VSYS = VSYS_REG,
TA = +25°C.) (Note 3)
PARAMETER
SYMBOL
CONDITIONS
IFCHG
700
IFChg[2:0] = 001
300
BAT Regulation Voltage
www.maximintegrated.com
ICHG_DONE
VBAT_REG
180
200
IFChg[2:0] = 011
600
IFChg[2:0] = 100
800
IFChg[2:0] = 101
900
IFChg[2:0] = 110
350
IFChg[2:0] = 111
450
ChgDone[2:0] = 000
10
ChgDone[2:0] = 001
20
ChgDone[2:0] =
010
Charge Done Qualification
TYP
IFChg[2:0] = 000
IFChg[2:0] = 010
BAT Charge Current Set
Range
MIN
MAX
UNITS
220
mA
40
TA = 0°C to +60°C
30
50
ChgDone[2:0] = 011
50
ChgDone[2:0] = 100
60
ChgDone[2:0] = 101
80
ChgDone[2:0] = 110
100
ChgDone[2:0] = 111
120
BatRegSel = 0, BatRegLow[1:0] = “00”
4.05
BatRegSel = 0, BatRegLow[1:0] = “01”
4.1
BatRegSel = 0, BatRegLow[1:0] = “10”
4.15
mA
BatRegSel = 0, BatRegLow[1:0] = “11”,
TA=+25°C
4.179
4.2
4.221
BatRegSel = 0, BatRegLow[1:0] = “11”,
TA=-40°C to +85°C
4.158
4.2
4.242
BatRegSel = 1, BatRegHi[2:0] = “000”
4.25
BatRegSel = 1, BatRegHi[2:0] = “001”
4.3
BatRegSel = 1, BatRegHi[2:0] = “010”
4.35
BatRegSel = 1, BatRegHi[2:0] = “011”
4.4
BatRegSel = 1, BatRegHi[2:0] = “100”
4.45
BatRegSel = 1, BatRegHi[2:0] = “101”
4.5
BatRegSel = 1, BatRegHi[2:0] = “110”
4.55
BatRegSel = 1, BatRegHi[2:0] = “111”
4.6
V
Maxim Integrated │ 5
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
Electrical Characteristics (continued)
(VVB = 5.0V, VBAT = 4.2V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VBAT = 3.6V, VVB = 5.0V, VSYS = VSYS_REG,
TA = +25°C.) (Note 3)
PARAMETER
BAT Recharge Threshold
SYMBOL
VBAT_RECHG
CONDITIONS
MIN
TYP
BatReChg[1:0] = 00
50
BatReChg[1:0] = 01
100
BatReChg[1:0] = 10
150
BatReChg[1:0] = 11
200
PChgTmr[1:0] = 00
30
PChgTmr[1:0] = 01
60
PChgTmr[1:0] = 10
120
PChgTmr[1:0] = 11
240
FChgTmr[1:0] = 00
75
FChgTmr[1:0] = 01
150
FChgTmr[1:0] = 10
300
FChgTmr[1:0] = 11
600
MtChgTmr[1:0] = 00
30
MtChgTmr[1:0] = 01
15
MtChgTmr[1:0] = 10
0
MtChgTmr[1:0] = 11
60
MAX
UNITS
mV
BATTERY CHARGER TIMING
Maximum Prequalification
Time
Maximum Fast-Charge Time
Maintain-Charge Time
Charge-Timer Accuracy
tPCHG
tFCHG
tTOCHG
OSC
-10
Minutes
Minutes
Minutes
+10
%
Charge-Timer Extend
Threshold
IFC_HALF
Charge current reduced due to overcurrent
or overtemperature condition (Note 10)
50
%IFCHG
Charge-Timer Suspend
Threshold
IFC_FIFTH
Charge current reduced due to overcurrent
or overtemperature condition (Note 10)
20
%IFCHG
BatDetCntl = 0, VBAT > VBAT_UVLO
61
ms
BatDetCntl = 0, VBAT < VBAT_UVLO
1.031
s
BatDetCntl = 1
46
ms
BatDetCntl = 0
1.015
s
15
ms
BATTERY DETECTION
VVB Rising to Battery Detection Valid Delay
VBAT Falling to BatDet
Update Delay
VBAT Rising to BatDet
Update Delay
www.maximintegrated.com
tBUS_BATDET
tBATDET_F
tBATDET_R
BatDetCntl = 1
BatDetCntl = 0, VBAT > VBAT_UVLO
1.03
BatDetCntl = 0, VBAT < VBAT_UVLO
1.015
BatDetCntl = 1
15
s
ms
Maxim Integrated │ 6
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
Electrical Characteristics (continued)
(VVB = 5.0V, VBAT = 4.2V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VBAT = 3.6V, VVB = 5.0V, VSYS = VSYS_REG,
TA = +25°C.) (Note 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
JEITA BATTERY PACK MONITOR AND NTC DETECTION
THM Hot Threshold
T4
VTHM falling
THM Warm Threshold
T3
VTHM falling
THM Cool Threshold
T2
VTHM rising
THM Cold Threshold
T1
VTHM rising
THM Disable Threshold
THMDIS
VTHM rising
THM Threshold Hysteresis
THMHYS
THM Input Leakage Current
ILTHM
THM Detection Time
tTHM
MAX14746
23.8
MAX14747
%VCAP
19
MAX14746
33.7
MAX14747
%VCAP
30
MAX14746
63.3
MAX14747
%VCAP
66.75
MAX14746
72.3
MAX14747
%VCAP
77.2
96.6
%VCAP
60
mV
-1
+1
µA
ms
15
CHARGER STATUS OUTPUT (LED)
Output Logic-Low Voltage
VOLED
ISINK = 10mA
35
Temperature Suspend Mode
Blink Period
tTSUS
Blinking with 50% duty cycle
1.5
s
tTIMOUT
Blinking with 50% duty cycle
0.15
s
1
s
Timeout Mode Blink Period
Pulse Time for Fresh Battery
Insertion
100
mV
IMPEDANCE-MODE BATTERY DETECTION
Discharge Current
IDIS
VBAT = 3.6V
6
10
14
mA
Replace Current
IRPL
VBAT = 3.6V, VSYS > 4.0V
6
10
14
mA
Test Current Mismatch
IDR_MIS
Discharge Replace Time
tDIS_RPL
www.maximintegrated.com
-15
VBAT = 3.6V
+15
15
%
ms
Maxim Integrated │ 7
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
Electrical Characteristics (continued)
(VVB = 5.0V, VBAT = 4.2V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VBAT = 3.6V, VVB = 5.0V, VSYS = VSYS_REG,
TA = +25°C.) (Note 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
0.5
0.6
0.7
V
CHARGER DETECTION
VDP_SRC Voltage
VDP_SRC
VDAT_REF Voltage
VDAT_REF
0.25
0.3
0.35
V
VLGC
1.15
1.24
1.5
V
50
80
110
µA
VLGC Voltage
IDM_SINK Current
IDP_SRC Current
RDM_DWN
IWEAK Current
ILOAD = 0 to 200µA
IDM_SINK
VOUT = 0.15V to 3.6V
IDP_SRC
VOUT = 0V to 2.5V
5.5
8.4
10
µA
RDM_DWN
14.25
20
24.8
kΩ
IWEAK
0.01
0.1
0.3
µA
25% Resistor-Divider Ratio
R25
22.5
25
27.5
%
47% Resistor-Divider Ratio
R47
43.3
47
51.7
%
71% Resistor-Divider Ratio
R71
69.5
71.6
73.5
%
USB Charger Detect Time
tDPSRC_ON
40
60
ms
tMDEB
20
30
40
ms
tDCD_DEB
36
40
44
ms
VBUS Debounce Time
DCD Debounce
DCD Timeout
tDCD_TO
2000
ms
USB ANALOG SWITCH PERFORMANCE (TDN/TDP)
Analog-Signal Range
VTDN
VTDP
0
RONUSB
VBAT = 3.0V, ICDN, ICDP = 10mA,
VCDN,VCDP = 0 to 3.0V
On-Resistance Match Between
Channels
DRONUSB
VBAT = 3.0V, ICDN, ICDP = 10mA,
VCDN,VCDP = 400mV
On-Resistance Flatness
RFLATUSB
VBAT = 3.0V, ICDN, ICDP = 10mA,
VCDN,VCDP = 0 to 3V
Off-Leakage Current
ILUSB_OFF
Switch open, VTDN/VTDP = 0.3V/2.5V,
VCDP/VCDN = 2.5V/0.3V
On-Leakage Current
ILUSB_ON
Switch closed, VTDN/VTDP/VCDN/VCDP =
0.3V/2.5V
On-Resistance
VCCINT
3
V
6
Ω
0.5
Ω
1
Ω
-360
+360
nA
-360
+360
nA
0.3
Analog Switch Turn-On Time
tON
I2C stop to switch on, RL = 50Ω
0.5
1
ms
Analog Switch Turn-Off Time
tOFF
I2C stop to switch on, RL = 50Ω
0.1
1
ms
On-Capacitance
CON
VIN = 0.5VP-P DC = 0V, f = 240MHz
6
pF
Off-Capacitance
COFF
VIN = 0.5VP-P DC = 0V, f = 240MHz
3.5
pF
www.maximintegrated.com
Maxim Integrated │ 8
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
Electrical Characteristics (continued)
(VVB = 5.0V, VBAT = 4.2V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VBAT = 3.6V, VVB = 5.0V, VSYS = VSYS_REG,
TA = +25°C.) (Note 3)
PARAMETER
Off-Isolation
SYMBOL
VISO
CONDITIONS
MIN
RS = RL = 50Ω, f = 20kHz,
VIN = 0.5VP-P
TYP
MAX
-60
UNITS
dB
DIGITAL INPUTS/OUTPUTS (IDEF, CTYP, INT, UOK_, FSUS)
Input Logic High-Voltage
VIH
Input Logic Low-Voltage
VIL
Leakage Current
Open-Drain Output Logic-Low
ILEAK
1.4
CTYP, INT, UOK_ only
V
-250
VODOL
0.4
V
+250
nA
0.4
V
STARTUP TIMINGS
VB to SYS Rise
IBusLim = 0, FSUSMsK = 0, IDEF = 0
205
ms
VB to SFOUT Rise
SFoutAsrt = 0
205
ms
205
ms
5.5
ms
400
ms
400
kHz
VB to CTYP Falling Edge
CTYP to UOK1 Falling Edge
tSYS_UOK1_F
UOK1 to UOK2 Falling Edge
Delay
tUOK1_UOK2
If UOK2 option enabled
I2C TIMING SPECIFICATIONS (FIGURE 1)
I2C Maximum Clock Frequency
fSCL
Bus Free Time Between STOP
and START Conditions
tBUF
1.3
µs
START Condition Setup Time
tSU:STA
0.6
µs
Repeated Start Condition
Setup Time
tSU:STA
0.6
µs
START Condition Hold Time
tHD:STA
0.6
µs
STOP Condition Setup Time
tSU:STO
0.6
µs
Clock Low Period
tLOW
1.3
µs
Clock High Period
tHIGH
0.6
µs
Data Valid to SCL Rise Time
tSU:DAT
Write-setup time
100
ns
Data Hold Time to SCL Fall
tHD:DAT
Write-hold time
0
ns
SCL, SDA Spike Suppression
tSP
Duration of spike on SCL and SDA that is
not detected as a valid edge
50
Human Body Model
±15
IEC61000-4-2 Air Gap
±4
IEC61000-4-2 Contact
±5
Human Body Model
±2
ns
PROTECTION SPECIFICATIONS
ESD Protection, CDP/CDN
ESD Protection, All Other Pins
www.maximintegrated.com
kV
kV
Maxim Integrated │ 9
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
Electrical Characteristics (continued)
Note 2: All units are production tested at +25°C. Specifications over temperature are guaranteed by design.
Note 3: VCCINT = VCAP (if CAP is present) or VBAT (if CAP is not present).
Note 4: Threshold is valid when VVBDET < VVB < VVBOV. When VSYS < VBAT_UVLO, the BAT-SYS switch opens and BAT is connected to SYS through a diode.
Note 5: When VVB > VSFOUT_OVP, SFOUT LDO turns off.
Note 6: When the die temperature exceeds TSFOUT_TLIM, SFOUT regulator and SYS limiter turns off. VSYS is supplied by VBAT.
Note 7: When the die temperature exceeds TCHG_LIM, charger current starts to reduce.
Note 8: VSYS_LIM is the SYS voltage below which the charger starts to limit the charging current.
Note 9: When VSYS drops below VSYS_HLD, the battery charger does not move to the maintain charge state.
Note 10: The charge timer extend threshold is the charge current level below which the charge timer clock runs at half speed.
The charge timer suspend threshold is the charge current level below which the charge timer clock is paused.
Timing Diagram
START CONDITION
(S)
REPEATED START CONDITION
(Sr)
tR
STOP CONDITION
(P)
tF
SDA
tBUF
tHD:STA
tHD:DAT
tHD:STA
tSU:DAT
tSU:STO
tSU:STA
SCL
tHIGH
tR
tF
tLOW
START CONDITION
(S)
Figure 1. I2C Timing Diagram
www.maximintegrated.com
Maxim Integrated │ 10
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
Typical Operating Characteristics
(VBAT = 3.6V, VVB = 5V, TA = +25°C, unless otherwise noted.)
VB INPUT CURRENT vs. BUS VOLTAGE
VB INPUT CURRENT vs. BUS VOLTAGE
6
CHARGER ENABLED
NO BATTERY
4
3
2
0
4
8
12
16
20
24
400
4
3
2
VSYS vs. BUS VOLTAGE
8
12
16
20
24
2
28
toc04
toc05
1
4
6
8
40
20
4
800
1200
1600
0
2000
400
800
CAP VOLTAGE vs. BUS VOLTAGE
500
3
2
2000
toc08
3.5
300
200
CHARGE
CURRENT
1600
4
400
BATTERY
VOLTAGE
1200
ISYS (mA)
100
CAP VOLTAGE (V)
BATTERY VOLTAGE (V)
ILIM = 1500mA
0
400
4.5
1
ILIM = 500mA
SYS CURRENT (mA)
BATTERY CHARGER PROFILE
MAX14746
VBAT_REG = 4.2V
ILIM = 100mA
3
1
BUS VOLTAGE (V)
5
toc06
2
0
10
4.5
4
0
0
4
NO
BATTERY
60
VSYS (V)
BAT-SYS VOLTAGE (mV)
2
3.5
5
VVB = 0V
VBAT = 4.2V
2
3
BATTERY VOLTAGE (V)
BAT-SYS VOLTAGE vs. SYS CURRENT
80
3
0
2.5
BUS VOLTAGE (V)
ISYS = 100mA
NO BATTERY
VBAT_REG = 4.2V
4
200
0
4
BUS VOLTAGE (V)
5
300
100
0
28
toc03
IFChg[2:0] = 001
IPChg[1:0] = 11
0
0
CHARGE CURRENT vs.
BATTERY VOLTAGE
500
1
1
VSYS (V)
toc2
CHARGER DISABLED
NO BATTERY
5
VB INPUT CURRENT (mA)
5
VB INPUT CURRENT (mA)
toc1
CHARGE CURRENT (mA)
6
3
2.5
2
1.5
1
0.5
0
0
0
30
60
90
TIME (min)
120
150
0
0
2
4
6
8
10
BUS VOLTAGE (V)
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Maxim Integrated │ 11
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
Typical Operating Characteristics (continued)
(VBAT = 3.6V, VVB = 5V, TA = +25°C, unless otherwise noted.)
CHARGE CURRENT vs. TEMPERATURE
250
REGULATION VOLTAGE vs.
TEMPERATURE
toc9
4.21
150
100
PRECHARGE CHARGE
IPChg[2:0] = 01
50
BAT-SYS ON RESISTANCE (mΩ)
FAST CHARGE
IFChg[2:0] = 010
REGULATION VOLTAGE (V)
CHARGE CURRENT (mA)
200
4.205
4.2
4.195
0
NO LOAD
4.19
-40
-15
10
35
60
85
-40
10
35
60
85
toc11
80
60
40
20
0
1.8
TEMPERATURE (°C)
TEMPERATURE (°C)
DEDICATED CHARGER
CONNECT
-15
BAT-SYS ON RESISTANCE
vs. BAT VOLTAGE
100
toc10
2.2
2.6
3
3.4
3.8
4.2
BAT VOLTAGE (V)
toc12
MAX14746
VB
5V/div
SYS
5V/div
CDP
2V/div
CDN
2V/div
100ms/div
DEDICATED CHARGER
CONNECT
DEDICATED CHARGER
DISCONNECT
toc13
toc14
MAX14747
VB
5V/div
VB
5V/div
SYS
5V/div
SYS
5V/div
CDP
2V/div
CDP
2V/div
CDN
2V/div
CDN
2V/div
100ms/div
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200ms/div
Maxim Integrated │ 12
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
Typical Operating Characteristics (continued)
(VBAT = 3.6V, VVB = 5V, TA = +25°C, unless otherwise noted.)
USB CONNECT TIMING
VB DISCONNECT TIMING
toc15
MAX14746
toc17
toc16
SYS LOAD = 200mA
VB
2 x 4.7µF and 1 x 47µF ON SYS
VB
5V/div
VSYS
5V/div
5V/div
5V/div
EXT
3.6V
2V/div
VSYS
EXT
5V/div
3.6V
VBAT
5V/div
VB
5V/div
3.6V
VSYS
1V/div
500
mA/div
IVB
10ms/div
100µs/div
10ms/div
LIMITER TURN-ON
DELAY
LIMITER TURN-OFF
DELAY
toc18
toc19
nFsusEn from 1 to 0
ILimSet from 100mA to 500mA
VSDA
5V/div
VSDA
5V/div
IVB
0.5A/div
IVB
0.5A/div
IBAT
0.5A/div
IBAT
0.5A/div
100µs/div
SYS LOAD
TRANSIENT RISING
VSYS
100µs/div
SYS LOAD
TRANSIENT FALLING
toc20
5V/div
VSYS
toc21
5V/div
ISYS
0.5A/div
0.5A/div
ISYS
200µs/div
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200µs/div
Maxim Integrated │ 13
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
Bump Configuration
TOP VIEW
(BUMP SIDE DOWN)
MAX14746
MAX14747
1
2
3
4
5
A
IDEF
CTYP
BAT
SYS
VB
B
FSUS
CAP
BAT
SYS
VB
C
THM
SDA
UOK1
SFOUT
GND
D
UOK2/
EXT
SCL
NVP
LED
CDP
E
INT
TDP
TDN
GND
CDN
+
WLP
Bump Descriptions
BUMP
NAME
FUNCTION
A1
IDEF
Current-Limit Setting Input. IDEF has an internal 470kΩ pulldown resistor to GND. IDEF is only active
if FSUSMsk bit is set to 0 and FSUS is LOW
0 = Input current limit determined by I2C settings (IBusLim, ILimSet, IBusDetSw bits)
1 = Input current limit set to 100mA
A2
CTYP
Charger Type Output. CTYP is an open-drain output that asserts when DCP, CDP, or Apple 2A
adapter is detected.
A3, B3
BAT
Battery Connection. Connect a single-cell Li+ battery from BAT to GND. Connect a capacitor from BAT
to GND with a minimum value of 10µF and a maximum value of 30µF.
A4, B4
SYS
System Load Connection. Connect SYS to the system load. Bypass SYS with a 10µF low-ESR
ceramic capacitor to GND as close as possible to the device. Connect 50µF additional capacitance to
GND away from the device.
A5, B5
VB
USB VBUS Input. VB is the input for the overvoltage protector. VB is monitored to detect the presence
of a USB input power supply. Bypass VB with a 1µF ceramic capacitor to GND as close as possible to
the device.
B1
FSUS
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Force-Suspend Enable Input. FSUS is only active if the FSUSMsk bit is set to 0. FSUS has a 470kΩ
pulldown resistor to GND.
0 = Current limit determined by IDEF/I2C configuration
1 = Input current limit is forced to 0
Maxim Integrated │ 14
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
Bump Description (continued)
BUMP
NAME
B2
CAP
Internal LDO Bypass Connection. Connect a 1µF ceramic capacitor from CAP to GND as close as
possible to the device. Connect the pullup resistor for the battery thermistor output (THM) to CAP.
Ensure that the total load current out of CAP is less than 2mA.
C1
THM
Battery Temperature Thermistor Measurement Input
C2
SDA
I2C Serial Data Input/Output. Connect an external pullup resistor on SDA to the logic supply voltage.
C3
UOK1
C4
SFOUT
C5, E4
GND
D1
UOK2/EXT
D2
SCL
I2C Serial Clock Input. Connect an external pullup resistor on SCL to the logic supply voltage.
D3
NVP
Gate Bias and Protection for External PFET. NVP protects VB from negative voltages. Leave unconnected if not used.
D4
LED
Charging Fault Indicator. LED is an open-drain output that indicates a battery charging fault. When a
JEITA temperature fault is detected, LED is pulsed at 50% duty cycle with a period of 1.5s. When a
charge timer fault is detected, or the BAT overvoltage threshold (VBATOV) is exceeded, LED is pulsed
at 50% duty cycle with a period of 0.15s. Connect LED to GND if unused.
D5
CDP
USB Connector D+ Input
E1
INT
Interrupt Output. INT is an open-drain output that asserts whenever an unmasked interrupt occurs.
Connect an external pullup resistor on INT to the logic supply voltage.
E2
TDP
USB Transceiver D+ Connection. Connect TDP to device microprocessor USB transceiver D+ line.
E3
TDN
USB Transceiver D- Connection. Connect TDN to device microprocessor USB transceiver D- line.
E5
CDN
USB Connector D- Input
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FUNCTION
SYS Voltage Valid and Battery Detect Output. UOK1 is an open-drain output.
Protected LDO Output. SFOUT is powered from VB. Bypass SFOUT with a 1µF ceramic capacitor to
GND as close as possible to the device. SFOUT can power the on-board USB 2.0 Hi-Speed host.
Ground
UOK2: Delayed SYS Voltage Valid and Battery-Detect Output. UOK2 is an open-drain output.
EXT: Push-Pull Output Control for External SYS-BAT pMOS Switch. Output pulled high to BAT when
the charger is not present.
Maxim Integrated │ 15
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
Functional Diagram
BAT
SMART BATTERY
SWITCH CONTROL
THM
NVP
MAIN BATTERY
CHARGER/LDO
CAP
MANAGE
MOSFET
SYS
SFOUT
VB
5V LDO
TDN
CDN
TDP
CDP
SCL
USB CHARGER
DETECTION
SDA
INT
UOK1
UOK2/EXT
CONTROL
CIRCUITRY
VVBDET
CYTP
IDEF
FSUS
MAX14746
MAX14747
LED
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Maxim Integrated │ 16
MAX14746/MAX14747
Detailed Description
The MAX14746/MAX14747 charger detector solutions
integrate a smart-power selector with a linear charger
that allows charging a Li+ battery and a powering system
to load off the same USB power source. When the USB
power source is not present or cannot provide enough
power, the Li+ battery helps power the system. The
devices protect against voltage faults and transients on
VB up to 28V without interrupting operation.
The MAX14746/MAX14747 are compliant to USB Battery
Charger Detection Rev 1.2* as well, as special chargers
that bias the D+/D- lines. The devices limit VB input
current based on the type of charging device that is
detected and two digital inputs (IDEF and FSUS).
The devices monitor overcurrent and overtemperature
faults and automatically manages the charger. Configurable
interrupts and status information allow the system microcontroller
to intervene.
Negative Voltage Protection
The MAX14746/MAX14747 feature a gate protection
circuit for an external PFET that protects against negative
voltages on VBUS. The NVP output has a resistor to GND
and a voltage clamp for the gate of the PFET. The voltage
clamp limits the gate-to-source voltage to 7.0V (typ) when
the VBUS voltage is positive. If a negative voltage is present on VBUS, e.g., by a backwards connector, then the
PFET turns off and provides negative voltage protection.
This negative voltage protection requires that a device
downstream from the MAX14746/MAX14747 provide
reverse-current blocking on VBUS. This is required to
allow the PFET to turn off. When the drain of the PFET is
negative, current flows out of VB. If this reverse current
is limited to a small value, VVB drops and the PFET gateto-source voltage will drop below the threshold voltage.
Supply Voltage Selector
The MAX14746/MAX14747 select their power source
themselves by monitoring the voltages at VB and BAT. The
devices select VVB when it is present; otherwise, VBAT.
Smart Power Selector
The MAX14746/MAX14747 feature circuitry that seamlessly distributes power between the USB power supply
input on VB, the battery on BAT, and system load on SYS
when both an external charger adaptor and a battery are
connected.
USB Detection with Smart Power
Selector Li+ Chargers
When the system load requirements are less than the
input current limit, residual power from the input charges
the battery. When the system load requirements exceed
the input current limit, the battery supplies supplemental
current to the load. When the battery is connected and
there is no external power input, the battery powers the
system. When an external power input is connected and
the battery is discharged or not present, VB powers the
system.
USB Charger Detection
The MAX14746/MAX14747 charger detection circuitry
support full USB Battery Charger Rev 1.2* detection.
The devices detect all charger types, including standard
USB ports, charging downstream ports (CDPs), and
dedicated chargers. The devices also support Apple
power adaptors with resistor dividers on the D+/D- pins
at 500mA, 1000mA, and 2000mA current levels. See
Charger Detection Timing Diagram.
System Load Switch
The MAX14746/MAX14747 feature an internal MOSFET
that connect SYS to BAT for the battery to provide power
to the system load. If the USB supply is at the current
limit, the devices enable the switch to prevent the system
voltage from falling below the battery voltage by supplying
extra current from the battery. The battery is not charged
if the system load continuously exceeds the input current
limit, so this feature is useful for handling loads that are
nominally below the input current limit but have high-current
peaks exceeding the input current limit. The system uses
battery energy during these peaks, but VB charges the
battery at all other times.
External System Load Switch
The UOK2/EXT pin can be configured to function as a
control signal for an external system load switch.
When the EXT functionality is enabled, the UOK2/EXT
pin can drive the gate of an external PMOS connected
between SYS and BAT.
When a valid VB voltage is present, EXT is pulled up to
VSYS. When VB is disconnected and VSYS is equal to
VBAT, the EXT pin is driven to GND. This feature provides
an extremely low-impedance SYS-BAT connection.
*Except DCD timeout extended from 900ms to 2s for the MAX14746/
MAX14747.
www.maximintegrated.com
Maxim Integrated │ 17
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
Input-Current Limiter
Adaptive Battery Charging
The input-current limiter distributes power from the external
USB supply to the system load and battery charger. The
input current limiter consists of a MOSFET bulk management
to optimize the use of available power.
The battery charger draws power from SYS while VB
powers the system. The device reduces charge current
to prevent VSYS from falling if the total load exceeds the
input current limit.
Invalid VB Voltage Protection
JEITA Compliant Battery Protection/
Charging
The MAX14746/MAX14747 enter overvoltage lockout
(OVL) if VVB is above the overvoltage threshold. OVL
protects the device and downstream circuitry from highvoltage stress up to 28V. The internal circuit remains
powered, the charger turns off, the system load switch
closes, and an interrupt triggers during OVL. VVB is also
invalid if it is less than VBAT or less than the USB undervoltage
threshold. The device takes the same actions as OVL while
VVB is invalid.
VB Input Current Limit
The device limits VB input current to prevent input overload. Three methods can set the input current limit:
●● a) Set the current limit automatically based on the
capabilities of the source as indicated by the ChgTyp
[3.0] value read from I2C (register 0x02).
●● b) Set the current limit manually over I2C.
The MAX14746/MAX14747 monitor the temperature of
the battery for safe charging of Li+ batteries according to
JEITA standards. The devices measure the battery pack
temperature by using a resistor divider formed by a pullup
resistor connected to CAP and the battery pack thermistor. The external pullup allows matching to different
thermistor nominal values. The JEITA circuitry supports
thermistors with different β values, but the value must be
fixed to choose the CAP pullup resistor. Typical β values
are 4250 (MAX14747) and 3380 (MAX14746). The THM
input measures the voltage across the resistor divider.
There are five temperature zones of operation and the
charger termination voltage is controlled based on the
pack temperature. The charger is automatically controlled
and the active current temperture zone can be read from
the JEITAStat[3:0] bits over I2C (register 0x03).
●● c) Set the current limit manually using the IDEF and/
or FSUS inputs.
Thermal Limiting
If the local temperature exceeds 120°C (typ), the
MAX14746/MAX14747 attempt to limit temperature
increase by reducing the input current from VB. The system
load has priority over charger current, so the device lowers
the charge current to reduce overall input current. If the
temperature continues to rise and reaches 150°C (typ),
the device disconnects VB and the battery powers the
entire system load.
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Maxim Integrated │ 18
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
Chip_Id
Chip_Rev
StatusA
StatusB
StatusC
www.maximintegrated.com
IntA
IntB
IntMaskA
IntMaskB
CDetCntlA
ILimCntl
R/W
R/W
0x0D
0x0E
0x0F
0x10
0x11
0x12
0x13
ChgTmr
ChgVSet
RFU
ChgPCntl
CDetCntlB
ChgCntlC
ILimMon
RFU
ChgAutoStp
SFOutOrd
VPChg
ILimInt
SysBatVInt
RFU
UsbOVP
BIT5
RFU
BatUOKMsk
RFU
RFU
RFU
DCDTmrIntM
SFOutData
SFOutAsrt
IPChg[1:0]
RFU
** Register resets to default value on VB rising edge.
ChgEn
FSUSMsk
ThrmSdIntM
RFU
ThrmSdInt
RFU
RFU
SysBatV
BIT4
RFU
RFU
BatRegSel
RFU
ILimMon[7:0]
ChgTypMan
JeitaHighTInt
ChgTRegInt
DCDTmr
JeitaStat[2:0]
ChgStat[2:0]
BIT1
RFU
RFU
ChgAutoStart BatDetChgEn
SysMin[2:0]
RFU
RFU
UsbCompl
BatDetChgM
RFU
PChgTmr[1:0]
BatRegHi[2:0]
VPChgHigh[1:0]
RFU
RFU
JeitaTSdIntM
ChgTmoIntM
JeitaTSdInt
ChgTmoInt
ChgTmo
BIT0
IBusDetSw[2:0]
ChgDone[2:0]
RFU
DCDEn
JeitaStatIntM JeitaHighTIntM
ChgStatIntM ChgTRegIntM
JeitaStatInt
ChgStatInt
ChgTReg
BIT2
FChgTmr[1:0]
RFU
IFChg[2:0]
ILimSet[2:0]
RFU
UsbOkIntM
BatDetIntM
UsbOkInt
BatDetInt
ThrmSd
UsbOk
BatDet
Chip_Rev[7:0]
Chip_Id[7:0]
BIT3
VPChgLow[1:0]
RFU
AnSwCntl[1:0]
RFU
BatRegLow[1:0]
MtChgTmr[1:0]
BatDetCntl
RFU
RFU
nFsusEn
ILimIntM
UsbOVPIntM SysBatVIntM
DCDTmrInt
UsbOVPInt
RFU
ILim
ChgTyp[3:0]
BIT6
BatReChg[1:0]
RFU
JeitaEn
RFU
IBusLim
RFU
VLimIntM
ChgTypIntM
VLimInt
ChgTypInt
RFU
VLim
BIT7
RFU = Reserved for future use. Do not change from default value.
R
R/W
R/W
R/W
R/W
R/W
ChgCntlB
R/W
0x0B
0x0C
ChgCntlA
R/W
R/W
R/W
R/W
CoR
CoR
R
R
R
R
R
ADDR TYPE
REGISTER
Register Map and Descriptions
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
Maxim Integrated │ 19
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
Chip ID Register
ADDRESS:
0x00
MODE:
Read Only
BIT
7
6
5
4
NAME
2
1
0
1
0
Chip_Id[7:0]
RESET
Chip_Id[7:0]
3
SEE TABLE 4
The Chip_Id[7:0] bits show information about the version of the MAX14746/MAX14747.
Chip Revision Register
ADDRESS:
0x01
MODE:
Read Only
BIT
7
6
5
4
3
NAME
Chip_Rev[7:0]
RESET
SEE TABLE 4
Chip_Rev[7:0]
2
The Chip_Rev[7:0] bits show information about the revision of the MAX14746/MAX14747 silicon.
www.maximintegrated.com
Maxim Integrated │ 20
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
Status A Register
ADDRESS:
0x02
MODE:
Read Only
BIT
7
NAME
6
5
ChgTyp[3:0]
4
3
BatDet
2
1
0
ChgStat[2:0]
RESET
SEE TABLE 4
ChgTyp[3:0]
ChgTyp[3:0] identifies what kind of charger is detected on the USB connector.
0000 = Nothing attached.
0001 = SDP. In automatic mode, the current limit is set to 500mA (Or 100mA if UsbCompl = 0).
0010 = CDP. In automatic mode, the current limit is set to 1.5A.
0011 = DCP. In automatic mode, the current limit is set to 1.5A.
0100 = Apple 500mA charger. In automatic mode, the current limit is set to 500mA
0101 = Apple 1A charger. In automatic mode, the current limit is set to 500mA.
0110 = Apple 2A charger. In automatic mode, the current limit is set to 1.5A.
0111 = Non-standard charger (D+/D- > 0.715 x VVB, possibly indicating a PS2 adapter). In automatic mode, the
current limit is set to 0mA.
1010 = Other charger (D+/D- = 0.46 x VVB to 0.715 x VVB). In automatic mode, the current limit is set to 500mA.
Other = Reserved
BatDet
ChgStat[2:0]
BatDet indicates the status of the battery detection when VB is present.
0 = No battery detected.
1 = Battery detected.
ChgStat[2:0] indicates the current status of the battery charger.
000 = Charger off.
001 = Charging suspended due to overtemperature.
010 = Precharge in progress.
011 = Fast charge in progress using constant-current mode.
100 = Fast charge in progress using constant-voltage mode.
101 = Maintain charge in progress.
110 = Maintain charge timer done.
111 = Charger fault condition.
*POR value depends on external conditions.
www.maximintegrated.com
Maxim Integrated │ 21
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
Status B Register
ADDRESS:
0x03
MODE:
Read Only
BIT
7
6
5
4
3
NAME
VLim
ILim
UsbOVP
SysBatV
UsbOk
RESET
2
1
0
JeitaStat[2:0]
SEE TABLE 4
RFU
Reserved for future use.
VLim
VLim indicates when the input limiter is in drop-out.
0 = VB input voltage under limit
1 = VB input voltage limited
ILim
ILim indicates when the VB input current reaches the limit.
0 = VB input current under limit.
1 = VB input current limited.
UsbOVP
VB Overvoltage Protection Status
0 = VB OVP is not active
1 = VB OVP is active
SysBatV
SYS-BAT Voltage Minimum. While the system is powered from VBUS, the charger draws power from SYS to
charge the battery. If the total load exceeds the input current limit, an adaptive charger control loop reduces
charge current to prevent VSYS from collapsing. The regulation of the charge current is done looking for the first
valid condition between the following two:
a) VSYS - VBAT = 100mV (typ)
b) VSYS = VSYS_LIM falling
0 = Charge current is actively reduced
1 = Charge current is NOT actively reduced
UsbOk
JeitaStat[2:0]
UsbOk indicates when the VB voltage is present and valid.
0 = VB not present or outside of valid range.
1 = VB present and valid.
JeitaStat[2:0] indicates what temperature the JEITA battery monitor is currently detecting.
000 = T < 0°C or T > 60°C.
001 = 0°C < T < 10°C.
010 = 10°C < T < 45°C.
011 = 45°C < T < 60°C.
100 = No thermistor detected (THM high due to external pullup).
101 = NTC input disabled by JeitaEn.
110 = Detection disabled due to VB not present.
111 = Reserved.
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Maxim Integrated │ 22
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
Status C Register
ADDRESS:
0x04
MODE:
Read Only
BIT
7
6
5
4
3
2
1
0
NAME
RFU
RFU
RFU
RFU
ThrmSd
ChgTReg
DCDTmr
ChgTmo
RESET
RFU
ThrmSd
SEE TABLE 4
Reserved for future use.
ThrmSd indicates when the device is in thermal shutdown.
0 = Device not in thermal shutdown.
1 = Device in thermal shutdown.
ChgTReg
ChgTReg indicates when the device is reducing charger current to prevent overheating.
0 = Device not reducing charger current or charger disabled.
1 = Device reducing charger current.
DCDTmr
DCDTmr indicates when a data contact detect time wait exceeds tDCD_TO.
0 = DCD timer not expired or not running.
1 = DCD timer has been running for tDCD_TO.
ChgTmo
ChgTmo indicates when the battery charger reaches a timeout condition.
0 = Charger has not reached a timeout condition or is disabled.
1 = Charger has reached a timeout condition. ChgStat[2:0] in register 0x02 = 111 to indicate this fault condition.
Interrupt A Register
ADDRESS:
0x05
MODE:
Clear on Read
BIT
7
NAME
ChgTypInt
RESET
6
5
UsbOVPInt SysBatVInt
4
RFU
3
2
1
0
BatDetInt
ChgStatInt
ChgTRegInt
ChgTmoInt
SEE TABLE 4
ChgTypInt
ChgTypInt is set when there is a change in ChgTyp[3:0] in register 0x02.
UsbOVPInt
UsbOVPInt is set when there is a change in UsbOVP in register 0x03.
SysBatVint
SysBatVint is set when there is a change in SysBatV in register 0x03.
BatDetInt
ChgStatInt
BatDetInt is set when there is a change in BatDet or the first battery detection completes after a POR or a
change in battery detection method.
ChgStatInt is set when there is a change in ChgStat[2:0] in register 0x02 or the first charger status is entered
after a POR.
ChgTRegInt
ChgTRegInt is set when there is a change in ChgTReg in register 0x04.
ChgTmoInt
ChgTmoInt is set when there is a change in ChgTmo in register 0x04.
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Maxim Integrated │ 23
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
Interrupt B Register
ADDRESS:
0x06
MODE:
Clear on Read
BIT
7
6
5
4
NAME
VLimInt
DCDTmrInt
ILimInt
ThrmSdInt
RESET
VLimInt
DCDTmrInt
ILimInt
3
2
1
0
UsbOkInt
JeitaStatInt
JeitaHighTInt
JeitaTSdInt
SEE TABLE 4
VLimInt is set when the VB voltage reaches the input voltage limit.
DCDTmrInt is set when a DCD timeout occurs.
ILimInt is set when the VB current reaches the input current limit.
ThrmSdInt
ThrmSdInt is set when there is a change in ThrmSd in register 0x04.
UsbOkInt
UsbOkInt is set when there is a change in UsbOk in register 0x03.
JeitaStatInt
JeitaStatInt is set when there is a change in JeitaStat[2:0] in register 0x03.
JeitaHighTInt
JeitaHighTInt is set when the JEITA monitor enters the high battery temperature range (45°C < T < 60°C).
JEITATSDINT
JeitaTSdInt is set when the JEITA monitor enters the very low or very high battery temperature range
(T < 0°C or T > +60°C).
Interrupt Mask A Register
ADDRESS:
0x07
MODE:
Read/Write
BIT
7
6
5
4
3
2
1
0
NAME
ChgTypIntM
UsbOVPIntM
SysBatVIntM
RFU
BatDetIntM
ChgStatIntM
ChgTRegIntM
ChgTmoIntM
RESET
SEE TABLE 4
ChgTypIntM
ChgTypIntM masks the ChgTypInt interrupt in the IntA register (0x05).
0 = Masked.
1 = Not masked.
UsbOVPIntM
UsbOVPIntM masks the UsbOVPInt interrupt in the IntA register (0x05).
0 = Masked.
1 = Not masked.
SysBatVIntM
SysBatVintM masks the SysBatVint interrupt in the intA register (0x05).
BatDetIntM
ChgStatIntM
BatDetIntM masks the BatDetInt interrupt in the IntA register (0x05).
0 = Masked.
1 = Not masked.
ChgStatIntM masks the ChgStatInt interrupt in the IntA register (0x05).
0 = Masked.
1 = Not masked.
ChgTRegIntM
ChgTRegIntM masks the ChgTRegInt interrupt in the IntA register (0x05).
0 = Masked.
1 = Not masked.
ChgTmoIntM
ChgTmoIntM masks the ChgTmoInt interrupt in the IntA register (0x05).
0 = Masked.
1 = Not masked.
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Maxim Integrated │ 24
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
Interrupt Mask B Register
ADDRESS:
0x08
MODE:
Read/Write
BIT
7
6
5
4
3
NAME
VLimIntM DCDTmrIntM ILimIntM ThrmSdIntM UsbOkIntM
RESET
SEE TABLE 4
VLimIntM
DCDTmrIntM
ILimIntM
2
JeitaStatIntM
DCDTmrIntM masks the DCDTmrInt interrupt in the IntB register (0x06).
0 = Masked.
1 = Not masked.
ILimIntM masks the ILimInt interrupt in the IntB register (0x06).
0 = Masked.
1 = Not masked.
ThrmSdIntM masks the ThrmSdInt interrupt in the IntB register (0x06).
0 = Masked.
1 = Not masked.
UsbOkIntM
UsbOkIntM masks the UsbOkInt interrupt in the IntB register (0x06).
0 = Masked.
1 = Not masked.
JeitaHighTIntM
JeitaSdIntM
0
VLimIntM masks the VLimInt interrupt in the IntB register (0x06).
ThrmSdIntM
JeitaStatIntM
1
JeitaHighTIntM JeitaTSdIntM
JeitaStatIntM masks the JeitaStatInt interrupt in the IntB register (0x06).
0 = Masked.
1 = Not masked.
JeitaHighTIntM masks the JeitaHighTInt interrupt in the IntB register (0x06).
0 = Masked.
1 = Not masked.
JeitaSdIntM masks the JeitaSdInt interrupt in the IntB register (0x06).
0 = Masked.
1 = Not masked.
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Maxim Integrated │ 25
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
Charger Detection Control A Register
ADDRESS:
0x09
MODE:
Read/Write*
BIT
7
6
5
4
3
2
1
0
NAME
RFU
RFU
nFsusEn
FSUSMsk
RFU
RFU
DCDEn
RFU
RESET
RFU
SEE TABLE 4
Reserved for future use.
nFsusEn
nFsusEn is a software force-suspend control. If FSUSMsk = 0, the FSUS input controls the force suspend current limit. If FSUSMsk = 1, then nFsusEn controls the force suspend current limit.
0 = The device is forced into standby mode and the current limit is reduced to 0mA.
1 = Normal operation.
FSUSMsk
FSUSMsk masks the function of the FSUS input.
0 = FSUS input controls force-suspend mode.
1 = nFsusEn bit controls force-suspend mode.
DCDTEn
DCDTEn enables data contact detection.
0 = Not enabled.
1 = Enabled.
*Register resets to default value on VB rising edge.
Input-Current Limit Control Register
ADDRESS:
0x0A
MODE:
Read/Write*
BIT
7
6
5
NAME
IBusLim
RFU
RFU
RESET
IBusLim
RFU
4
3
2
ILimSet[2:0]
1
0
IBusDetSw[1:0]
SEE TABLE 4
IBusLim selects the automatic/manual VB input current limit.
0 = Automatic mode. The current limit is determined using adaptor detection status (ChgTyp[3:0]
bits in register 0x02).
1 = Manual mode. The current limit is determined by IBusDetSw[1:0] and ILimSet[2:0].
Reserved for future use.
ILimSet[2:0]
ILimSet[2:0] sets the VB current limit in manual mode when IBusDetSw[1:0] = 11.
000 = 100mA
001 = 500mA
010 = 600mA
011 = 700mA
100 = 900mA
101 = 1000mA
110 = 1500mA
111 = 2000mA
IBusDetSw
[1:0]
IBusDetSw[1:0] sets the current limit on VB in manual mode.
00 = 0mA
01 = 100mA
10 = 500mA
11 = set by ILimSet[2:0]
*Register resets to default value on VB rising edge.
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Maxim Integrated │ 26
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
Charge Control Register A
ADDRESS:
0x0B
MODE:
Read/Write*
BIT
7
6
5
NAME
RFU
RFU
RFU
RESET
RFU
IFChg[2:0]
4
3
IFChg[2:0]
2
1
0
RFU
RFU
SEE TABLE 4
Reserved for future use.
IFChg[2:0] sets the charger current in fast-charge mode.
000 = 700mA
001 = 300mA
010 = 200mA
011 = 600mA
100 = 800mA
101 = 900mA
110 = 350mA
111 = 450mA
*POR value depends on external conditions.
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Maxim Integrated │ 27
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
Charger Control B Register
ADDRESS:
0x0C
MODE:
Read/Write*
BIT
7
6
5
4
3
NAME
JeitaEn
BatUOKMsk
BatDetCntl
ChgEn
RFU
RESET
JeitaEn
BatUOKMsk
BatDetCntl
ChgEn
RFU
ChgDone[2:0]
2
1
0
ChgDone[2:0]
SEE TABLE 4
JeitaEn enables JEITA battery monitoring.
0 = JEITA monitoring of thermistor disabled. When JeitaEn = 0, JeitaStat[2:0] in register 0x03
always reads 101.
1 = JEITA monitoring of thermistor enabled. JeitaStat[2:0] in register 0x03 reads back the current
temperature status of the thermistor at THM.
BatUOKMsk masks the UOK_ signals.
0 = Battery detection signals are generated by the UOK_ outputs.
1 = Battery detection signals are not generated by the UOK_ outputs.
BatDetCntl selects which method the MAX14646/MAX14647 uses to detect the battery.
0 = BatDet status bit will indicate battery presence based on the impedance method.
1 = BatDet status bit will indicate battery presence based on presence of the NTC thermistor on THM.
ChgEn enables the battery charger. ChgEn does not affect the SYS node.
0 = Charger disabled.
1 = Charger enabled.
Reserved for future use.
ChgDone[2:0] sets the threshold current when constant-voltage fast charging is done.
000 = 10mA
001 = 20mA
010 = 40mA
011 = 50mA
100 = 60mA
101 = 80mA
110 = 100mA
111 = 120mA
*Register resets to default value on VB rising edge.
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Maxim Integrated │ 28
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
Charger Timer Register
ADDRESS:
0x0D
MODE:
Read/Write*
BIT
7
6
NAME
RFU
RFU
5
MtChgTmr[1:0]
RESET
RFU
4
3
2
FChgTmr[1:0]
1
0
PChgTmr[1:0]
SEE TABLE 4
Reserved for future use.
MtChgTmr[1:0]
MtChgTmr[1:0] sets the maintain charge timer when ChgAutoStp is register 0x12 is 1.
00 = 30min
01 = 15min
10 = 0min
11 = 60min
FChgTmr[1:0]
FChgTmr[1:0] sets the fast charge timer.
00 = 75min
01 = 150min
10 = 300min
11 = 600min
PChgTmr[1:0]
PChgTmr[1:0] sets the pre charge timer.
00 = 30min
01 = 60min
10 = 120min
11 = 240min
*Register resets to default value on VB rising edge.
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Maxim Integrated │ 29
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
Charger Detection Control A Register
ADDRESS:
0x0E
MODE:
Read/Write*
BIT
7
NAME
6
BatReChg[1:0]
RESET
BatReChg[1:0]
BatRegLow[1:0]
BatRegSel
BatRegHi[2:0]
5
4
BatRegLow[1:0]
3
BatRegSel
2
1
0
BatRegHi[2:0]
SEE TABLE 4
BatReChg[1:0] sets the recharge threshold in relation to VBAT. Once VBAT falls to below the regulation voltage less this amount, the MAX14746/MAX14747 will recharge it.
00 = 50mV
01 = 100mV
10 = 150mV
11 = 200mV
BatRegLow[1:0] sets the battery regulation voltage when BatRegSel = 0.
00 = 4.05V
01 = 4.10V
10 = 4.15V
11 = 4.20V
BatRegSel selects which value to use for the battery regulation voltage setting. VSYS is nominally set at
VBAT_REG + 200mV. Note, if VBAT_REG is chosen such that VSYS < VSYS_LIM, the battery charger will
not function properly.
0 = Use BatRegLow
1 = Use BatRegHi
BatRegHi sets the battery regulation voltage when BatRegSel = 1
000 = 4.25V
001 = 4.30V
010 = 4.35V
011 = 4.40V
100 = 4.45V
101 = 4.50V
110 = 4.55V
111 = 4.60V
*Register resets to default value on VB rising edge.
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Maxim Integrated │ 30
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
Precharge Control Register
ADDRESS:
0x10
MODE:
Read/Write*
BIT
7
NAME
VPChg
6
5
IPChg[1:0]
RESET
VPChg
4
3
VPChgLow[1:0]
2
1
VPChgHigh[1:0]
0
BatDetChgM
SEE TABLE 4
VPChg selects which voltage threshold setting to use for pre-charging. The charger uses precharging until the
battery voltage rises above the threshold or the timer expires.
0 = Use VPChgLow[1:0].
1 = Use VPChgHigh[1:0].
IPChg[1:0]
IPChg[1:0] sets the precharge current.
00 = 30mA
01 = 50mA
10 = 70mA
11 = 100mA
VPChgLow
[1:0]
VPChgLow[1:0] sets the precharge voltage threshold when VPChg = 0.
00 = 2.15V
01 = 2.25V
10 = 2.35V
11 = 2.45V
VPChgHigh
[1:0]
VPChgHigh[1:0] sets the precharge voltage threshold when VPChg = 1.
00 = 2.70V
01 = 2.80V
10 = 2.90V
11 = 3.00V
BatDetChgM
BatDetChgM mask for battery detection-charger interaction.
0 = BatDet state affects charger behavior per state diagram.
1 = BatDet state does not affect charger behavior.
(i.e., it is possible to turn on charger without a battery present.)
*Register resets to default value on VB rising edge.
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Maxim Integrated │ 31
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
Charger Detection Control B Register
ADDRESS:
0x11
MODE:
Read/Write*
BIT
7
6
NAME
SFOutOrd
SFOutAsrt
5
4
AnSwCntl[1:0]
RESET
3
2
1
0
ChgTypMan*
ChgAutoStart
BatDetChgEn
UsbCompl
SEE TABLE 4
SFOutOrd
SFOutOrd enables the SFOUT output.
0 = Force SFOUT to off. The internal LDO is disabled and VSFOUT is 0V.
1 = SFOUT is automatically controlled by the VB voltage presence and the SFOutAsrt bit.
SFOutAsrt
SFOutAsrt controls the period when SFOUT turns on.
0 = SFOUT turns on after a complete charger detection cycle. VB does not pass current until charger detection is
complete.
1 = SFOUT turns on immediately after VB is a valid voltage.
AnSwCntl[1:0]
AnSwCntl[1:0] controls the analog USB data switches.
00 = Automatic mode. The switches are open during adapter detection and closed if an SDP or CDP are detected.
01 = Switches forced open.
10 = Switches forced open.
11 = Switches forced closed.
ChgTypMan*
Charger-Type Manual Detection
Set to 1 to force charger detection. After the detection completes the bit resets to 0.
0 = Disable
1 = Force a charger detection run
ChgAutoStart
Charger Auto-Restart Control
0 = Charger remains in maintain charge done even when VBAT is less than charge restart threshold.
1 = Charger automatically restarts when VBAT drops below charge restart threshold.
BatDetChgEn
BatDetChgEn enables running the charger during battery detection.
0 = The charger is not allowed to turn on during battery detection if ChgEn = 0 in register 0x0C.
1 = The charger is allowed to turn on during battery detection even when ChgEn = 0 in register 0x0C.
UsbCompl
UsbCompl controls whether a USB compliant port is expected for an SDP port.
0 = If an SDP is detected in auto current limit setting mode, the input current limit is set to 500mA.
1 = If an SDP is detected in auto current limit setting mode, the input current limit is set to 100mA.
*Register resets to default value on VB rising edge.
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Maxim Integrated │ 32
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
Charger Control C Register
ADDRESS:
0x12
MODE:
Read/Write*
BIT
7
6
5
4
NAME
ChgAutoStp
SFOutData
RFU
RFU
RESET
ChgAutoStp
3
2
1
SysMin[2:0]
0
RFU
SEE TABLE 4
ChgAutoStp controls the transition from maintain charge mode to maintain charge done.
0 = Auto stop disabled.
1 = Auto stop enabled.
SFOutData
SFOutData controls whether SFOUT is turned on for all chargers or only for SDP/CDP. SFOutData is overridden
by the SFOutOrd and SFOutAsrt settings in register 0x11.
0 = SFOUT is turned on for all valid charger types (see ChgTyp[3:0] in register 0x02).
1 = SFOUT is turned on only for SDP (ChgTyp[3:0] = 001) or CDP (ChgTyp[3:0] = 010) chargers.
SysMin[2:0]
SysMin sets System Voltage Minimum Threshold. When VSYS approaches VSYS_LIM, an internal loop will
actively reduces the charge current in order to regulate VSYS. Note, if VSYS < VSYS_LIM, the battery charger
will not function properly.
000 = 3.6V
001 = 3.7V
010 – 3.8V
011 = 3.9V
100 = 4.0V
101 = 4.1V
110 = 4.2V
111 = 4.3V
RFU
Reserved for future use. Must be set to 1.
*Register resets to default value on VB rising edge.
Current-Limit Monitor Register
ADDRESS:
0x13
MODE:
Read Only*
BIT
7
6
5
4
NAME
ILimMon[7:0]
RESET
SEE TABLE 4
ILimMon[7:0]
3
2
1
0
ILimMon[7:0] reads out the VB input current limit setting that is currently used.
0000 0000 = 0mA
0000 0001 = 100mA
0000 0010 = 500mA
0000 0100 = 600mA
0000 1000 = 700mA
0001 0000 = 900mA
0010 0000 = 1000mA
0100 0000 = 1500mA
1000 0000 = 2000mA
*Register resets to default value on VB rising edge.
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Maxim Integrated │ 33
www.maximintegrated.com
#
ICHG = 0
LED = 1s PULSE
ICHG = 0
LED = OFF
MAINTAIN
CHARGE
BatDet SIGNAL ONLY RELEVANT FOR TRANSITIONS IF BatDetChgM
=0
** CHARGE TIMER IS SLOWED BY50% IF ICHG < IFCHG/2 AND PAUSED IF
ICHG < IFCHG/5 ONLY IN FAST CHARGE CONSTANT CURRENT STATE
tMTCHG
LED = ON
ICHG < ICHG_DONE
ChgStat = 101
T < T2 or T > T3
ICHG < ICHG_DONE
AND SysBatV = 0
AND T DIE < TCHG_LIM
RESET CHARGE
TIMER
CHARGING
ICHG
NO
CHARGING
NO
CHARGING
T1 < T < T4
ICHG = 0
T1
CHARGING
VBATREG
-150mV
NO
CHARGING
T4
T2
T3
TEMPERATURE(°C)
-150mV
ICHG = 0
LED = 1.5s PERIOD
FAST
CHARGE
CV SUSPEND
ChgStat = 001
tCHG_TIMER > tFCHG
PAUSE
CHARGE
TIMER
T < T1 or T > T4
T1 T2
T4
T3
TEMPERATURE(°C)
NO
CHARGING
ChgStat = 100
LED = ON
ICHG = IFCHG
(CONSTANT
VOLTAGE)
FAST
CHARGE
Voltage Mode = 1*
And SysBatV = 0
ICHG = IFCHG **
ChgStat = 001
T1 < T < T4
LED = 1.5s PERIOD
FAST
CHARGE
CC SUSPEND
LED = ON
PAUSE
CHARGE
TIMER
T < T1 or T > T4
tCHG_TIMER > tPCHG
ICHG = 0
LED = 1.5s PERIOD
ChgStat = 001
PREQUAL SUSPEND
ICHG = 0
FAST
CHARGE
(Constant Current)
ChgStat = 011
(VOLTAGE MODE = 0*
AND SysBatV = 0) OR
VBAT < VPCHG_R
ICHG > ICHG_DONE AND
RESET CHARGE
TIMER
T1 < T < T4
T < T1 or T > T4
VBAT > VPCHG_R
RESET CHARGE
TIMER
ICHG = IPCHG
LED = ON
VBAT < VPCHG_R
RESET CHARGE
TIMER
VBAT < VBATREG–VBATRECHG
and ChgAutoReSta = 1
And SysBatV = 0
RESET CHARGE TIMER
PREQUAL
ChgStat = 010
ChgEn = 1, BatDet = 1
VBAT < VBATREG - VBATRECHG
AND SysBatV = 0 PAUSE
CHARGE
TIMER
ChgStat = 110
ICHG = 0
#
ChgStat = 111
LED = 0.15s PERIOD
ChgStat = 000
LED = OFF
FAULT
CHARGER OFF
RECOVER FROM FAULT
RESET CHARGE TIMER
TDIE < TBUS_LIM
OR V BAT > VSYS
OR ChgEn = 0
MAINTAIN
CHARGE DONE
BatDet = 01#
ChgEn = 1, BatDet = 1
VBAT > VBATREG - VBATRECHG
#
FRESH BATTERY VBAT < VBATREG - VBATRECHG
INSERTION
ChgStat = 110
tCHG_TIMER > tMTCHG
AND
ChgAutoStp = 1
BatDet = 0
#
T < T1 or T > T4
T < T1 or T > T4
* VOLTAGE MODE IS AN INTERNAL SIGNAL
#
Notes:
1s
ChgEn = 1, BatDet = 1
VBAT > VBATREG - VBATRECHG
T < T1 or T > T4
FROM ANY STATE
ICHG = 0
LED = 1.5s PERIOD
ChgStat = 001
CHARGE SUSPEND
RESET CHARGE TIMER
T1 < T < T4
FROM ANY STATE
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
State Diagram
Maxim Integrated │ 34
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
Applications Information
Bit Transfer
I2C Interface
The MAX14646/MAX14647 contain an I2C-compatible
interface for data communication with a host controller
(SCL and SDA). The interface supports a clock frequency
of up to 400kHz. SCL and SDA require pullup resistors
that are connected to a positive supply.
One data bit is transferred on the rising edge of each SCL
clock cycle. The data on SDA must remain stable during
the high period of the SCL clock pulse. Changes in SDA
while SCL is high and stable are considered control signals (see the Start, Stop, And Repeated Start Conditions
section). Both SDA and SCL remain high when the bus is
not active.
Start, Stop, And Repeated Start Conditions
Single-Byte Write
When writing to the MAX14646/MAX14647 using I2C,
the master sends a START condition (S) followed by the
MAX14646/MAX14647 I2C address. After the address,
the master sends the register address of the register that
is to be programmed. The master then ends communication by issuing a STOP condition (P) to relinquish control
of the bus, or a REPEATED START condition (Sr) to communicate to another I2C slave. See Figure 2.
In this operation, the master sends an address and two
data bytes to the slave device (Figure 3). The following
procedure describes the single byte write operation:
●● 1) The master sends a START condition
●● 2) The master sends the 7-bit slave address plus a
write bit (low)
●● 3) The addressed slave asserts an ACK on the data
line
Slave Address
●● 4) The master sends the 8-bit register address
Set the Read/Write bit high to configure the MAX14646/
MAX14647 to read mode (Table 1). Set the Read/Write
bit low to configure the MAX14646/MAX14647 to write
mode. The address is the first byte of information sent
to the MAX14646/MAX14647 after the START condition.
●● 5) The slave asserts an ACK on the data line only if
the address is valid (NAK if not)
●● 6) The master sends 8 data bits
●● 7) The slave asserts an ACK on the data line
●● 8) The master generates a STOP condition
Figure 2
S
Table 1. I2C Slave Addresses
P
Sr
ADDRESS FORMAT
SCL
SDA
Figure 2. I2C START, STOP and REPEATED START Conditions
HEX
BINARY
7-bit slave ID (MAX14746)
0x12
0001 010
Write Address (MAX14746)
0x14
0001 0100
Read Address (MAX14746)
0x15
0001 0101
7-bit slave ID (MAX14747)
0x02
0000 010
Write Address (MAX14747)
0x04
0000 0100
Read Address (MAX14747)
0x05
0000 0101
Figure 3
WRITE SINGLE BYTE
S
DEVICE SLAVE ADDRESS - W
A
8 DATA BITS
A
FROM MASTER TO SLAVE
REGISTER ADDRESS
A
P
FROM SLAVE TO MASTER
Figure 3. Write Byte Sequence
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Maxim Integrated │ 35
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
Burst Write
Single Byte Read
In this operation, the master sends an address and multiple data bytes to the slave device (Figure 4). The slave
device automatically increments the register address after
each data byte is sent, unless the register being accessed
is 0x00, in which case the register address remains the
same. The following procedure describes the burst write
operation:
In this operation, the master sends an address plus two
data bytes and receives one data byte from the slave
device (Figure 5). The following procedure describes the
single byte read operation:
●● 1) The master sends a START condition
●● 2) The master sends the 7-bit slave address plus a
write bit (low)
●● 1) The master sends a START condition
●● 3) The addressed slave asserts an ACK on the data
line
●● 2) The master sends the 7-bit slave address plus a
write bit (low)
●● 4) The master sends the 8-bit register address
●● 3) The addressed slave asserts an ACK on the data
line
●● 5) The slave asserts an ACK on the data line only if
the address is valid (NAK if not)
●● 4) The master sends the 8-bit register address
●● 6) The master sends a REPEATED START condition
●● 5) The slave asserts an ACK on the data line only if
the address is valid (NAK if not)
●● 7) The master sends the 7-bit slave address plus a
read bit (high)
●● 6) The master sends eight data bits
●● 8) The addressed slave asserts an ACK on the data
line
●● 7) The slave asserts an ACK on the data line
●● 8) Repeat 6 and 7 N-1 times
●● 9) The slave sends eight data bits
●● 9) The master generates a STOP condition
●● 10) The master asserts a NACK on the data line
●● 11) The master generates a STOP condition
Figure 4
BURST WRITE
S
DEVICE SLAVE ADDRESS - W
A
REGISTER ADDRESS
A
8 DATA BITS - 1
A
8 DATA BITS - 2
A
8 DATA BITS - N
A
FROM MASTER TO SLAVE
P
FROM SLAVE TO MASTER
Figure 4. Burst Write Sequence
Figure 5
READ SINGLE BYTE
S
DEVICE SLAVE ADDRESS - W
A
REGISTER ADDRESS
A
Sr
DEVICE SLAVE ADDRESS - R
A
8 DATA BITS
NA
FROM MASTER TO SLAVE
P
FROM SLAVE TO MASTER
Figure 5. Read Byte Sequence
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Maxim Integrated │ 36
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
Burst Read
●● 9) The slave sends eight data bits
In this operation, the master sends an address plus two
data bytes and receives multiple data bytes from the slave
device (Figure 6). The following procedure describes the
burst byte read operation:
●● 10) The master asserts an ACK on the data line
●● 11) Repeat 9 and 10 N-2 times
●● 12) The slave sends the last eight data bits
●● 1) The master sends a START condition
●● 13) The master asserts a NACK on the data line
●● 2) The master sends the 7-bit slave address plus a
write bit (low)
●● 14) The master generates a STOP condition
●● 3) The addressed slave asserts an ACK on the data
line
Acknowledge Bits
Data transfers are acknowledged with an acknowledge bit
(ACK) or a not-acknowledge bit (NACK). Both the master
and the MAX14746 generate ACK bits. To generate an
ACK, pull SDA low before the rising edge of the ninth
clock pulse and hold it low during the high period of the
ninth clock pulse (see Figure 7). To generate a NACK,
leave SDA high before the rising edge of the ninth clock
pulse and leave it high for the duration of the ninth clock
pulse. Monitoring for NACK bits allows for detection of
unsuccessful data transfers.
●● 4) The master sends the 8-bit register address
●● 5) The slave asserts an ACK on the data line only if
the address is valid (NAK if not)
●● 6) The master sends a REPEATED START condition
●● 7) The master sends the 7-bit slave address plus a
read bit (high)
●● 8) The slave asserts an ACK on the data line
Figure 6
BURST READ
S
DEVICE SLAVE ADDRESS - W
A
REGISTER ADDRESS
A
Sr
DEVICE SLAVE ADDRESS - R
A
8 DATA BITS - 1
A
8 DATA BITS - 2
A
8 DATA BITS - 3
A
8 DATA BITS - N
NA
FROM MASTER TO SLAVE
P
FROM SLAVE TO MASTER
Figure 6. Burst Read Sequence
Figure 7
S
SCL
1
2
8
9
NOT ACKNOWLEDGE
SDA
ACKNOWLEDGE
Figure 7. Acknowledge
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Maxim Integrated │ 37
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
High-ESD Protection
Electrostatic Discharge (ESD)-protection structures are
incorporated on all pins to protect against electrostatic discharges up to ±2kV Human Body Model (HBM) encountered during handling and assembly. CDP and CDN are
further protected against ESD up to ±15kV (HBM) without
damage. The ESD structures withstand high ESD in both
normal operation and when the device is powered down.
After an ESD event, the MAX14746/MAX14747 continues
to function without latchup.
ESD Test Conditions
ESD performance depends on a variety of conditions.
Contact Maxim for a reliability report that documents test
setup, test methodology, and test results.
Human Body Model
Figure 8 shows the Human Body Model. Figure 9 shows
the current waveform it generates when discharged into a
low impedance. This model consists of a 100pF capacitor
Figure 8
charged to the ESD voltage of interest that is then discharged into the device through a 1.5kΩ resistor.
IEC 61000-4-2
The IEC 61000-4-2 standard covers ESD testing and performance of finished equipment. It does not specifically
refer to integrated circuits. The MAX14746/MAX14747 are
specified for ±4kV Air-Gap and ±5kV Contact Discharge
IEC 61000-4-2 on the CDP and CDN pins.
The main difference between tests done using the Human
Body Model and IEC 61000-4-2 is higher peak current
in IEC 61000-4-2. Because series resistance is lower in
the IEC 61000-4-2 ESD test model (Figure 10), the ESDwithstand voltage measured to this standard is generally
lower than that measured using the Human Body Model.
Figure 11 shows the current waveform for the ±6kV IEC
61000-4-2 Level 4 ESD Contact Discharge test. The
Contact Discharge method connects the probe to the
device before the probe is energized.
Figure 10
RC
1MΩ
CHARGE-CURRENTLIMIT RESISTOR
HIGHVOLTAGE
DC
SOURCE
CS
100pF
RD
1.5kΩ
RC
50MΩ TO 100MΩ
RD
330Ω
DISCHARGE
RESISTANCE
CHARGE-CURRENTLIMIT RESISTOR
DISCHARGE
RESISTANCE
STORAGE
CAPACITOR
DEVICE
UNDER
TEST
HIGHVOLTAGE
DC
SOURCE
CS
150pF
DEVICE
UNDER
TEST
STORAGE
CAPACITOR
Figure 8. Human Body ESD Test Model
Figure 10. IEC61000-4-2 ESD Test Model
Figure 9
Figure 11
IPEAK (AMPS)
Ir
100%
90%
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
IPEAK (AMPS)
100%
90%
36.8%
10%
0
0
tRL
TIME
TIME
tDL
CURRENT WAVE FORM
Figure 9. Human Body Current Waveform
www.maximintegrated.com
10%
tR = 0.7ns TO 1ns
t
30ns
60ns
Figure 11. IEC61000-4-2 ESD Generator Current Waveform
Maxim Integrated │ 38
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
Table 2. Part Selection
Table 4. Register Default Values
DEFAULT VALUES
PART NUMBER
EXT/UOK2
FUNCTION
BATTERY
OVP
REGISTER
ADDRESS
REGISTER
NAME
MAX14746B
MAX14747
MAX14746B
EXT
Disabled
0x00
Chip_Id
0x2E
0x30
MAX14747
EXT
Enabled
0x01
Chip_Rev
0x01
0x11
0x02
StatusA
0x00
0x00
0x03
StatusB
0x46
0x46
0x04
StatusC
0x00
0x00
0x05
IntA
0xA0
0xA0
0x06
IntB
0xA4
0xA4
0x07
IntMaskA
0x00
0x00
0x08
IntMaskB
0x00
0x00
Table 3. Register Bit Default Values
REGISTER BITS
IBusLim
MAX14746B
Manual
MAX14747
Automatic
ILimSet[2:0]
500mA
500mA
IFChg[2:0]
600mA
200mA
ChgEn
Enabled
Disabled
BatReChg[1:0]
100mV
100mV
0x09
CDetCntlA
0x22
0x22
BatRegLow[1:0]
4.20V
4.20V
0x0A
ILimCntl
0x87
0x07
BatDetIntM
Masked
Masked
0x0B
ChgCntlA
0x0C
0x08
ChgStatIntM
Masked
Masked
0x0C
ChgCntlB
0xF3
0xE4
VPChg
VPChgHigh
VPChgLow
0x0D
ChgTmr
0x2E
0x2E
IPChg[1:0]
100mA
50mA
0x0E
ChgVSet
0x72
0x72
VPChgLow[1:0]
2.45V
2.25V
0x0F
JeitaCntl
0x00
0x00
VPChgHigh[1:0]
3.00V
2.80V
0x10
ChgPCntl
0xFE
0x2A
SFoutAsrt
Immediately
Delayed
0x11
CDetCntlB
0xC6
0x86
FSUSMsk
FSUS
FSUS
0x12
ChgCntlC
0x8F
0x81
BatDetChgM
Not Masked
Not Masked
0x13
ILimMon
0x00
0x00
JeitaEn
Enabled
Enabled
BatDetCntl
Thermistor
Thermistor
ChgDone[2:0]
50mA
60mA
ChgAutoStart
Enabled
Enabled
BatDetChgEn
Enabled
Enabled
UsbCmpl
500mA
500mA
BatRegSel
BatRegLow
BatRegLow
BatRegHi[2:0]
4.35V
4.35V
SFoutData
All Chargers
All Chargers
SysMin[2:0]
4.3V
4.3V
MAX_VSYS_REG
VBAT_REG + 0.2V
4.8V
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Maxim Integrated │ 39
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
Typical Operating Circuit
SYSTEM
LOAD
*OPTIONAL pMOSFET
FOR NEGATIVE
VBUS PROTECTION
SYS
10µF
** *OPTIONAL pMOSFET
CONNECTS SYS AND BAT
UOK2/EXT
BAT
NVP
*
10µF
THM
CAP
1µF
VBUS
1µF
MAX14746/MAX14747
MICRO-USB
CONNECTOR
SFOUT
1µF
USB 2.0
HI-SPEED
HOST
VBUS
VB
BATTERY
PACK
D-
CDN
D+
CDP
D-
TDN
D+
VIO
TDP
IDEF
FSUS
OPTIONAL INPUTS
CTYP
µC
SCL
UOK1
SDA
LED
INT
PART
TEMP RANGE
BUMP-PACKAGE
MAX14746BEWA+
-40°C to +85°C
25 WLP
MAX14747EWA+
-40°C to +85°C
25 WLP
+Denotes a lead(Pb)-free/RoHS-compliant package.
PROCESS: BiCMOS
www.maximintegrated.com
GND
Package Information
Ordering Information
Chip Information
OPTIONAL OPEN-DRAIN OUTPUTS
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
25 WLP
W252J2+1
21-0453
Refer to Application
Note 1891
Maxim Integrated │ 40
MAX14746/MAX14747
USB Detection with Smart Power
Selector Li+ Chargers
Revision History
REVISION
NUMBER
REVISION
DATE
0
11/15
DESCRIPTION
Initial release
1
1/17
Updated for Pass 2 material
2
11/17
Removed future product asterisks
PAGES
CHANGED
—
3, 11, 13,
19–33, 39
40
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
© 2017 Maxim Integrated Products, Inc. │ 41
