MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
General Description
The MAX14890E incremental encoder receiver contains
four differential receivers and two single-ended receivers.
The differential receivers can be operated in RS-422 or
differential high-threshold logic (HTL) modes and are
optionally configurable for single-ended TTL/HTL operation.
The MAX14890E features a wide common mode input
range of -20V to +20V in RS-422 mode.
The auxiliary IEC 61131-2 Type-1/Type-3 digital inputs
are designed for operation with switches or proximity
sensors and can be individually configured for TTL operation.
All receiver input signals are fault protected to voltage shorts
in the ±40V range. Per channel fault detection provides
warning of irregular conditions such as small differential
signals, shorts, opens, overvoltages, and undervoltages.
The MAX14890E features a pin-selectable SPI or parallellogic interface. SPI control provides detailed diagnostics
and individual configurations for receivers.
The MAX14890E is available in a 32-pin TQFN-EP (5mm
x 5mm) and operates over the -40°C to +125°C temperature range.
Ordering Information appears at end of data sheet.
Typical Operating Circuit
ENCODER
VL
A
RS-422 A
120Ω
RS-422 B
120Ω
A
RxA
B
RxB
120Ω
Z
RxZ
TTL ALARM
RxY
PROXIMITY
SENSOR
DO
DI2
DO
DI3
RxD2
RxD3
MAX14890
5V
YO
YFAULT
PROXIMITY
SENSOR
5V
ZO
ZFAULT
DIY
5V
BO
BFAULT
Z
RS-422 Z
AO
AFAULT
B
5V
LO2
LO3
SNGL/CLK = 0
TTL/SDI = 1
DI/TTLY = 1
DI/TTL2 = 1
DI/TTL3 = 1
COUNTER/
MOTOR
CONTROLLER
ENCODER CIRCUIT WITH RS-422 SIGNALS AND TTL ALARM SIGNAL
19-7536; Rev 0; 3/15
●● High Flexibility Supports All Encoder Types
• Selectable RS-422/HTL/TTL/DI Receivers
• RS-422/TTL Switching Rates Up to 35Mbps
• HTL Switching Rates Up to 400kHz
• SPI or Pin-Controlled Operation
• SPI Interface Allows Per-Receiver Configuration
• 1.62V to 5.5V Logic Interface
●● Integrated Fault Detection Reduces Down-Time
• Open-Wire and Short-Circuit Detection
• Overvoltage and Undervoltage Fault Detection
●● Integrated Protection Ensures Robust
Communication
• ±40V Fault Protection Range
• ±20V RS-422 Common Mode Range
• DI Glitch Filters
• ±25kV HBM ESD
• ±7kV Air-Gap per IEC 61000-4-2 ESD
• ±10kV Contact per IEC 61000-4-2 ESD
• -40°C to +125°C Operating Temperature Range
Applications
●●
●●
●●
●●
Encoder Interfaces
Motor Controllers
Pulse Counters
Servo Control Commutation
Input Receiver Modes
3.3V to 5V
5V
VCC
Benefits and Features
ASIC
MODE
RxA
RxB
RxZ
RxY
RS-422
√
√
√
√
D-HTL
√
√
√
SE-HTL
√
√
√
TTL
√
√
√
√
DI
RxDI2
RxDI3
√
√
√
√
√
√
MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Absolute Maximum Ratings
(All voltages referenced to GND)
VCC...........................................................................-0.3V to +6V
VL .............................................................-0.3V to (VCC + 0.3V)
AO, BO, ZO, YO, LO, LO2, LO3..................-0.3V to (VL + 0.3V)
_FAULT, D2FAULT/IRQ............................................-0.3V to +6V
D3FAULT/ SDO (SPI is High).......................-0.3V to (VL + 0.3V)
D3FAULT/SDO (SPI is Low) ...................................-0.3V to +6V
TTL/SDI, SNGL/SCLK, HITH/CS, DI/TTLY,
DI/TTL2, DI/TTL3, SPI.........................................-0.3V to +6V
A, A, B, B, Z, Z, DIY, Y, DI2, DI3............................-40V to +40V
Short-Circuit Duration (_O, _FAULT, LO2,
D2FAULT/IRQ, LO3, D3FAULT/SDO to GND)......Continuous
Continuous Power Dissipation (TA = +70°C)
Thin QFN (derate 19mW/°C above +70°C)................1520mW
Operating Temperature Range.......................... -40°C to +125°C
Junction Temperature.......................................................+150°C
Storage Temperature Range............................. -65°C to +150°C
Lead Temperature (Soldering, 10s).................................. +300°C
Soldering Temperature (Reflow).......................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Thermal Characteristics (Note 1)
Junction-to-Ambient Thermal Resistance (θJA)...............36°C/W
Junction-to-Case Thermal Resistance (θJC)......................3°C/W
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Electrical Characteristics
(VCC = 5V±10%, VL = 1.62V to VCC, TA = -40°C to +125°C unless otherwise noted. Typical values are at VCC = 5V, VL = 3.3V,
TA = +25°C.) (Notes 2, 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
5.5
V
POWER SUPPLY
Supply Voltage
VCC
Supply Current
ICC
Logic Supply Voltage
VL
4.5
Outputs not switching, no load
14
mA
1.62
9
5.5
V
-200
+200
mV
RS-422 RECEIVERS (RxA, RxB, RxZ, RxY)
Differential Threshold Voltage
Differential Input Hysteresis
Single-Ended Input Current
VTH
-20V ≤ VCM ≤ +20V
ΔVTH
-20V ≤ VCM ≤ +20V
IIN
VCC = 0V or 5V
230
VIN = +10V
VIN = -10V
+100
-270
mV
+160
-170
Low Differential Voltage Fault
Threshold
VTH_DFP
-20V ≤ VCM ≤ +20V, positive
+270
+460
VTH_DFN
-20V ≤ VCM ≤ +20V, negative
-460
-270
Single-Ended Input Fault
Threshold
VTH_SELP
Positive
+15
+18
VTH_SELN
Negative
-18
-15
-900
+900
μA
mV
V
DIFFERENTIAL HTL RECEIVERS (RxA, RxB, RxZ)
Differential Threshold Voltage
Differential Input Hysteresis
Single-Ended Input Current
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VTH
0V ≤ VCM ≤ +25V
ΔVTH
0V ≤ VCM ≤ +25V
IIN
1
VTH = +24V
VTH = -10V
+280
-270
-170
mV
V
+460
μA
Maxim Integrated │ 2
MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Electrical Characteristics (continued)
(VCC = 5V±10%, VL = 1.62V to VCC, TA = -40°C to +125°C unless otherwise noted. Typical values are at VCC = 5V, VL = 3.3V,
TA = +25°C.) (Notes 2, 3 )
PARAMETER
Low Differential Voltage Fault
Threshold
SYMBOL
CONDITIONS
TYP
MAX
VTH_DFP
0V ≤ VCM ≤ +24V, Positive
+1.2
+2.0
VTH_DFN
0V ≤ VCM ≤ +24V, Negative
-2.0
-1.2
-18
-15
HITH is low
8
40
HITH is high
13
40
HITH is low
-40
6
HITH is high
-40
11
Single-Ended Input Fault
VTH_SEN
Negative
Threshold
SINGLE-ENDED HTL RECEIVERS (RxA, RxB, RxZ)
Input Logic High Voltage
VIH_SE
Input Logic Low Voltage
VIL_SE
Input Hysteresis
MIN
ΔVITH_SE
270
UNITS
V
V
V
V
mV
Input Current (A, B, Z)
I_HTL
VCC = 0V or normally powered, VIN = 24V
460
μA
Input Current (A, B, Z)
I_HTL
VCC = 0V or normally powered, VIN = 24V
460
μA
-15
V
Fault Threshold Voltage
VTH_HTLF
-18
TTL RECEIVERS (RxA, RxB, RxZ, RxY, RxD2, RxD3)
Input High Voltage
VIH_TTL
TTL mode
2.0
40
V
Input Low Voltage
VIL_TTL
TTL mode
-40
0.8
V
Input Hysteresis
VHY_TTL
TTL mode
Input Current (A, B, Z, DIY, DI2,
DI3)
I_TTL
TTL mode, VCC = 0V or 5V, VIN = 5V
Input Current (A, B, Z, Y)
I_TTL
TTL mode, VCC = 0V or 5V, VIN = 5V
Fault Threshold Voltage
VTH_TTLF
0.53
V
85
μA
85
Negative
-18
-15
Positive
+15
+18
V
DIGITAL INPUT RECEIVERS (DI2, DI3, RxY, RxZ)
Input High Voltage
VIH_DI
DI mode, HITH is high or low
8
40
V
Input Low Voltage
VIL_DI
DI mode, HITH is high or low
-40
5.5
V
Input Hysteresis
VHY_DI
DI mode, HITH is high or low
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1.2
V
Maxim Integrated │ 3
MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Electrical Characteristics (continued)
(VCC = 5V±10%, VL = 1.62V to VCC, TA = -40°C to +125°C unless otherwise noted. Typical values are at VCC = 5V, VL = 3.3V,
TA = +25°C.) (Notes 2, 3)
PARAMETER
Current Sink
Fault Threshold Voltage
SYMBOL
IDI
VTH_DIF
CONDITIONS
MIN
DI mode, 0V ≤ VDI ≤ 5V
0
DI mode, 8V ≤ VDI ≤ 40V
2
DI mode
TYP
MAX
2.6
2.5
-18
3.3
UNITS
mA
-15
V
LOGIC INTERFACE (AO, AFAULT, BO, BFAULT, ZO, ZFAULT, YO, YFAULT, LO2, D2FAULT/IRQ, LO3, D3FAULT/SDO, DI/
TTLY, DI/TTL2, DI/TTL3, SPI, TTL/SDI, SNGL/CLK, HITH/CS)
Input High Voltage
VIH
DI/TTLY, DI/TTL2, DI/TTL3, SPI, TTL/SDI,
SNGL/CLK, HITH/CS
2/3 x
VL
Input Low Voltage
VIL
DI/TTLY, DI/TTL2, DI/TTL3, SPI, TTL/SDI,
SNGL/CLK, HITH/CS
Input Current
IIN
DI/TTLY, DI/TTL2, DI/TTL3, SPI, TTL/SDI,
SNGL/CLK, HITH/CS
-1
Output High Voltage
VOH
AO, BO, ZO, YO, LO2, LO3, AO, BO, ZO,
YO, LO2, LO3, D2FAULT/IRQ, D3FAULT/
SDO, IOUT = -3mA (Note 4)
VL 0.4V
Output Low Voltage
VOL
AO, BO, ZO, YO, LO2, LO3, D3FAULT/
SDO, AFAULT, BFAULT, ZFAULT,
YFAULT, D2FAULT/IRQ, IOUT = +3mA
V
1/3 x
VL
V
+1
μA
V
0.4
V
PROTECTION
Thermal-Shutdown Threshold
TSHDN
Thermal-Shutdown Hysteresis
THYST
Fault-Protected Input Voltage
Range (A, A, B, B, Z, Z, DIY, Y,
DI2, DI3)
VIN_F
ESD Protection (A, A, B, B, Z, Z,
DIY, Y, DI2, DI3)
ESD Protection (all other pins)
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Temperature rising
+160
°C
10
°C
-40
+40
IEC 61000-4-2 Air-Gap Discharge to GND
±7
IEC 61000-4-2 Contact Discharge to GND
±10
Human body model
±25
Human body model
±2
V
kV
kV
Maxim Integrated │ 4
MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Switching Characteristics
(VCC = 5V±10%, VL = 1.62V to VCC, TA = -40°C to +125°C unless otherwise noted. Typical values are at VCC = 5V, VL = 3.3V,
TA = +25°C.) (Notes 2, 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
RECEIVER (RxA, RxB, RxZ) (Note 4)
RS-422 Maximum Data Rate
DRMAX422
RS-422 mode
RS-422 Receiver Propagation
Delay
tDPLH_422
tDPHL_422
RS-422 mode, CL = 15pF, VID = ±3V,
Figures 1, 2
RS-422 Receiver Propagation Delay Skew |tDPLH_422 - tDPHL_422|
tHLSKEW_422
RS-422 mode, CL = 15pF, VID = ±3V,
Figures 1, 2
0
5
ns
RS-422 Receiver Channel-toChannel Skew
|tCSKEW_422|
RS-422 mode, CL = 15pF, VID = ±3V,
Figures 1, 2
0
8
ns
D-HTL mode
1
Differential HTL (D-HTL) Maximum
Differential Data Rate
D-HTL Receiver Propagation
Delay
D-HTL Differential Receiver
Propagation Delay Skew
|tDPLH_DHTL - tDPHL_DHTL|
DRDHTL
35
25
25
tDPLH_DHTL D-HTL mode, CL = 15pF, VID = ±24V,
tDPHL_DHTL Figures 1, 2
ns
Mbps
100
100
ns
DHTL
D-HTL mode, CL = 15pF, VID = ±24V,
Figures 1, 2
0
20
ns
D-HTL Differential Receiver
Channel-to-Channel Skew
|tCSKEW_
DHTL|
D-HTL mode, CL = 15pF, VID = ±24V,
Figures 1, 2
0
8
ns
Single-Ended (SE-HTL) Maximum
Switching Rate
SRSEHTL
SE-HTL mode, HITH is high or low
SE-HTL Receiver Propagation
Delay
tHLSKEW_
Mbps
tDPLH_
SEHTL
tDPHL_
SE-HTL Receiver Channel-toChannel Skew
TTL Maximum Switching Rate
TTL Receiver Propagation Delay
TTL Receiver Propagation Delay
Skew (tDPLH_TTL - tDPHL_TTL)
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tHLSKEW_
SEHTL
|tCSKEW_
SEHTL|
SRTTL
tDPLH_TTL
tDPHL_TTL
tHLSKEW_
TTL
SE-HTL mode,
CL = 15pF,
0V ≤ VIN ≤ +24V
kHz
0
100
0
100
HITH is low
0
28
HITH is high
0
20
0
11
SE-HTL mode, HITH is high or low,
CL = 15pF, 0V ≤ VIN ≤ +24V, Figures 1, 2
SEHTL
SE-HTL Receiver Propagation
Delay Skew
|tDPLH_SEHTL - tDPHL_SEHTL|
400
SE-HTL mode, HITH is high or low,
CL = 15pF, 0V ≤ VIN ≤ +24V, Figures 1, 2
TTL mode
ns
400
TTL mode, CL = 15pF, 0V ≤ VIN ≤ +5V,
Figures 1, 2
100
0
ns
kHz
100
TTL mode, CL = 15pF, 0V ≤ VIN ≤ +5V,
Figures 1, 2
ns
52
ns
ns
Maxim Integrated │ 5
MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Switching Characteristics (continued)
(VCC = 5V±10%, VL = 1.62V to VCC, TA = -40°C to +125°C unless otherwise noted. Typical values are at VCC = 5V, VL = 3.3V,
TA = +25°C.) (Notes 2, 3)
PARAMETER
SYMBOL
TTL Receiver Channel-to-Channel
Skew
|tCSKEW_
TTL|
Digital Input (DI) Maximum
Switching Rate
DI Propagation Delay
SRDZ
tDPLH_DZ
tDPHL_DZ
CONDITIONS
TTL mode, CL = 15pF, 0V ≤ VIN ≤ +5V,
Figures 1, 2
RxZ only, DI mode, SPI = high
MIN
0
MAX
UNITS
11
ns
400
kHz
300
RxZ only, DI mode, SPI = high, CL = 15pF,
0V ≤ VIN ≤ +24V, Figures 1, 2
300
ns
DI Receiver Propagation Delay
Skew |tDPLH_DZ - tDPHL_DZ|
tRSKEW_DZ
DI Maximum Glitch Duration for
Glitch Rejection
tGL
RxZ only, DI mode, SPI = high
tPASS
RxZ only, DI mode, SPI = high
300
ns
35
Mbps
DI Admitted Pulse Duration
RxZ only, DI mode, SPI = high, CL = 15pF,
0V ≤ VIN ≤ +24V, Figures 1, 2
TYP
0
28
ns
80
ns
RECEIVER (RxY) (Note 5)
RS-422 Maximum Data Rate
DRMAX422
RS-422 mode
RS-422 Receiver Propagation
Delay
tDPLH_422
tDPHL_422
RS-422 mode, CL = 15pF, VID = ±3V,
Figures 1, 2
RS-422 Receiver Propagation Delay
Skew |tDPLH_422 - tDPHL_422|
tHLSKEW_422
RS-422 mode, CL = 15pF, VID = ±3V,
Figures 1, 2
RS-422 Receiver Channel-toChannel Skew
|tCSKEW_422|
RS-422 mode, CL = 15pF, VID = ±3V,
Figures 1, 2
TTL Maximum Switching Rate
SRTTL
TTL Receiver Propagation Delay
TTL Receiver Propagation Delay
Skew |tDPLH_TTL - tDPHL_TTL|
Digital Input (DI) Maximum
Switching Rate
DI Propagation Delay
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tDPLH_TTL
tDPHL_TTL
tHLSKEW_
TTL
SRDY
tDPLH_DY
tDPHL_DY
TTL mode
25
ns
25
ns
0
5
ns
0
8
ns
400
100
TTL mode, CL = 15pF, 0V ≤ VIN ≤ +5V,
Figures 1, 2
TTL mode, CL = 15pF, 0V ≤ VIN ≤ +5V,
Figures 1, 2
DI mode
DI mode, CL = 15pF, 0V ≤ VIN ≤ +24V,
Figures 1, 2
kHz
100
0
52
400
ns
ns
kHz
300
300
ns
Maxim Integrated │ 6
MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Switching Characteristics (continued)
(VCC = 5V±10%, VL = 1.62V to VCC, TA = -40°C to +125°C unless otherwise noted. Typical values are at VCC = 5V, VL = 3.3V,
TA = +25°C.) (Notes 2, 3)
PARAMETER
SYMBOL
CONDITIONS
TYP
MAX
UNITS
100
ns
80
ns
DI Receiver Propagation Delay
Skew |tDPLH_DY - tDPHL_DY|
tRSKEW_DY
DI Maximum Glitch Duration for
Glitch Rejection
tGL
DI/TTLY is high or low
tPASS
DI/TTLY is high or low
300
ns
SRDI
DI mode
20
kHz
DI Admitted Pulse Duration
DI mode, CL = 15pF, 0V ≤ VIN ≤ +24V,
Figures 1, 2
MIN
0
RECEIVER (DI2, DI3) (Note 5)
Digital Input (DI) Maximum
Switching Rate
DI Propagation Delay
DI Receiver Propagation Delay
Skew (tDPLH_DI - tDPHL_DI)
Maximum Glitch Duration for Glitch
Rejection
Admitted Pulse Length
TTL Maximum Switching Rate
TTL Receiver Propagation Delay
TTL Receiver Propagation Delay
Skew (tDPLH_DITTL - tDPHL_DITTL)
tDPLH_DI
tDPHL_DI
tRSKEW_DI
5
DI mode, CL = 15pF, 0V ≤ VIN ≤ +24V,
Figures 1, 2
5
DI mode, CL = 15pF
60
μs
ns
tGL
DI mode, DI/TTL_ is high or low
tPASS
DI mode, DI/TTL_ is high or low
350
ns
TTL mode
20
kHz
SRDI_TTL
80
tDPLH_DITTL TTL mode, CL = 15pF, 0V ≤ VIN ≤ +5V,
tDPHL_DITTL Figures 1, 2
tHLSKEW_
DITTL
5
5
TTL mode, CL = 15pF, Figures 1, 2
80
ns
μs
ns
FAULT DETECTION (AFAULT, BFAULT, ZFAULT, D2FAULT/IRQ, D3FAULT/SDO) (Note 5)
Differential Fault Propagation
Delay to _FAULT Output Active
tDFLH
tDFHL
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FLTR = 0
18
FLTR = 1
1400
FLTR = 0
6
FLTR = 1
1400
RFAULT = 5kΩ, CFAULT = 15pF, FLTR = 0,
RS-422 and D-HTL modes, Figures 1, 4
Differential Slew Rate to Avoid
Fault Alarm Output
Single Ended Propagation Delay
to _FAULT Output Active
RFAULT = 5kΩ,
CFAULT = 15pF,
RS-422 and DHTL
modes, Figures 1, 4
tSEFLH
tSEFHL
RFAULT = 5kΩ, CFAULT = 15pF, all modes
1
μs
V/μs
1.4
1.4
ms
Maxim Integrated │ 7
MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Switching Characteristics (continued)
(VCC = 5V±10%, VL = 1.62V to VCC, TA = -40°C to +125°C unless otherwise noted. Typical values are at VCC = 5V, VL = 3.3V,
TA = +25°C.) (Notes 2, 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SPI TIMING (Figure 5)
SNGL/CLK Clock Period
tCH+CL
80
ns
SNGL/CLK Pulse-Width High
tCH
25
ns
SNGL/CLK Pulse-Width Low
tCL
25
ns
HITH/CS Fall to SNGL/CLK Rise
Time
tCSS
15
ns
TTL/SDI Hold Time
tDH
15
ns
TTL/SDI Setup Time
tDS
15
ns
Output Data Propagation Delay
D3FAULT/SDO Rise and Fall
Times
HITH/CS Hold Time
HITH/CS Pulse-Width High
Note
Note
Note
Note
tDO
CL = 10pF, SNGL/
CLK falling-edge
to D3FAULT/SDO
stable.
Rising
tFT
Falling
tCSH
32
VL ≥ 3.3V
ns
28
VL = 1.62V
24
VL = 3.3V
2
VL = 1.62V
11
VL = 3.3V
1
VL =1.62V or 3.3V
10
VL = 5.5V
VL = 1.62V or 3.3V
VL = 5.5V
5
10
ns
ns
ns
5
2: All devices are 100% production tested at TA = +25°C. Specifications over temperature are guaranteed by design.
3: Currents into the device are positive; all currents out the device are negative. All voltages are referenced to ground, unless
otherwise noted.
4: In pin-control mode, D3FAULT/SDO is open-drain. In SPI mode, D3FAULT/SDO is a push-pull output.
5: Capacitive load includes test probe and fixture capacitance.
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tCSPW
VL ≥ 1.62V
Maxim Integrated │ 8
MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Test Circuits and Waveforms
VL
VL
RFAULT
RFAULT
CFAULT
_FAULT
CFAULT
_FAULT
IN
VIN
Rx
VID
CL
IN
_O
Rx
VIN
CL
_O
IN
VIN
DIFFERENTIAL
SINGLE-ENDED
Figure 1. Receiver Test Circuit
RISE/FALL TIMES ≤2ns
VID
0V
RISE/FALL TIMES ≤2ns
+3V to +24V
VIN
0V
VIH
+5V to +24V
VIL
-3V to -24V
VL
2
VL
2
_O
tPLH
tPHL
DIFFERENTIAL
0V
VL
VOL
VL
2
VL
2
_O
tPLH
VL
VOL
tPHL
SINGLE ENDED
Figure 2. Receiver Propagation Delay
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Maxim Integrated │ 9
MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Test Circuits and Waveforms (continued)
+3V to +24V
VTH_DFP
VID
0V
VTH_DFN
-3V to -24V
VL
2
_FAULT
VL
2
tDFLH
VL
VOL
tDFHL
Figure 3. Fault Detection Timing
HITH/CS
tCSS
tCL
tCH
tCSH
SNGL/CLK
tDS
tDH
TTL/SDI
tDO
D3FAULT/SDO
Figure 4. SPI Timing Diagram
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Maxim Integrated │ 10
MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Typical Operating Characteristics
(VCC = 5V, VL = 3.3V, TA = +25°C, unless otherwise noted.)
SUPPLY CURRENT
vs. DATA RATE
14
toc01
RS-422 RECEIVER DIFFERENTIAL
THRESHOLD VOLTAGE
vs. COMMON MODE VOLTAGE toc02
200
1000
VTH (mV)
10
400
HIGH
50
VTH (mV)
0
-50
8
70
0.1
1
DATA RATE (Mbps)
10
-800
-1000
100
RS-422, tPHL
0
PROPAGATION DELAY (ns)
PROPAGATION DELAY (ns)
TTL, tPLH
20
10
RS-422, tPLH
-40 -25 -10 5
20 35 50 65 80 95 110 125
RxY/RxZ DI MODE PROPAGATION
DELAY vs. TEMPERATURE toc07
tPLH
200
150
100
tPHL
50
0
-40 -25 -10 5
20 35 50 65 80 95 110 125
TEMPERATURE (°C)
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-10
-5
0
5
10
15
20
0
5
10
D-HTL MODE PROPAGATION DELAY
vs. TEMPERATURE
toc05
90
80
70
60
tPLH
40
tPHL
30
20
60
30
20
0
3.0
HITH = GND, tPHL
-40 -25 -10 5
HITH = VL, tPHL
20 35 50 65 80 95 110 125
TEMPERATURE (°C)
toc08
DI INPUT CURRENT
vs. INPUT VOLTAGE
40
toc09
30
2.5
20
2.0
tPLH
tPHL
1.5
1.0
10
0
-10
-20
0.5
0.0
HITH = GND, tPLH
40
10
20 35 50 65 80 95 110 125
HITH = VL, tPLH
50
0
DI2/DI3 DI MODE PROPAGATION
DELAY vs. TEMPERATURE
25
70
10
-40 -25 -10 5
20
SE-HTL MODE PROPAGATION DELAY
vs. TEMPERATURE
toc06
100
80
50
15
COMMON MODE VOLTAGE (V)
TEMPERATURE (°C)
DIY DI MODE PROPAGATION DELAY (µs)
DIY DI MODE PROPAGATION DELAY (ns)
250
-15
90
TEMPERATURE (°C)
300
-20
COMMON MODE VOLTAGE (V)
40
30
-600
-200
RS-422 AND TTL MODE PROPAGATION
DELAY vs. TEMPERATURE
toc04
TTL, tPHL
LOW
-200
-150
60
50
HIGH
0
-400
-100
RxA and RxB switching, all other
inputs are low
200
PROPAGATION DELAY (ns)
6
LOW
DI VOLTAGE (V)
ICC (mA)
D-HTL MODE
600
100
RS-422 MODE
toc03
800
150
12
D-HTL RECEIVER DIFFERENTIAL
THRESHOLD VOLTAGE
vs. COMMON MODE VOLTAGE
-30
-40 -25 -10 5
20 35 50 65 80 95 110 125
TEMPERATURE (°C)
-40
-0.5
0.0
0.5
1.0
1.5
2.0
2.5
DI INPUT CURRENT (mA)
3.0
Maxim Integrated │ 11
MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Typical Operating Characteristics (continued)
(VCC = 5V, VL = 3.3V, TA = +25°C, unless otherwise noted.)
RECEIVER OUTPUT VOLTAGE
LOW vs. SINK CURRENT
0.40
toc10
0.35
toc11
3
0.15
VOL (V)
VOH (V)
0.20
0.30
VL = 5V
4
VL = 3V
0.10
0.20
0.10
1
0.05
0.00
0.25
0.15
2
VL = 5V
toc12
_FAULT is asserted.
0.35
VL = 3V
0.25
_FAULT OUTPUT VOLTAGE
vs. SINK CURRENT
0.40
5
0.30
VOL (V)
RECEIVER OUTPUT VOLTAGE
HIGH vs. SOURCE CURRENT
6
0
10
20
30
40
50
60
70
80
90 100
0
0.05
-225
-175
SINK CURRENT (mA)
LOW DIFFERENTIAL
INPUT FAULT
-125
-75
0.00
-25
SOURCE CURRENT (mA)
RS-422 MODE COMMON-MODE
VOLTAGE FAULT (HIGH)
toc13
0
5
10
15
20
25
SINK CURRENT (mA)
RS-422 MODE COMMON MODE
VOLTAGE FAULT (LOW)
toc14
toc15
GND
A
200mV/div
GND
VOUTN
AO
5V/div
VINSIDE
VBACKUP
GND
AFAULT
2V/div
100µs/div
www.maximintegrated.com
AO
5V/div
AFAULT
5V/div
AFAULT
5V/div
2ms/div
2ms/div
Maxim Integrated │ 12
MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
SPI
VL
BFAULT
ZFAULT
YFAULT
DI/TTLY
YO
TOP VIEW
ZO
Pin Configuration
24
23
22
21
20
19
18
17
Z
25
16
DIY
Z
26
15
Y
VCC
27
14
DI/TTL2
LO3
28
13
DI2
10 B
+
3
4
5
6
7
8
BO
2
D2FAULT/IRQ
9
1
TTL/SDI
32
11 GND
SNGL/CLK
A
12 LO2
HITH/CS
A
31
D3FAULT/SDO
30
AO
DI/TTL3
MAX14890E
AFAULT
DI3
29
*EP
B
TQFN
5mm x 5mm
* Exposed Pad. Connect to GND.
Pin Description
PIN
NAME
1
AO
2
AFAULT
3
4
5
6
FUNCTION
Noninverting RS-422/HTL/TTL Receiver Input A.
Open-Drain Fault Output for Receiver A. AFAULT asserts low during a fault condition on receiver A
(RxA) . See the Detecting Faults section for more information.
D3FAULT/
SDO
Receiver D3 Open-Drain Fault Output/SPI Serial Data Out.
In pin mode (SPI is low), D3FAULT/SDO asserts low during a fault condition on the D3 receiver. See
the Detecting Faults section for more information.
In SPI mode (SPI is high), D3FAULT/SDO is the SPI serial data output and is in a push-pull configuration. D3FAULT/SDO is high-impedance in SPI mode with HITH/CS is high.
HITH/CS
Single-Ended HTL Threshold Select Input/SPI Chip Select.
In pin mode (SPI is low), HITH/CS sets the input thresholds for the single-ended HTL signals. In this
mode, drive HITH/CS high to enable the 12V (typ) thresholds or drive HITH/CS low to enable the 7V
(typ) thresholds.
In SPI mode (SPI is high), HITH/CS is the SPI chip select input.
SNGL/CLK
Single-Ended Receiver Input Select/SPI Clock Input.
In pin mode (SPI is low), SNGL/CLK selects the mode for the inputs of receivers A,B, and Z. In this
mode, drive SNGL/CLK high to enable the receivers for single-ended TTL or HTL operation. Drive
SNGL/CLK low for differential (RS-422 or DHTL) operation. See the Truth Tables for more information.
In SPI mode (SPI is high), SNGL/CLK is the SPI clock input.
TTL/SDI
TTL Mode Select Input/SPI Serial Data Input.
In pin mode (SPI is low), enables TTL operation for receivers A, B, and Z. In this mode, drive TTL/SDI
high to enable TTL or RS-422 operation. Drive TTL/SDI low to select DHTL or SEHTL operation for
those receivers.
In SPI mode (SPI is high), TTL/SDI is the serial data input.
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Maxim Integrated │ 13
MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Pin Description (continued)
PIN
NAME
FUNCTION
7
D2FAULT/
IRQ
Receiver D2 Open-Drain Fault Output/SPI IRQ Output.
In pin mode (SPI is low), D2FAULT/IRQ asserts low during a fault condition on the D2 receiver (RxD2).
In SPI mode (SPI is high), D2FAULT/IRQ asserts low when a fault bit is set. See the Serial SPI Control
section for more information.
8
BO
9
B
Non-Inverting RS-422/HTL/TTL Input for Receiver B.
10
B
Inverting Input for Receiver B. B is only used when differential mode is enabled.
11
GND
Ground
12
LO2
Receiver DI2 Output.
13
DI2
Digital/TTL Input for DI2 Receiver.
14
DI/TTL2
15
Y
16
DIY
Digital/TTL/Non-inverting RS-422 Input for Receiver Y.
17
YO
Receiver Y Output.
18
DI/TTLY
Digital Input/TTL/RS-422 Select Input for Receiver Y. See the Truth Tables for more information. DI/
TTLY has no function in SPI mode (SPI is high).
19
YFAULT
Open-Drain Fault Output for Receiver Y. YFAULT asserts low during a fault condition on receiver Y.
See the Fault Conditions section for more information.
20
ZFAULT
Open-Drain Fault Output for Receiver Z. ZFAULT asserts low during a fault condition on receiver Z.
See the Fault Conditions section for more information.
21
BFAULT
Open-Drain Fault Output for Receiver B. BFAULT asserts low during a fault condition on receiver B.
See the Fault Conditions section for more information.
22
VL
Logic Interface Supply Input. VCC must always be greater than or equal to VL.
23
SPI
Serial/Parallel Select Input. Drive SPI low to enable pin-mode operation. Drive SPI high to enable SPI
mode operation.
24
ZO
Receiver Z Output.
25
Z
Non-Inverting RS-422/HTL/TTL Input for Receiver Z.
26
Z
Inverting Input for Receiver Z. Z is only used when the receiver is configured for differential mode.
27
VCC
Supply Input. Bypass VCC to ground through a 0.1μF capacitor as close to the device as possible.
VCC must always be greater than or equal to VL.
28
LO3
Receiver D3 Output.
29
DI3
Digital/TTL Input for the D3 Receiver.
30
DI/TTL3
31
A
Inverting Input for Receiver A. A is used only when differential mode is enabled.
32
A
Non-inverting RS-422/HTL/TTL Input for Receiver A.
-
EP
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Receiver B Output.
Digital Input/TTL Select Input for DI2 Receiver. See the Truth Tables for more information. DI/TTL2 has
no function in SPI mode (SPI is high).
Inverting RS-422 Input for Receiver Y. Y is used only when differential mode is enabled.
Digital Input/TTL Select Input for the D3 Receiver. See the Truth Tables for more information. DI/TTL3
has no function in SPI mode (SPI is high).
Exposed pad. Connect EP to ground. Not intended as the primary ground connection.
Maxim Integrated │ 14
MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Truth Tables
Table 1. RxA, RxB, RxZ and RxY Receiver Settings (Pin-Control Mode)
INPUTS
RECEIVER OPERATION
SNGL/CLK
TTL/SDI
DI/TTLY
RxA, RxB, RxZ
RxY
L
L
L
D-HTL
TTL
L
L
H
D-HTL
DI
L
H
L
RS-422
RS-422
L
H
H
RS-422
DI
H
L
L
SE-HTL
TTL
H
L
H
SE-HTL
DI
H
H
L
TTL
TTL
H
H
H
TTL
DI
Table 2. RxD2 Receiver Settings (PinControl Mode)
L
RxD2 MODE OF
OPERATION
TTL
H
DI
DI/TTL2
Table 3. RxD3 Receiver Input Settings
(Pin-Control Mode)
DI/TTL3
RxD3 MODE OF
OPERATION
L
TTL
H
DI
Table 4. DI Mode Receiver Logic (RxY, RxD2, RxD3)
DIY, DI2, DI3
YO, LO2, LO3
_FAULT
-40V < VIN ≤ -18V
L
L
-18V < VIN < -15V
L
Indeterminate
-15V < VIN < +6V
L
H
+6V < VIN < +8V
Indeterminate
H
+8V ≤ VIN < +40V
H
H
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Maxim Integrated │ 15
MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Table 5. Single-Ended TTL Mode Receiver Logic
INPUT
(A, B, Z, DIY, DI2, DI3)
OUTPUT
(AO, BO ZO, YO, LO2, LO3 )
_FAULT
FAULT CONDITION
-40V < VIN < -18V
L
L
Low Input Fault
-18V < VIN < -15V
L
Indeterminate
Indeterminate
-15V < VIN < +0.8V
L
H
No Fault
+0.8V < VIN < +2.0V
Indeterminate
H
No Fault
+2.0V ≤ VIN < +15V
H
H
No Fault
+15V ≤ VIN < +18V
H
Indeterminate
Indeterminate
+18V ≤ VIN < +40V
H
L
High Input Fault
Table 6. SE-HTL Mode Receiver Logic (RxA, RxB, RxZ)
HITH
INPUT VOLTAGE
(A, B, Z)
OUTPUT STATE
(AO, BO, ZO)
_FAULT
FAULT CONDITION
L
-40V < VIN < -18V
L
L
Low Input Fault
L
-18V < VIN < -15V
L
Indeterminate
Indeterminate
L
-15V < VIN < +6V
L
H
No Fault
L
+6V < VIN < +8V
Indeterminate
H
No Fault
L
+8V ≤ VIN < +40V
H
H
No Fault
H
-40V < VIN < -18V
L
L
Low Input Fault
H
-18V < VIN < -15V
L
Indeterminate
Indeterminate
H
-15V < VIN < +11V
L
H
No Fault
H
+11V < VIN < +13V
Indeterminate
H
No Fault
H
+13V ≤ VIN < +40V
H
H
No Fault
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Maxim Integrated │ 16
MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Table 7. D-HTL Mode Receiver Logic (RxA, RxB, RxZ)
DIFFERENTIAL
INPUT VOLTAGE
SINGLE-ENDED INPUT
VOLTAGE
(A, A, B, B, Z, Z)
OUTPUT STATE
(AO, BO, ZO)
_FAULT
FAULT CONDITION
VID > +2V
H
H
No Fault
+1.2V < VID < +2V
H
Indeterminate
Indeterminate
Indeterminate
L
Low Differential Input Voltage Fault
-2V ≤ VID ≤ -1.2V
L
Indeterminate
Indeterminate
VID ≤ -2V
L
H
No Fault
-10V < VSE
-0.9V ≤ VID ≤ +0.9V
X
-18V < VSE < -15V
VALID*
Indeterminate
Single-Ended Voltage Fault
X
-40V < VSE < -18V
VALID*
L
Single-Ended Voltage Fault
X = Don’t care
*Receiver operates normally, although thresholds may deviate from limits in Electrical Characteristics Table
Table 8. RS-422 Mode Receiver Logic (RxA, RxB, RxZ, RxY)
DIFFERENTIAL INPUT
VOLTAGE
SINGLE-ENDED
INPUT VOLTAGE
(A, A, B, B, Z, Z, Y, Y)
VID > +0.45V
+0.27V < VID < +0.45V +0.45V
OUTPUT
STATE
(AO, BO,
ZO, YO)
_FAULT
FAULT CONDITION
H
H
No Fault
H
Indeterminate
Indeterminate
Indeterminate
L
Low Differential Input Voltage Fault
-0.45V ≤ VID ≤ -0.27V
L
Indeterminate
Indeterminate
VID ≤ -0.45V
L
H
No Fault
-0.2V ≤ VID ≤ +0.2V
-20V ≤ VSE ≤ +20V
X
-40V < VSE < -18V
VALID*
L
Single-Ended Voltage Fault
X
-18V < VSE < -15V
VALID*
Indeterminate
Single-Ended Indeterminate
Voltage
X
+15V < VSE < +18V
VALID*
Indeterminate
Single-Ended Indeterminate
Voltage
X
+18V < VSE < +40V
VALID*
L
Single-Ended Voltage Fault
X = Don’t care
*Receiver operates normally, although thresholds may deviate from limits in Electrical Characteristics Table
www.maximintegrated.com
Maxim Integrated │ 17
MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Detailed Description
The MAX14890E is an incremental encoder receiver
containing four differential receivers and two single-ended
receivers. All four differential receivers support RS-422
and TTL operation. Three of these differential receivers
can be configured for differential and single-ended HTL
operation. In RS-422 mode, these receivers feature a
wide common mode input range of -20V to +20V making
it resilient to common mode noise.
The auxiliary IEC 61131-2 Type-1/Type-3 24V digital
inputs allow connection of proximity sensors. The digital
inputs can be individually configured for TTL operation.
All receiver input signals are fault protected to voltage
shorts in the ±40V range. Per channel fault detection provides warning of irregular conditions, like small differential
signals, shorts, opens, over- and undervoltages.
SPI or Pin-Control Mode Selection
The MAX14890E provides a selectable SPI or pin interface to set the input thresholds and functionality of the
receivers. Drive SPI high to use the SPI interface. Drive
SPI low to use the pin interface.
SPI mode allows for higher flexibility by allowing individual
receiver configuration. See the Serial SPI Control section
for more information.
In pin-control mode, drive the TTL/SDI input low and the
SNGL/CLK input high to enable SE-HTL mode on the
RxA, RxB, and RxZ receivers.
In SPI mode, each of the RxA, RxB, and RxZ receivers
can be individually enabled for SE-HTL functionality. See
the Serial SPI Control section for more information.
Differential HTL (D-HTL) Operation
The RxA, RxB, and RxZ receivers can be configured
for D-HTL operation. Input signals up to ±40V can be
accepted in D-HTL mode.
In pin-control mode, set the SNGL/CLK and TTL/SDI
inputs low to enable D-HTL functionality for the RxA, RxB,
and RxZ receivers. See the Truth Tables section for more
information.
In SPI mode, each of the RxA, RxB, and RxZ receivers
can be individually enabled for D-HTL functionality. See
the Serial SPI Control section for more information.
RS-422 Operation
The RxA, RxB, RxZ, and RxY receivers can be configured
for RS-422 operation. These receivers include a wide
common-mode input range (-20V to +20V) in this mode.
TTL Operation
In pin-control mode, set the SNGL/CLK input low and the
TTL/SDI input high to enable RS-422 functionality for the
RxA, RxB, RxZ, and RxY receivers. See the Truth Tables
section for more information.
All 6 of the receivers can be configured for single-ended TTL
operation. Complimentary/unused inputs can be left unconnected in all single-ended modes like TTL, DI, and SE-HTL.
In SPI mode, each receiver can be individually enabled
for RS-422 functionality. See the Serial SPI Control section for more information.
In pin-control mode, drive the TTL/SDI and SNGL/CLK
inputs high to enable TTL operation on the RxA, RxB, and
RxZ receivers. To enable TTL operation on RxY receiver, set
DI/TTLY low. To enable TTL operation on the RxD2 or RxD3
receivers, drive the DI/TTL2 or DI/TTL3 inputs low. See the
Truth Tables section for more information.
Equivalent Input Circuit
In SPI mode, each receiver can be enabled for TTL operation individually. Set the associated _SNGL and _TTL bits
to enable TTL mode for each receiver. See the Serial SPI
Control section for more information.
Single-Ended HTL Operation (SE-HTL)
The RxA, RxB, and RxZ receivers can be configured for
single-ended HTL operation. Complimentary/unused inputs
can be left unconnected in all single-ended modes (TTL, DI,
and SE-HTL).
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In RS-422, TTL, SE-HTL, and D-HTL modes, the inputs
pins have the equivalent circuit shown in Figure 5. When
the RxA, RxB, RxZ, and/or RxY inputs are configured for
TTL mode and are open/not connected, the input is pulled
up to 2.64V (typ), resulting in a logic high on the receiver
output.
RxD2 and RxD3 have high impedance inputs in TTL
mode (Figure 6). Leaving DI2 or DI3 unconnected in this
mode will result in an unknown logic state on the receiver
output .
Detecting Faults
Signal integrity from the encoder is essential for reliable
system operation. Degraded signals could cause problems ranging from simple miscounts to loss of position.
The MAX14890E detects common RS-422/HTL/TTL/DI
faults. These faults include low differential input signals,
Maxim Integrated │ 18
MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
open-wire, short-circuits and input voltages that are outside
normal operating voltage ranges (below -18V and above
+18V). See the Truth Tables for more information.
Detecting Small Differential Signals
In RS-422 and differential HTL (D-HTL) modes, the
receivers detect small DC and AC signals. Small DC signals can occur due to open wires or shorts, both of which
are explained in the following sections. Small differential
AC signals can result due to cable attenuation of long or
inadequate cables, or due to poor wiring.
Detecting Short Circuit and Open-Circuit Faults
(RS-422 and D-HTL Operation)
The MAX14890E receivers detect short circuits on the
inputs in RS-422 and D-HTL modes. When the A and A
inputs are shorted together, the differential input voltage is
0V, generating a low differential input voltage fault (Figure 7).
Open-circuit detection is similar to detecting a short-circuit
condition and relies on the differential termination resistor
across the receiver inputs. When an input is open, the
termination resistor pulls the non-inverting and inverting
inputs to the same voltage, generating a fault condition.
A
A
NORMAL OPERATION
SHORT CIRCUIT A TO A
Figure 7. Short Circuit Detection
The _FAULT output asserts when either a short-circuit or
open-circuit conditions is detected.
Thermal Shutdown
The MAX14890E enters thermal shutdown when the chip
temperature rises to above 160°C (typ). Receiver outputs
are undefined and the _FAULT outputs are off when the
device is in thermal shutdown.
Serial SPI Control
SPI Interface
MAX14890 E
2.64V
72.5kΩ
IN
IN = A, A, B, B, Z, Z, DIY, Y
Figure 5. Equivalent Input Circuit for TTL, RS-422, SE-HTL and
D-HTL Modes (RxA, RxB, RxZ, RxY)
MAX14890E
1.65V
3.17MΩ
IN
IN = DI2, DI3
Figure 6. Equivalent Input Circuit for RxD2 and RxD3 in TTL
Mode
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The MAX14890E can be configured and monitored through
an SPI interface. The SPI interface allows for greater flexibility for independent receiver mode configuration.
Drive the SPI input high to enable SPI functionality. The
AFAULT, BFAULT, ZFAULT, YFAULT and receiver outputs (AO, BO, ZO, YO, LO2 and LO3) are operational in
SPI mode. All configuration bits are 0 (default) when SPI
is pulled high, setting RxA, RxB, and RxZ in D-HTL mode,
RxY in RS-422 mode, and RxD2 and RxD3 in TTL mode.
After SPI is pulled high, all D3FAULT/SDO data is 0s
during the first SPI cycle.
The MAX14890E samples the TTL/SDI input on the rising
edge of the SNGL/CLK signal, while D3FAULT/SDO is
generated on the falling edge of the SNGL/CLK.
The HITH/CS SPI chip select input signal features a glitch
filter that improves robustness against EMI, requiring a
longer setup time.
The MAX14890E must receive at least 16 clock pulses
on SNGL/CLK between the HITH/CS falling edge and the
HITH/CS rising edge (SPI command transfer). If less than
16 pulses are received, the device ignores the TTL/SDI
data received. If more than 16 pulses are received, only
the last 16 bits of data before HITH/CS rises are utilized.
Figure 8 shows a standard SPI cycle.
Maxim Integrated │ 19
MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
HITH/CS
SNGL/CLK
TTL/SDI
X
CMD2
DO[15]
D3FAULT/SDO
CMD1
CMD0
DI[10]
DI[9]
DI[8]
DI[7]
DI[6]
DI[5]
DI[4]
DI[3]
DI[2]
DI[1]
DI[0]
DO[14] DO[13] DO[12] DO[11] DO[10]
DO[9]
DO[8]
DO[7]
DO[6]
DO[5]
DO[4]
DO[3]
DO[2]
DO[1]
DO[0]
DI[12]
DI[11]
Figure 8. Standard SPI Cycle
The 16 bits of D3FAULT/SDO data generated by the
MAX14890E depend on the previously received SPI
command. If more than 16 SNGL/CLK cycles are present
during an SPI cycle, D3FAULT/SDO will output the data
received on TTL/SDI with a 16 bit latency, allowing for
daisy-chain transfers.
Register Functionality
Three command bits (CMD[2:0]) and 13 mode selection
bits control the individual receiver input thresholds and
output behavior on the MAX14890E in SPI mode. Table
10 shows the functionality of the CMD[2:0] bits.
Change Configuration with Detailed Fault Readback
Command (CMD[2:0] = 101)
TTL/SDI, SNGL/CLK, and DI. See Tables 11-14 for more
information.
The HITH bit enables/disables the single-ended HTL
thresholds for all receivers set in HTL mode.
See the Fault Filtering section for more information on the
FLTR bit.
The detailed fault readback consists of 16 D3FAULT/
SDO bits. The ADFLT, BDFLT, ZDFLT, YDFLT bits are set
when a differential fault error occurs for each receiver.
The AFLT, AFLT, BFLT, BFLT, ZFLT, ZFLT, YFLT, DIYFLT,
D2LFLT, D2HFLT, D3LFLT, D3HFLT bits are set when
a single-ended voltage fault occurs for each input. See
Table 15.
Write 101 to bits CMD[2:0] to enable configuring the individual receivers through the SPI interface (Figure 9). Bit
settings are equivalent to the hardware inputs, HITH/CS,
Table 10. SPI Command Bit Settings
CMD2
CMD1
CMD0
CHANGES
CONFIGURATION?
FUNCTION
1
0
1
YES
Change configuration. New configuration is set by bits DI[13:0]. Read
detailed fault status is the next SPI cycle.
See the Change Configuration with Detailed Fault Readback Command
section for more information.
0
1
0
NO
Read current fault output and receiver outputs in next SPI cycle.
See the Fault and Receiver Status Command section for more
information.
1
NO
Read current configuration in next SPI cycle. Do not change
configuration.
See the Readback Current Receiver Command section for more
information.
000, 001, 011, 100,110
NO
Read detailed fault status in next SPI cycle. Do not change configuration.
See the Detailed Fault Readback section for more information.
1
1
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Maxim Integrated │ 20
MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
SPI COMMAND CYCLE
HITH/CS
SNGL/CLK
TTL/SDI
X
1
X
D3FAULT/SDO
0
1
HITH
ATTL
ASNGL
BTTL
BSNGL
ZTTL
ZSNGL
ZDI
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
AFLT
ADFLT
BFLT
BFLT
BDFLT
ZFLT
ZDFLT
YFLT
DIYFLT
YDFLT
YTTL YSNGL
D2DI
D3DI
FLTR
X
X
X
X
X
X
X
X
SPI FOLLOW-ON CYCLE
HITH/CS
SNGL/CLK
TTL/SDI
D3FAULT/SDO
X
X
AFLT
ZFLT
D2LFLT D2HFLT D3LFLT D3HFLT
X = Unknown/Don’t care
Figure 9. Change Configuration with Detailed Fault Readback SPI Command
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Maxim Integrated │ 21
MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Fault and Receiver Status Command
(CMD[2:0] = 010)
_FAULT bits are set when a differential or single-ended
fault occurs on a receiver. See the Fault Diagnostics
section for more information.
Write 010 to bits CMD[2:0] to read the fault and receiver
output status (Figure 10). The fault and receiver status
is latched at the high-to-low transition on HITH/CS of the
following SPI cycle and is output on that SPI cycle. The
SPI COMMAND CYCLE
HITH/CS
SNGL/CLK
X
TTL/SDI
1
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
D3FAULT/SDO
SPI FOLLOW-ON CYCLE
HITH/CS
SNGL/CLK
TTL/SDI
D3FAULT/SDO
X
X
0
X
X
X
1
0
0
X
X
X
X
X
X
AFAULT BFAULT ZFAULT YFAULT D2FAULT D3FAULT
X
X
X
X
X
X
AO
BO
ZO
YO
LO2
LO3
X = Don’t care
Figure 10. Current Fault and Receiver Status Readback SPI Command
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Maxim Integrated │ 22
MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Readback Current Receiver Command
(CMD[2:0] = 111)
and the receiver’s _FAULT output assert 1ms (typ) after
the fault is detected.
Write 111 to bits CMD[2:0] to read the current receiver
configuration (Figure 11). See Table 11 thru Table 14 for
more information.
The 1ms filter is always active for single-ended faults, but
can be enabled or disabled for differential faults. Set the
global configuration filter bit, FLTR, to 1 to enable the fault
filter for differential (_DFLT) faults.
Fault Filtering
Set FLTR = 0 to disable the filter. D3FAULT/IRQ and
_FAULT assert 10μs (typ) after the fault is detected when
the filter is disabled.
In SPI mode, the interrupt output (D3FAULT/IRQ) asserts
when a fault is detected on any receiver. D3FAULT/IRQ
SPI COMMAND CYCLE
HITH/CS
SNGL/CLK
X
TTL/SDI
1
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
X
D3FAULT/SDO
SPI FOLLOW-ON CYCLE
HITH/CS
SNGL/CLK
TTL/SDI
D3FAULT/SDO
X
X
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
1
HITH
ATTL
ASNGL
BTTL
BSNGL
ZTTL
ZSNGL
ZDI
YTTL
YSNGL
D2DI
D3DI
FLTR
X = Don’t care
Figure 11. Receiver Configuration Readback SPI Command
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Maxim Integrated │ 23
MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Table 11. SPI Mode RxA, RxB Selection Bits
_SNGL
_TTL
RxA, RxB RECEIVER
OPERATION
0
0
D-HTL
0
1
RS-422
1
0
SE-HTL
1
1
TTL
Table 12. SPI Mode RxZ Selection Bits
RxZ RECEIVER
OPERATION
ZTTL
ZSNGL
ZDI
0
0
0
D-HTL
0
1
0
SE-HTL
1
0
0
RS-422
1
1
0
TTL
X
X
1
DI
X = Don’t care
Table 13. SPI Mode RxY Selection Bits
YTTL
YSNGL
RxY RECEIVER OPERATION
0
0
RS-422
0
1
DI
1
0
RS-422
1
1
TTL
Fault Diagnostics
In SPI mode, the interrupt output (D3FAULT/IRQ) and
associated _FAULT output asserts when a fault is detected on any receiver. _FAULT deasserts when the fault is
removed, but D3FAULT/IRQ remains latched until the
fault status is read through the SPI interface.
If the fault is not cleared, D3FAULT/IRQ deasserts after
the SPI read command, but the associated fault bit and
_FAULT output remain asserted.
Applications Information
Cable Termination
Transmission line termination is required for RS-422,
HTL, and TTL high-speed signals on long cables. For
RS-422 and TTL signal levels, 120Ω termination is commonly used to match the characteristic impedance of the
cable. For HTL signals, 270Ω/100pF AC-termination with
a series RC can be applied to reduce power dissipation.
Figure 12 shows a sample circuit of a termination scheme
to suit all of these operating modes. The 270Ω termination
can be permanently left in for all operating modes. For
high-speed RS-422 and TTL signals, the cable should
be terminated by its characteristic impedance to reduce
reflections. This can be done by switching in the parallel
resistor in these modes using a beyond-the-rails switch
like the MAX14777.
IN
Table 14. SPI Mode RxD2, RxD3 Selection
Bits
D_DI
RxD2, RxD3 RECEIVER
OPERATION
0
TTL
1
DI
216Ω
270Ω
RECEIVER
OUT
MAX14777
IN
Figure 12. Sample Termination Scheme for HTL, RS-422, and
TTL modes
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Maxim Integrated │ 24
MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Table 15. Detailed Fault Readback Bit Status
BIT
NAME
15
AFLT
0 = No fault asserted.
1 = Single-ended fault on A detected by the RxA receiver.
14
AFLT
0 = No fault asserted.
1 = Single-ended fault on A detected by the RxA receiver.
13
ADFLT
12
BFLT
0 = No fault asserted.
1 = Single-ended fault on B detected by the RxB receiver.
11
BFLT
0 = No fault asserted.
1 = Single-ended fault on B detected by the RxB receiver.
10
BDFLT
9
ZFLT
0 = No fault asserted.
1 = Single-ended fault on Z detected by the RxZ receiver.
8
ZFLT
0 = No fault asserted.
1 = Single-ended fault on Z detected by the RxZ receiver.
7
ZDFLT
6
YFLT
5
DIYFLT
0 = No fault asserted.
1 = Single-ended fault on DIY detected by the RxY receiver.
4
YDFLT
0 = No fault asserted.
1 = Differential fault detected on RxY.
3
D2LFLT
0 = No fault asserted.
1 = Single-ended low-voltage fault on DI2 detected by the RxD2 receiver.
2
D2HFLT
0 = No fault asserted.
1 = Single-ended high-voltage fault on DI2 detected by the RxD2 receiver. Only in TTL mode.
1
D3LFLT
0 = No fault asserted.
1 = Single-ended low-voltage fault on DI3 detected by the RxD3 receiver.
0
D3HFLT
0 = No fault asserted.
1 = Single-ended high-voltage fault on DI3 detected by the RxD3 receiver. Only in TTL mode.
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DESCRIPTION
0 = No fault asserted.
1 = Differential fault detected on RxA.
0 = No fault asserted.
1 = Differential fault detected on RxB.
0 = No fault asserted.
1 = Differential fault detected on RxZ.
0 = No fault asserted.
1 = Single-ended fault on Y detected by the RxY receiver.
Maxim Integrated │ 25
MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
3.3V to 5V
5V
VL
VCC
ENCODER
D-HTL A
D-HTL B
D-HTL Z
270Ω
A
100pF
270Ω
100pF
RxA
RxB
RxZ
DI FAULT
Y
PROXIMITY
SENSOR
DI2
PROXIMITY
SENSOR
DI3
RxY
RxD3
5V
YO
YFAULT
RxD2
5V
ZO
ZFAULT
DIY
5V
BO
BFAULT
Z
Z
AO
AFAULT
B
B
270Ω
100pF
A
5V
ASIC
LO2
LO3
MAX14890
SNGL/CLK = 0
TTL/SDI = 0
DI/TTLY = 1
DI/TTL2 = 1
DI/TTL3 = 1
COUNTER/
MOTOR
CONTROLLER
Figure 13. Encoder Circuit with Differential HTL (D-HTL) Signals and DI Alarm Signal
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Maxim Integrated │ 26
MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
3.3V to 5V
5V
ENCODER
VL
VCC
SE-HTL A
SE-HTL B
SE_HTL Z
270Ω
100pF
A
270Ω
100pF
RxA
RxB
RxZ
Y
PROXIMITY
SENSOR
DO
DI2
PROXIMITY
SENSOR
DO
DI3
BO
5V
ZO
5V
ZFAULT
DIY
DI FAULT
5V
BFAULT
Z
Z
AO
AFAULT
B
B
270Ω
100pF
A
RxY
YO
5V
YFAULT
RxD2
RxD3
ASIC
LO2
LO3
SNGL/CLK = 1
TTL/SDI = 0
DI/TTLY = 1
DI/TTL2 = 1
DI/TTL3 = 1
MAX14890
MOTOR
CONTROLLER
Figure 14. Encoder Circuit with Single-Ended HTL (SE-HTL) Signals and DI Alarm Signal
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Maxim Integrated │ 27
MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
3.3V to 5V
5V
ENCODER
VL
VCC
A
TTL A
120Ω
A
RxA
AFAULT
B
TTL B
120Ω
B
RxB
120Ω
Z
RxZ
TTL ALARM
120Ω
Y
PROXIMITY
SENSOR
TTL
DI2
PROXIMITY
SENSOR
TTL
DI3
RxY
RxD3
MAX14890
5V
YO
YFAULT
RxD2
5V
ZO
ZFAULT
DIY
5V
BO
BFAULT
Z
TTL Z
AO
5V
ASIC
LO2
LO3
SNGL/CLK = 1
TTL/SDI = 1
DI/TTLY = 0
DI/TTL2 = 0
DI/TTL3 = 0
MOTOR
CONTROLLER
Figure 15. Encoder Circuit with TTL Signals and DI Alarm Signal
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Maxim Integrated │ 28
MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Functional Diagram
VCC
VL
SPI
MAX14890E
CONFIG/
MONITOR
HITH/CS
TTL/SDI
SNGL/CLK
D2FAULT/IRQ
D3FAULT/SDO
A
RxA
A
AO
AFAULT
B
RxB
B
BO
BFAULT
Z
2.5mA
Z
RxZ
ZO
ZFAULT
DI/TTLY
DIY
2.5mA
Y
RxY
YO
YFAULT
DI/TTL2
DI2
RxD2
LO2
2.5mA
DI/TTL3
DI3
RxD3
LO3
2.5mA
GND
Ordering Information
PART
TEMP RANGE
Chip Information
PIN PACKAGE
MAX14890EATJ+
-40°C to +125°C
32 TQFN-EP
MAX14890EATJ+T
-40°C to +125°C
32 TQFN-EP
+Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
*EP = Exposed pad.
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PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
32 TQFN-EP
T3255+6
21-0140
90-0603
Maxim Integrated │ 29
MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Revision History
REVISION
NUMBER
REVISION
DATE
0
3/15
DESCRIPTION
Initial release
PAGES
CHANGED
—
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
© 2015 Maxim Integrated Products, Inc. │ 30
