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MAX174BC/D-C10306

MAX174BC/D-C10306

  • 厂商:

    AD(亚德诺)

  • 封装:

  • 描述:

    IC ADC

  • 数据手册
  • 价格&库存
MAX174BC/D-C10306 数据手册
EVALUATION KIT AVAILABLE Click here for production status of specific part numbers. MAX174/MX574A/ MX674A Industry-Standard, Complete 12-Bit ADCs General Description Features The MAX174/MX574A/MX674A are complete 12-bit analog-to-digital converters (ADCs) that combine high speed, low-power consumption, and on-chip clock and voltage reference. The maximum conversion times are 8μs (MAX174), 15μs (MX674A), and 25μs (MX574A). Maxim’s BiCMOS construction reduces power dissipation 3 times (150mW) over comparable devices. The internal buried zener reference provides low-drift and low-noise performance. External component requirements are limited to only decoupling capacitors and fixed resistors. The versatile analog input structure allows for 0 to +10V or 0 to +20V unipolar or ±5V or ±10V bipolar input ranges with pin strapping. ●● Complete ADC with Reference and Clock ●● 12-Bit Resolution and Linearity ●● No Missing Codes Over Temperature ●● 150mW Power Dissipation ●● 8μs (MAX174), 15μs (MX674A), and 25μs (MX574A) Max Conversion Times ●● Precision Low TC Reference: 10ppm/°C ●● Monolithic BiCMOS Construction ●● 150ns Maximum Data Access Time Applications ●● ●● ●● ●● The MAX174/MX574A/MX674A use standard microprocessor interface architectures and can be interfaced to 8-, 12-, and 16-bit wide buses. Three-state data outputs are controlled by CS, CE, and R/C logic inputs. Digital Signal Processing High-Accuracy Process Control High-Speed Data Acquisition Electro-Mechanical Systems Ordering Information appears at end of data sheet. Functional Diagram VL DGND 1 VCC 15 BIPOFF VEE 7 11 10VIN 20VIN 12 13 R REFIN 10 14 5kΩ 2R 9.950kΩ 5kΩ 12-BIT DAC AGND REFOUT 9 8 12 SAR +10V REF MAX174 MX574A MX674A 4 4 16 D0 19-2765; Rev 4; 6/18 4 LOW NIBBLE MIDDLE NIBBLE 19 D3 20 D4 HIGH NIBBLE 23 D7 24 D8 2 CLOCK AND CONTROL LOGIC 27 D11 28 6 3 4 5 STS CE R/C 12/8 CS A0 MAX174/MX574A/ MX674A Industry-Standard, Complete 12-Bit ADCs Absolute Maximum Ratings VCC to DGND.............................................................. 0 to 16.5V VEE to DGND.............................................................. 0 to 16.5V VL to DGND...................................................................... 0 to 7V DGND to AGND......................................................................±1V Control Inputs to DGND (CE, CS, A0, 12/8, R/C)........................ -0.3V to (VCC + 0.3V) Digital Output Voltage to DGND (DB11–DB0, STS).................................... -0.3V to (VL + 0.3V) Analog Inputs to AGND (REFIN, BIPOFF, 10VIN)............±16.5V 20VIN to AGND.....................................................................±24V REFOUT....................................Indefinite short to VCC or AGND Power Dissipation (any package) to +75°C...................1000mW Derates above +75°C................................................10mW/°C Operating Temperature Ranges MAX174_C, MX_74AJ/K/L......................................0 to +70°C MAX174_E, MX_74AJE/KE/LE....................... -40°C to +85°C MAX174_M, MX_74AS/T/U........................... -55°C to +125°C Storage Temperature Range............................. -55°C to +160°C Lead Temperature (soldering, 10s).................................. +300°C Soldering Temperature (reflow) PDIP, Wide SO............................................................. +260°C PLCC............................................................................+245°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Electrical Characteristics—MAX174 (VL = +5V, VEE = +15V or +12V, VEE = -15V or -12V, TA = +25°C, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS ACCURACY Resolution RES 12 TA = +25°C Integral Nonlinearity Differential Nonlinearity Unipolar Offset Error (Note 1) Bipolar Offset Error (Notes 2, 3) INL DNL TA = TMIN to TMAX MAX174A/B MAX174C Bits ±1/2 ±1 MAX174AC/BC ±1/2 MAX174AE/BE/AM/BM ±3/4 MAX174C ±1 12 bits, no missing codes over temperature ±1 MAX174A/B ±1 MAX174C ±2 MAX174A ±3 MAX174B/C ±4 Full-Scale Calibration Error (Note 3) LSB ±0.25 LSB LSB LSB % TEMPERATURE COEFFICIENTS (Using Internal Reference) (Notes 2, 3, 4) Unipolar Offset Change Bipolar Offset Change www.maximintegrated.com MAX174A/B ±1 MAX174C ±2 MAX174AC/BC ±1 MAX174CC ±2 MAX174AE/AM ±1 MAX174BE/BM ±2 MAX174CE/CM ±4 LSB LSB Maxim Integrated │  2 MAX174/MX574A/ MX674A Industry-Standard, Complete 12-Bit ADCs Electrical Characteristics—MAX174 (continued) (VL = +5V, VEE = +15V or +12V, VEE = -15V or -12V, TA = +25°C, unless otherwise noted.) PARAMETER SYMBOL Full-Scale Calibration Change CONDITIONS MIN TYP MAX MAX174AC ±2 (10) MAX174BC ±5 (27) MAX174CC ±9 (50) MAX174AE ±7 (19) MAX174BE ±10 (38) MAX174CE ±20 (75) MAX174AM ±5 (12) MAX174BM ±10 (25) MAX174CM ±20 (50) UNITS LSB (ppm/°C INTERNAL REFERENCE MAX174A 9.98 10.00 10.02 MAX174B/C 9.97 10.00 10.03 Output Voltage No load Output Current (Note 5) Available for external loads, in addition to REFIN and BIPOFF load V 2 mA MAX UNITS Electrical Characteristics—MX574A, MX674A (VL = + 5V, VEE = +15V or +12V, VEE = -15V or -12V, TA = +25°C, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP ACCURACY Resolution RES 12 TA = +25°C Integral Nonlinearity INL TA = TMIN to TMAX Differential Nonlinearity Unipolar Offset Error (Note 1) Bipolar Offset Error (Notes 2, 3) Full-Scale Calibration Error (Note 3) DNL MX574AK/L/T/U, MX674AK/L/T/U MX574AJ/S, MX674AJ/S Bits ±1/2 ±1 MX574AK/L/KE/LE ±1/2 MX674AK/L/KE/LE ±1/2 MX574AT/U, MX674AT/U ±3/4 MX574AJ/S, MX674AJ/S ±1 12 bits, no missing codes over temperature ±1 MX574AK/L/T/U, MX674AK/L/T/U ±1 MX574AJ/S, MX674AJ/S ±2 MX574AL/U, MX674AL/U ±3 MX574AJ/K/S/T, MX674AJ/K/S/T ±4 MX574AL/U ±0.125 MX574AJ/K/S/T, MX674A ±0.25 LSB LSB LSB LSB % TEMPERATURE COEFFICIENTS (Using Internal Reference) (Notes 2, 3, 4) Unipolar Offset Change www.maximintegrated.com MX574AK/L/T/U, MX674AK/L/T/U ±1 MX574AJ/S, MX674AJ/S ±2 LSB Maxim Integrated │  3 MAX174/MX574A/ MX674A Industry-Standard, Complete 12-Bit ADCs Electrical Characteristics—MX574A, MX674A (continued) (VL = +5V, VCC = +15V or +12V, VEE = -15V or -12V, TA = +25°C, unless otherwise noted.) PARAMETER SYMBOL Bipolar Offset Change CONDITIONS MIN TYP MAX MX574AK/L, MX674AK/L ±1 MX574AJ, MX674AJ ±2 MX574AU/LE, MX674AU/LE ±1 MX574AT/KE, MX674AT/KE ±2 MX574AS/JE, MX674AS/JE Full-Scale Calibration Change UNITS LSB ±4 MX574AL, MX674AL ±2 (10) MX574AK, MX674AK ±5 (27) MX574AJ, MX674AJ ±9 (50) MX574ALE, MX674ALE ±7 (19) MX574AKE, MX674AKE ±10 (38) MX574AJE, MX674AJE ±20 (75) MX574AU, MX674AU ±5 (12) MX574AT, MX674AT ±10 (25) MX574AS, MX674AS ±20 (50) LSB (ppm/°C INTERNAL REFERENCE MX574AL/U 9.99 10.00 10.01 MX574AJ/K/S/T, MX674AL/U 9.98 10.00 10.02 MX674AJ/K/S/T 9.97 10.00 10.03 Output Voltage No load Output Current (Note 5) Available for external loads, in addition to REFIN and BIPOFF load V 2 mA MAX UNITS Electrical Characteristics—MAX174/MX574/MX674A (VL = +5V, VCC = +15V or +12V, VEE = -15V or -12V, TA = +25°C, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP ANALOG INPUT Bipolar Input Range Unipolar Input Range Input Impedance Using 10V input ±5 Using 20V input ±10 Using 10V input 0 +10 Using 20V input 0 +20 10V input 3 5 7 20V input 6 10 14 MAX174A/B, MX_74AK/L/TU ±1/8 ±1 MAX174C, MX_74AJ/S ±1/8 ±2 V V kΩ POWER-SUPPLY REJECTION (Max Change in Full-Scale Calibration) VCC Only 15V ±1.5V or 12V ±0.6V VEE Only 15V ±1.5V or 12V ±0.6V ±1/8 ±1/2 LSB 5V ±0.5V ±1/8 ±1/2 LSB 0.8 V VL Only LOGIC INPUTS Input Low Voltage Input High Voltage www.maximintegrated.com VIL VIH CS, CE, R/C, A0, 12/8 CS, CE, R/C, A0, 12/8 2.0 LSB V Maxim Integrated │  4 MAX174/MX574A/ MX674A Industry-Standard, Complete 12-Bit ADCs Electrical Characteristics—MAX174/MX574/MX674A (continued) (VL = +5V, VCC = +15V or +12V, VEE = -15V or -12V, TA = +25°C, unless otherwise noted.) PARAMETER Input Current Input Capacitance LOGIC OUTPUTS Output Low Voltage Output High Voltage Floating State Leakage Current Floating State Output Capacitance CONVERSION TIME 12-Bit Cycle 8-Bit Cycle SYMBOL IIN CIN CONDITIONS CS, CE, R/C, A0, 12/8, VIN = 0 to VL CS, CE, R/C, A0, 12/8 VOL DB11–DB0, STS ILKG DB11–DB0, STS VOH COUT tCONV MIN DB11–DB0, STS DB11–DB0 ISINK = 1.6mA ISOURCE = 500µA TYP MAX UNITS ±5 µA 7 pF 0.4 4 VOUT = 0 to VL V V ±10 8 µA pF MX574A 15 20 25 MX674A 9 12 15 MAX174 6 7 8 MX574A 10 14 18 tCONV MX674A MAX174 6 8 11 4 5 6 µs µs POWER REQUIREMENTS VCC Operating Range 11.4 VEE Operating Range VL Operating Range VCC Supply Current (Note 5) ICC VEE Supply Current (Note 5) Power Dissipation (Note 5) IEE VL Supply Current (Note 5) Note Note Note Note Note IL PD VCC = +15V and VEE = -15V 16.5 V 4.5 5.5 V -11.4 -16.5 V 3 5 mA 3 8 mA 6 10 mA 150 265 mW 1: Adjustable to zero. 2: With 50Ω fixed resistor from REFOUT to BIPOFF. Adjustable to zero. 3: With 50Ω fixed resistor from REFOUT to REFIN. Adjustable to zero. 4: Maximum change in specification from TA = +25°C to TMIN or TA = +25°C to TMAX. 5: External load current should not change during a conversion. For ±12V supply operation, REFOUT need not be buffered except when external load in addition to REFIN and BIPOFF inputs have to be driven. www.maximintegrated.com Maxim Integrated │  5 MAX174/MX574A/ MX674A Industry-Standard, Complete 12-Bit ADCs Timing Characteristics—MAX174/MX574A/MX674A (Note 6) (VL = +5V, VCC = +15V or +12V, VEE = -15V or -12V.) PARAMETER TA = -40°C TO +85°C TA = -55°C TO +125°C TA = 0°C TO +70°C UNITS TA = +25°C SYMBOL CONDITIONS MIN TYP MAX 100 200 MIN TYP MAX MIN TYP MAX CONVERT START TIMING—FULL CONTROL MODE STS Delay from CE tDSC CE Pulse Width tHEC CL = 50pF 50 CS to CE Setup tSSC CS Low During CE High tHSC R/C to CE Setup 15 250 320 ns 50 50 ns 50 50 50 ns 50 50 50 ns tSRC 50 50 50 ns R/C Low During CE High tHRC 50 50 50 ns A0 to CE Setup tSAC 0 0 0 ns A0 Valid During CE High tHAC 50 50 50 ns READ TIMING—FULL CONTROL MODE Access Time (From CE) tDD Data Valid After CE Low tHD Output Float Delay CL = 100pF 60 25 120 40 tHL 150 20 75 200 15 100 ns ns 120 ns CS to CE Setup tSSR 50 50 50 ns R/C to CE Setup tSRR 0 0 0 ns A0 to CE Setup tSAR 50 50 50 ns CS Valid After CE Low tHSR 0 0 0 ns R/C High After CE Low tHRR 0 0 0 ns A0 Valid After CE Low tHAR 0 0 0 ns tHRL 50 50 50 ns STAND-ALONE MODE Low R/C Pulse Width STS Delay from R/C Data Valid After R/C Low STS Delay After Data Valid tDS 115 tHDR tHS High R/C Pulse Width tHRH Data Access Time tDDR 15 200 250 20 320 25 40 MX574A 300 600 1000 300 1000 300 1000 MX674A 30 320 600 30 600 30 600 MAX174 30 140 300 30 300 30 400 60 120 150 CL = 100pF 15 150 ns 200 150 ns ns ns 200 ns Note 6: Timing specifications guaranteed by design. All input control signals specified with tR = tF = 5ns (10% to 90% of +5V) and timed from a voltage level of +1.6V. See loading circuits in Figures 1 and 2. www.maximintegrated.com Maxim Integrated │  6 MAX174/MX574A/ MX674A Industry-Standard, Complete 12-Bit ADCs +5V +5V 3kΩ DN DN 3kΩ 3kΩ DN DN 100pF 100pF 3kΩ HIGH-Z TO LOGIC 1 HIGH-Z TO LOGIC 1 Figure 1. Load Circuit for Access Time Test 100pF 100pF LOGIC 0 TO HIGH - Z LOGIC 1 TO HIGH - Z Figure 2. Load Circuit for Output Float Delay Test Pin Configurations TOP VIEW + 12/8 2 27 D11 12/8 VL STS D11 D10 TOP VIEW CS 28 STS A0 VL 1 CS 3 26 D10 4 3 2 1 28 27 26 A0 4 25 D9 24 D8 R/C 5 25 D9 23 D7 CE 6 24 D8 20 D4 19 D3 VEE 11 18 D2 BIPOFF 12 17 D1 10VIN 13 16 D0 20VIN 14 15 DGND AGND 9 23 D7 MAX174 MX574A MX674A 22 D6 21 D5 REFIN 10 20 D4 VEE 11 19 D3 12 13 14 15 16 17 18 D2 AGND 9 REFIN 10 8 D1 21 D5 7 D0 REFOUT 8 VCC REFOUT DGND 22 D6 10VIN VCC 7 20VIN CE 6 MAX174 MX574A MX674A BIPOFF R/C 5 PLCC DIP/SO Pin Description PIN NAME 1 VL 12/8 Logic Supply, +5V 2 3 CS Chip-Select Input. Must be low to select device. 4 A0 Byte Address/Short-Cycle Input. When starting a conversion, controls number of bits converted (low = 12 bits, high = 8 bits). When reading data, if 12/8 = low, enables low byte (A0 = high) or high byte (A0 = low). 5 R/C Read/Convert Input. When high, the device will be in the data-read mode. When low, the device will be in the conversion start mode. www.maximintegrated.com FUNCTION Data Mode Select Input Maxim Integrated │  7 MAX174/MX574A/ MX674A Industry-Standard, Complete 12-Bit ADCs Pin Description (continued) PIN NAME 6 CE 7 8 VCC REFOUT 9 AGND Analog Ground 10 REFIN Reference Input 11 VEE BIPOFF -12V or -15V Supply 10VIN 10V Span Input 12 13 FUNCTION Chip-Enable Input. Must be high to select device. +12V or +15V Supply +10V Reference Output Bipolar Offset Input. Connect to REFOUT for bipolar input range. 20VIN DGND 20V Span Input 15 16–27 D0–D11 Three-State Data Outputs 28 STS 14 Digital Ground Status Output Detailed Description Converter Operation The MAX174/MX574A/MX674A use a successive approximation technique to convert an unknown analog input to a 12-bit digital output code. The control logic provides easy interface to most microprocessors. Most applications require only a few external passive components to perform the analog-to-digital (A/D) function. The internal voltage output DAC is controlled by a successive approximation register (SAR) and has an output impedance of 2.5kΩ. The analog input is connected to the DAC output with a 5kΩ resistor for the 10V input and 10kΩ resistor for the 20V input. The comparator is essentially a zero-crossing detector, and its output is fed back to the SAR input. The SAR is set to half-scale as soon as a conversion starts. The analog input is compared to 1/2 of the full-scale voltage. The bit is kept if the analog input is greater than halfscale or dropped if smaller. The next bit, bit 10, is then set with the DAC output either at 1/4 scale, if the most significant bit (MSB) is dropped, or 3/4 scale if the MSB is kept. The conversion continues in this manner until the least significant bit (LSB) is tried. At the end of the conversion, the SAR output is latched into the output buffers. Digital Interface CE, CS, and R/C control the operation of the MAX174/ MX574A/MX674A. While both CE and CS are asserted, www.maximintegrated.com the state of R/C selects whether a conversion (R/C = 0) or a data read (R/C = 1) is in progress. The register control inputs, 12/8 and A0, select the data format and conversion length. A0 is usually tied to the LSB of the address bus. To perform a full 12-bit conversion, set A0 low during a convert start. For a shorter 8-bit conversion, A0 must be high during a convert start. Output Data Format During a data read, A0 also selects whether the threestate buffers contain the 8 MSBs (A0 = 0) or the 4 LSBs (A0 = 1) of the digital result. The 4 LSBs are followed by 4 trailing 0s. Output data is formatted according to the 12/8 pin. If this input is low, the output will be a word broken into two 8-bit bytes. This allows direct interlace to 8-bit buses without the need for external three-state buffers. If 12/8 is high, the output will be one 12-bit word. A0 can change state while a data-read operation is in effect. To begin a conversion, the microprocessor must write to the ADC address. Then, since a conversion usually takes longer than a single clock cycle, the microprocessor must wait for the ADC to complete the conversion. Valid data will be made available only at the end of the conversion, which is indicated by STS. STS can be ether polled or used to generate an interrupt upon completion. Or, the microprocessor can be kept idle by inserting the appropriate number of No Operation (NOP) instructions between the conversion-start and data-read commands. Maxim Integrated │  8 MAX174/MX574A/ MX674A Industry-Standard, Complete 12-Bit ADCs BIPOFF 20VIN 10VIN REFIN 5kΩ 2R* -50Ω 9.950kΩ R* DAC 5kΩ 2.5kΩ 1.6kΩ REFIN 2 SAR Figure 3. Analog Equivalent Circuit CE CS R/C 12/8 A0 OPERATION 0 X X X X None X 1 X X X None 1 0 0 X 0 Initiate 12-bit conversion 1 0 0 X 1 Initiate 12-bit conversion 1 0 1 1 X Enable 12-bit conversion 1 0 1 0 0 Enable 8 MSBs 1 0 1 0 1 Enable 4 LSBs + 4 trailing 0s After the conversion is completed, data can be obtained by the microprocessor. The ADCs have the required logic for 8-, 12-, and 16-bit bus interfacing, which is determined by the 12/8 input. If 12/8 is high, the ADCs are configured for a 16-bit bus. Data lines D0–D11 may be connected to the bus as either the 12 MSBs or the 12 LSBs. The other 4 bits must be masked out in software. For 8-bit bus operation, 12/8 is set low. The format is left justified, and the even address, A0 low, contains the 8 MSBs. The odd address, A0 high, contains the 4 LSBs, which is followed by 4 trailing 0s. There is no need to use a software mask when the ADCs are connected to an 8-bit bus. Note that the output cannot be forced to a right-justified format by rearranging the data lines on the 8-bit bus interface. www.maximintegrated.com Table 2. MAX174/MX574A/MX674A Data Format for 8-Bit Bus D7 D6 D5 D4 D3 D2 D1 D0 High Byte (A0 = 0) MSB D10 D9 D8 D7 D6 D5 D4 Low Byte (A0 = 1) D3 D2 D1 D0 0 0 0 0 MAX174 MX574A MX674A 27 (MSB) D7 26 (D10) D6 25 (D9) D5 24 (D8) D4 23 (D7) D3 22 (D6) D2 21 (D5) D1 20 (D4) D0 19 (D3) 18 (D2) 17 (D1) 16 (LSB) DATA BUS Table 1. Truth Table HARDWIRING FOR 8-BIT DATA BUSES Maxim Integrated │  9 MAX174/MX574A/ MX674A Industry-Standard, Complete 12-Bit ADCs Timing and Control Convert Start Timing—Full Control Mode R/C must be low before asserting both CE and CS. If it is high, a brief read operation occurs possibly resulting in system bus contention. To initiate a conversion, use either CE or CS. CE is recommended since it is shorter by one propagation delay than CS and is the faster input of the two. CE is used to begin the conversion in Figure 4. The STS output is high during the conversion indicating the ADC is busy. During this period, additional convert start commands will be ignored, so that the conversion cannot be prematurely terminated or restarted. However, if the state of A0 is changed after the beginning of the conversion, any additional start conversion transitions will latch the new state of A0, possibly resulting in an incorrect conversion length (8 bits vs. 12 bits) for that conversion. Read Timing—Full Control Mode Figure 5 illustrates the read-cycle timing. While reading data, access time is measured from when CE and R/C are both high. Access time is extended 10ns if CS is used to initiate a read. tHEC CE CE tHSC tSSC tHSR tSSR CS CS tHRC tSRC tSRR tHRR tSAR tHAR R/C R/C tSAC tHAC A0 A0 tDSC tC STS STS tDD D0–D11 D0–D11 HIGH IMPEDANCE Figure 4. Convert Start Timing www.maximintegrated.com tHD,tHL HIGH IMPEDANCE Figure 5. Read Timing Maxim Integrated │  10 MAX174/MX574A/ MX674A Industry-Standard, Complete 12-Bit ADCs Stand-Alone Operation For systems which do not use or require full bus interfacing, the MAX174/MX574A/MX674A can be operated in a stand-alone mode directly linked through dedicated input ports. When configured in the stand-alone mode, conversion is controlled by R/C. In addition, CS and A0 are wired low; CE and 12/8 are wired high. To enable the three-state buffers, set R/C low. A conversion starts when R/C is set high. This allows either a high- or a low-pulse control signal. Shown in Figure 6 is the operation with a low pulse. In this mode, the outputs, in response to the falling edge of R/C, are forced into the high-impedance state and return to valid logic-levels after the conversion is complete. The STS output goes high following the R/C falling edge and returns low when the conversion is complete. tHRL R/C tHDR For best system performance, PCBs should be used for the MAX174/MX574A/MX674A. Wirewrap boards are not recommended. The layout of the board should ensure that digital and analog signal lines are kept separated from each other as much as possible. Care should be taken not to run analog and digital lines parallel to each other or digital lines underneath the MAX174/MX574A/MX674A. tHS HIGH IMPEDANCE D0–11 Figure 6. Low Pulse for R//C in Stand-Alone Mode tHRH R/C tDS STS Analog Considerations Physical Layout tC STS A high-pulse conversion initiation is illustrated in Figure 7. When R/C is high, the data lines are enabled. The next conversion starts with the falling edge of R/C. The data lines return and remain in high impedance state until another R/C high pulse. Application Hints tDS tHDR tDDR HIGH IMPEDANCE D0–11 Figure 7. High Pulse for R//C in Stand-Alone Mode ANALOG SUPPLY -15V GND DIGITAL SUPPLY +15V +5V GND Grounding The recommended power-supply grounding practice is shown in Figure 8. The ground reference point for the onchip reference is AGND. It should be connected directly to the analog reference point of the system. The analog and digital grounds should be connected together at the package in order to gain all of the accuracy possible from the MAX174/MX574A/MX674A in high digital noise environments. In situations permitting, they can be connected to the most accessible ground-reference point. The preference is analog power return. VEE GND S/H AND ANALOG CIRCUITRY VCC VEE AGND VCC VL DGND +5V DGND DIGITAL CIRCUITRY MAX174 MX574A MX674A Figure 8. Power-Supply Grounding Practice www.maximintegrated.com Maxim Integrated │  11 MAX174/MX574A/ MX674A Industry-Standard, Complete 12-Bit ADCs Power-Supply Bypassing The MAX174/MX574A/MX674A power supplies must be filtered, well regulated, and free from high-frequency noise, or unstable output codes will result. Unless great care is taken in filtering any switching spikes present in the output, switching power supplies is not suggested for applications requiring 12-bit resolution. Take note that a few millivolts of noise converts to several error counts in a 12-bit ADC. All power-supply pins should use supply decoupling capacitors connected with short lead length to the pins, as shown in Figure 9. The VCC and VEE pins should be decoupled directly to AGND. A 4.7μF tantalum type in parallel with a 0 1μF disc ceramic type is a suitable decoupling. Internal Reference The MAX174/MX574A/MX674A have an internal buried zener reference that provides a 10V, low-noise and low temperature drift output. An external reference voltage can also be used for the ADC. When using ±15V supplies, the internal reference can source up to 2mA in addition to the BIPOFF and REFIN inputs over the entire operating temperature range. With ±12V supplies, the reference can drive the BIPOFF and REFIN inputs over temperature, but it CANNOT drive an additional load. Driving the Analog Input The input leads to AGND and 10VIN or 20VIN should be as short as possible to minimize noise pick up. If long leads are needed, use shielded cables. +5V VL C4 C1 DIGITAL GROUND DGND RECOMMENDED VCC +12V/15V C5 C2 C6 C3 ANALOG GROUND AGND -12V/15V C1, C2, C4 – 0.1µF CERAMIC C4, C5, C6 – 4.7µF VEE MAX174 MX574A MX674A When using the 20VIN as the analog input, load capacitance on the 10VIN pin must be minimized. Especially on the faster MAX174, leave the 10VIN pin open to minimize capacitance and to prevent linearity errors caused by inadequate settling time. The amplifier driving the analog input must have low enough DC output impedance for low full-scale error. Furthermore, low AC output impedance is also required since the analog input current is modulated at the clock rate during the conversion. The output impedance of an amplifier is the open-loop output impedance divided by the loop gain at the frequency of interest. MX574A and MX674A—The approximate internal clock rate is 600kHz and 1MHz, respectively, and amplifiers like the MAX400 can be used to drive the input. MAX174—The internal clock rate is 2MHz and faster amplifiers like the OP-27, AD711, or OP-42 are required. Track-and-Hold Interface The analog input to the ADC must be stable to within 1/2 LSB during the entire conversion for specified 12-bit accuracy. This limits the input signal bandwidth to a couple of hertz for sinusoidal inputs even with the faster MAX174. For higher bandwidth signals, a track-and-hold amplifier should be used. The STS output may be used to provide the Hold signal to the track-and-hold amplifier. However, since the A/D’s DAC is switched at approximately the same time as the conversion is initiated, the switching transients at the output of the T/H caused by the DAC switching may result in code dependent errors. It is recommended that the Hold signal to the T/H amplifier precede a conversion or be coincident with the conversion start. The first bit decision by the A/D is made approximately 1.5 clock cycles after the start of the conversion. This is 2.5μs, 1.5μs, and 0.8μs for the MX574A, MX674A, and MAX174, respectively. The T/H hold settling time must be less than this time. For the MX574A and MX674A, the AD585 sample-and-hold is recommended (Figure 10). For the MAX174, a faster T/H amplifier, like the HA5320 or HA5330, should be used (Figure 11). Input Configurations The MAX174/MX574A/MX674A input range can be set using pin strapping. Table 3 shows the possible input ranges and ideal transition voltages. End-point errors can be adjusted in all ranges. Figure 9. Power-Supply Bypassing www.maximintegrated.com Maxim Integrated │  12 MAX174/MX574A/ MX674A Industry-Standard, Complete 12-Bit ADCs Table 3. Input Ranges and Ideal Digital Output Codes ANALOG INPUT VOLTAGE (V) Note Note Note Note DIGITAL OUTPUT 0 to +10V 0 to +20V ±5V ±10V +10.0000 +20.0000 +5.0000 +10.0000 1111 1111 1111 +9.9963 +19.9927 +4.9963 +9.9927 1111 1111 1110* +5.0012 +10.0024 +0.0012 +0.0024 1000 0000 0000* +4.9988 +9.9976 -0.0012 -0.0024 0111 1111 1111* +4.9963 +9.9927 -0.0037 -0.0073 0111 1111 1110* +0.0012 +0.0024 -4.9988 -9.9976 0000 0000 0000* 0.0000 0.0000 -5.0000 -10.0000 0000 0000 0000 6: For 8: For 9: For 10: For MSB LSB unipolar input ranges, output coding is straight binary. bipolar input ranges, output coding is offset binary. 0 to + 10V or ±5V ranges, 1 LSB = 2.44mV. 0 to +20V or ±10V ranges, 1 LSB = 4.88mV. *The digital outputs will be flickering between the Indicated code and the indicated code plus one. +VS +15V 0.1µF 4.7µF HOLD 4.7µF MX574A* MX674A AD585* LREF -VS -15V CONTROL INPUTS STS 0.1µF HOLD 20VIN VOUT 10VIN -VIN VCC +VIN 4.7µF 0.1µF 4.7µF 0.1µF 4.7µF VEE REFOUT GND +15V 0.1µF BIPOFF 50Ω ANALOG INPUT D0 –11 -15V 50Ω VL REFIN AGND DGND +5V *ADDITIONAL PINS OMITTED FOR CLARITY Figure 10. MX574/MX674A to AD585 Sample-and-Hold Interface www.maximintegrated.com Maxim Integrated │  13 MAX174/MX574A/ MX674A +VS +15V 4.7µF Industry-Standard, Complete 12-Bit ADCs S/H CONTROL INPUTS STS 0.1µF MAX174* HA5320* D0 –11 20VIN -VS -15V 4.7µF 0.1µF VCC 10VIN VOUT -VIN +VIN 4.7µF 0.1µF 4.7µF 0.1µF 4.7µF VEE REFOUT GND 0.1µF BIPOFF 50Ω ANALOG INPUT +15V -15V 50Ω VL REFIN AGND DGND +5V *ADDITIONAL PINS OMITTED FOR CLARITY Figure 11. MAX174 to HA5320 Sample-and-Hold Interface Unipolar Input Operation The unipolar transfer function and input connections are shown in Figure 12 and Figure 13. Because all internal resistors of the MAX174/MX574A/ MX674A are trimmed for absolute calibration, additional trimming is not necessary for most applications. The absolute accuracy for each grade is given in the specification tables. If the offset trim is not needed, BIPOFF can be tied directly to AGND. The two resistors and trimmer for BIPOFF can then be discarded. A 50Ω ±1% metal film resistor should be attached between REFOUT and REFIN. For a 0 to +10V input range, the analog input is connected between AGND and 10VIN. For a 0 to +20V input range, the analog input is connected between AGND and 20VIN. These ADCs can easily handle an input signal beyond the supplies. If full-scale trim is not needed, the gain trimmer, R2, should be swapped with a 50Ω resistor. Should a 10.24V input range be selected, a 200Ω trimmer should be inserted in series with 10VIN. For a fullscale input range of 20.48V, use a 500Ω trimmer in series with 20VIN. The nominal input impedance into 10VIN is 5kΩ and 10kΩ for 20VIN. www.maximintegrated.com Offset and Full-Scale Adjustment In applications where the offset and full-scale range have to be adjusted, use the circuit shown in Figure 12. The offset should be adjusted first. Apply 1/2 LSB at the analog input and adjust R1 until the digital output code flickers between 0000 0000 0000 and 0000 0000 0001. To adjust the full-scale range, apply FS - 3/2 LSB at the analog input and adjust R2 until the output code changes between 1111 1111 1110 and 1111 1111 1111. Bipolar Input Operation The bipolar transfer function is shown in Figure 14, and input connections are shown in Figure 15. One or both of the trimmers can be exchanged with a 50Ω ±1% fixed resistor if the offset and gain specifications suffice. Offset and Full-Scale Adjustment To begin bipolar calibration, a signal 1/2 LSB above negative full-scale is applied. R1 is trimmed until the digital output flickers between 0000 0000 0000 and 0000 0000 0001. Next, a signal 3/2 LSB below positive full scale is applied. Then, R2 is trimmed until the output flickers between 1111 1111 1110 and 1111 1111 1111. Maxim Integrated │  14 MAX174/MX574A/ MX674A Industry-Standard, Complete 12-Bit ADCs OUTPUT CODE FS = 4069 LSBs 1111 1111 1111 OUTPUT CODE 1111 1111 1110 FS = 4069 LSBs 1111 1111 1101 1000 0000 0001 1111 1111 1111 1000 0000 0000 1111 1111 1110 FULL-SCALE TRANSITION 1111 1111 1101 0111 1111 1111 0111 1111 1110 0000 0000 0011 0000 0000 0011 0000 0000 0010 0000 0000 0010 0000 0000 0001 0000 0000 0000 0000 0000 0001 0 1 2 3 FS-1 FS 0000 0000 0000 - FS 2 - - FS +2 2 -2 -1 FS 1 FS 2 2 2 FS 1 2 0 FS +1 2 ANALOG INPUT VOLTAGE IN LSBs Figure 12. Ideal Unipolar Transfer Function MAX174* MX574A MX674A GAIN R2 100Ω +12V TO +15V Figure 14. Ideal Bipolar Transfer Function REFOUT R2 100Ω REFIN REFIN REFOUT 100kΩ OFFSET R1 100kΩ BIPOFF BIPOFF R1 100Ω OFFSET 100Ω -12V TO -15V ANALOG INPUTS MAX174* MX574A MX674A GAIN 0 TO +10V 0 TO +20V 10VIN 20VIN ANALOG INPUTS Q5V 10VIN Q10V 20VIN AGND *ADDITIONAL PINS OMITTED FOR CLARITY Figure 13. Unipolar Input Connections www.maximintegrated.com AGND *ADDITIONAL PINS OMITTED FOR CLARITY Figure 15. Bipolar Input Connections Maxim Integrated │  15 MAX174/MX574A/ MX674A Industry-Standard, Complete 12-Bit ADCs Ordering Information PINPACKAGE PART LINEARITY (LSB) TEMPCO (ppm/°C) 8µs Maximum Conversion Time PINPACKAGE PART LINEARITY (LSB) TEMPCO (ppm/°C) TEMP RANGE: -55°C to +125°C TEMP RANGE: 0°C to +70°C MX674ASQ 28 CERDIP* 1 50 MAX174ACPI+ 28 Plastic DIP ½ 10 MX674ATQ 28 CERDIP* ¾ 25 MAX174BCPI+ 28 Plastic DIP ½ 27 MX674AUQ 28 CERDIP* ¾ 12 MAX174CCPI+ 28 Plastic DIP 1 50 MX674ASD 28 Ceramic SB 1 50 MAX174ACWI+ 28 Wide SO ½ 10 MX674ATD 28 Ceramic SB ¾ 25 MAX174BCWI+ 28 Wide SO ½ 27 MX674AUD 28 Ceramic SB ¾ 12 MAX174CCWI+ 28 Wide SO 1 50 Dice* ½ — MAX174BC/D TEMP RANGE: -40°C to +85°C 25µs Maximum Conversion Time TEMP RANGE: 0°C to +70°C MX574AJN+ 28 Plastic DIP 1 50 MAX174AEPI+ 28 Plastic DIP ½ 19 MX574AKN+ 28 Plastic DIP ½ 27 MAX174BEPI+ 28 Plastic DIP ½ 38 MX574ALN+ 28 Plastic DIP ½ 10 MAX174CEPI+ 28 Plastic DIP 1 75 MX574AJCWI+ 28 Wide SO 1 50 MAX174AEWI+ 28 Wide SO ½ 19 MX574AKCWI+ 28 Wide SO ½ 27 MAX174BEWI+ 28 Wide SO ½ 38 MX574ALCWI+ 28 Wide SO ½ 10 MAX174CEWI+ 28 Wide SO 1 75 MX574AJP+ 28 PLCC 1 50 MX574AKP+ 28 PLCC ½ 27 TEMP RANGE: -55°C to +125°C MAX174AMJI 28 CERDIP ¾ 12 MX574ALP+ 28 PLCC ½ 10 MAX174BMJI 28 CERDIP ¾ 25 MX574AK/D Dice* ½ — MAX174CMJ 28 CERDIP 1/21 50 TEMP RANGE: -40°C to +85°C 15µs Maximum Conversion Time TEMP RANGE: 0°C to +70°C MX574AJEPI+ 28 Plastic DIP 1 75 MX574AKEPI+ 28 Plastic DIP ½ 38 ½ 19 MX674AJN+ 28 Plastic DIP 1 50 MX574ALEPI+ 28 Plastic DIP MX674AKN+ 28 Plastic DIP ½ 27 MX574AJEWI+ 28 Wide SO 1 75 MX674ALN+ 28 Plastic DIP ½ 10 MX574AKEQI+ 28 PLCC ½ 38 MX674AJCWI+ 28 Wide SO 1 50 MX574AKEWI+ 28 Wide SO ½ 38 MX674AKCWI+ 28 Wide SO ½ 27 MX574ALEWI+ 28 Wide SO ½ 19 MX674ALCWI+ 28 Wide SO ½ 10 TEMP RANGE: -55°C to +125°C Dice* ½ — MX574ASQ 28 CERDIP* 1 50 MX574ATQ 28 CERDIP* ¾ 25 ¾ 12 MX674AK/D TEMP RANGE: -40°C to +85°C MX674AJEPI+ 28 Plastic DIP 1 75 MX574AUQ 28 CERDIP* MX674AKEPI+ 28 Plastic DIP ½ 38 MX574ASD 28 Ceramic SB 1 50 MX674ALEPI+ 28 Plastic DIP ½ 19 MX574ATD 28 Ceramic SB ¾ 25 MX674AJEWI+ 28 Wide SO 1 75 MX574AUD 28 Ceramic SB ¾ 12 MX674AKEWI+ 28 Wide SO ½ 38 MX674ALEWI+ 28 Wide SO ½ 19 +Denotes a lead(Pb)-free/RoHS-compliant package. *Maxim reserves the right to ship Ceramic SB in lieu of CERDIP packages. **Consult factory for dice specifications. www.maximintegrated.com Maxim Integrated │  16 MAX174/MX574A/ MX674A Chip Information PROCESS: BiCMOS Industry-Standard, Complete 12-Bit ADCs Package Information For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE www.maximintegrated.com PACKAGE CODE OUTLINE NO. LAND PATTERN NO. 28 PDIP P28+2 21-0044 — 28 PLCC Q28+3 21-0049 90-0235 28 Wide SO W28+2 21-0042 90-0109 Maxim Integrated │  17 MAX174/MX574A/ MX674A Industry-Standard, Complete 12-Bit ADCs Revision History REVISION NUMBER REVISION DATE PAGES CHANGED 3 8/11 Updated the Electrical Characteristics and Ordering Information. Added Revision History. 2–4 4 6/18 Updated Ordering Information 16 DESCRIPTION For pricing, delivery, and ordering information, please visit Maxim Integrated’s online storefront at https://www.maximintegrated.com/en/storefront/storefront.html. Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc. ©  2018 Maxim Integrated Products, Inc. │  18
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