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MAX22500E/MAX22501E
100Mbps Half-Duplex RS-485/RS-422
Transceivers for Long Cables
General Description
Benefits and Features
The MAX22500E/MAX22501E half-duplex ESD-protected
RS-485/RS-422 transceivers are optimized for high-speed
(up to 100Mbps) communication over long cables.These
transceivers feature integrated hot-swap protection and a
fail-safe receiver, ensuring a logic-high on the receiver
output when input signals are shorted or open for longer
than 10μs (typ).
● High-Speed Operation Over Long Distances
• Up to 100Mbps Data Rate
• Integrated Preemphasis Extends Cable Length
(MAX22500E)
• High Receiver Sensitivity
• Wide Receiver Bandwidth
• Symmetrical Receiver Thresholds
The MAX22500E features integrated preemphasis circuitry that extends the distance and increases the data rate of
reliable communication by reducing inter-symbol interference (ISI) caused by long cables. The MAX22500E features a flexible logic interface down to 1.6V.
● Integrated Protection Increases Robustness
• -15V to +15V Common Mode Range
• ±15kV ESD Protection (Human Body Model)
• ±7kV IEC 61000-4-2 Air-Gap ESD Protection
• ±6kV IEC 61000-4-2 Contact Discharge ESD
Protection
• Withstands up to ±4kV EFT
• Driver Outputs are Short-Circuit Protected
The MAX22501E operates without preemphasis and is
powered from a 3V to 5.5V supply.
The MAX22500E is available in a 10-pin TDFN-EP package. The MAX22501E is available in a 8-pin TDFN-EP
package and an 8-pin μMAX package. Both transceivers
operate over the -40°C to +125°C ambient temperature
range.
Applications
●
●
●
●
●
Motion Control
Encoder Interfaces
Field Bus Networks
Industrial Control Systems
Backplane Busses
● Flexibility for Many Different Applications
• 3V to 5.5V Supply Range
• Low Voltage Logic Supply Down to 1.6V
(MAX22500E)
• Low 5μA (max) Shutdown Current
• Available in 8-pin or 10-pin TDFN Package and an
8-pin μMAX Package
• -40°C to +125°C Operating Temperature Range
Simplified Block Diagram
VL
VCC
RO
RO
R
B
RE
DE
DI
PSET
VCC
SHUTDOWN
A
DE
DI
D
MAX22500
GND
R
RE
B
SHUTDOWN
A
D
MAX22501
GND
µMAX is a registered trademark of Maxim Integrated Products, Inc.
Ordering Information appears at end of data sheet.
19-100073; Rev 3; 12/21
© 2022 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners.
One Analog Way, Wilmington, MA 01887 U.S.A. | Tel: 781.329.4700 | © 2022 Analog Devices, Inc. All rights reserved.
MAX22500E/MAX22501E
100Mbps Half-Duplex RS-485/RS-422
Transceivers for Long Cables
Absolute Maximum Ratings
VCC........................................................................... -0.3V to +6V
RE, DE, DI, VL .......................................................... -0.3V to +6V
RO (MAX22500E only). .................................-0.3V to (VL + 0.3V)
RO (MAX22501E only) ............................... -0.3V to (VCC + 0.3V)
PSET ............................................................ -0.3V to (VCC+0.3V)
A, B .......................................................................... -15V to +15V
Short-Circuit Duration (RO, A, B) to GND ....................................
Continuous Power Dissipation (TA = +70°C) (8-Pin TDFN (derate
24.4mW/°C above +70°C) ). ........................................... 1951mW
Continuous Power Dissipation (TA = +70°C) (10-Pin TDFN
(derate 24.4mW/°C above +70°C) ) ................................1951mW
Continuous Power Dissipation (TA = +70°C) (8-pin μMAX)(derate
at 4.8mW°C above +70°C) ............................................387.8mW
Operating Temperature Range ...........................-40ºC to +125ºC
Junction Temperature ....................................................... +150ºC
Storage Temperature Range .............................. -65ºC to +150ºC
Lead Temperature (Soldering 10sec) ............................... +300ºC
Reflow Temperature ......................................................... +270ºC
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the
device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
Package Information
TDFN8
Package Code
T833-2
Outline Number
21-0137
Land Pattern Number
90-0059
THERMAL RESISTANCE, SINGLE-LAYER BOARD
Junction-to-Ambient (θJA)
54°C/W
Junction-to-Case Thermal Resistance (θJC)
8°C/W
THERMAL RESISTANCE, FOUR-LAYER BOARD
Junction-to-Ambient (θJA)
41°C/W
Junction-to-Case Thermal Resistance (θJC)
8°C/W
TDFN10
Package Code
T1033-2
Outline Number
21-0137
Land Pattern Number
90-0061
THERMAL RESISTANCE, SINGLE-LAYER BOARD
Junction-to-Ambient (θJA)
54°C/W
Junction-to-Case Thermal Resistance (θJC)
9°C/W
THERMAL RESISTANCE, FOUR-LAYER BOARD
Junction-to-Ambient (θJA)
41°C/W
Junction-to-Case Thermal Resistance (θJC)
9°C/W
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Analog Devices | 2
MAX22500E/MAX22501E
100Mbps Half-Duplex RS-485/RS-422
Transceivers for Long Cables
8-pin μMAX
Package Code
U8+1
Outline Number
21-0136
Land Pattern Number
90-0092
THERMAL RESISTANCE, SINGLE-LAYER BOARD
Junction-to-Ambient (θJA)
221°C/W
Junction-to-Case Thermal Resistance (θJC)
42°C/W
THERMAL RESISTANCE, FOUR-LAYER BOARD
Junction-to-Ambient (θJA)
206°C/W
Junction-to-Case Thermal Resistance (θJC)
42°C/W
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages.
Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different
suffix character, but the drawing pertains to the package regardless of RoHS status.
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a
four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/
thermal-tutorial.
Electrical Characteristics
(VCC = 3V to 5.5V, VL = 1.6V to VCC (MAX22500E only), VL ≤ VCC, TA = TMIN to TMAX, unless otherwise noted.) (Note 1, Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
POWER
Supply Voltage
VCC
MAX22500E
Preemphasis
disabled
3.0
Preemphasis
enabled
4.5
5
5.5
MAX22500E
12.7
16.5
MAX22501E
4
5.6
MAX22501E
Supply Current
Shutdown Supply
Current
ICC
ISHDN
DE = high,
RE= low, no load
5.5
3.0
5.5
DE = low, RE= high
5
Logic Supply Voltage
VL
MAX22500E only
Logic Supply Current
IL
MAX22500E only, no load on RO
V
1.6
16.4
mA
µA
VCC
V
23
µA
DRIVER
Differential Driver
Output
RL = 54Ω
1.5
RL = 100Ω
2.0
RL= 54Ω
1.33
1.37
1.41
RL= 100Ω
1.33
1.37
1.41
VOD
Figure 1, Figure 2
Differential Driver
Preemphasis Ratio
DPRE
MAX22500E only,
preemphasis
enabled,
4.5V ≤ VCC ≤ 5.5V
(Note 3)
Change in Magnitude of
Differential Output
Voltage
ΔVOD
RL = 54Ω, Figure 1 (Note 4)
VOC
RL = 54Ω, Normal mode and
preemphasis, Figure 1
Driver Common-Mode
Output Voltage
www.analog.com
V
VCC/2
V/V
0.2
V
3
V
Analog Devices | 3
MAX22500E/MAX22501E
100Mbps Half-Duplex RS-485/RS-422
Transceivers for Long Cables
Electrical Characteristics (continued)
(VCC = 3V to 5.5V, VL = 1.6V to VCC (MAX22500E only), VL ≤ VCC, TA = TMIN to TMAX, unless otherwise noted.) (Note 1, Note 2)
PARAMETER
SYMBOL
Change In Magnitude of
Common-Mode Voltage
ΔVOC
CONDITIONS
MIN
TYP
RL = 100Ω or 54Ω, Figure 1 (Note 4)
Single-Ended Driver
Output High
VOH
A or B output, IOUT = -20mA
Single-Ended Driver
Output Low
VOL
A or B output, IOUT = +20mA
Differential Output
Capacitance
COD
DE = RE= high, f = 4MHz
Driver Short-Circuit
Output Current
|IOST|
-15V ≤ VOUT ≤ +15V
MAX
UNITS
0.2
V
2.2
V
0.8
50
V
pF
250
mA
RECEIVER
Input Current (A and B)
IA,B
DE = GND, VCC =
GND, +3.6V or
5.5V
VIN = +12V
Differential Input
Capacitance
CA,B
Between A and B, DE = GND, f = 2MHz
Common Mode Voltage
Range
VCM
VIN = -7V
+1350
μA
-1100
50
pF
-15
+15
V
Receiver Differential
Threshold High
VTH_H
-15V ≤ VCM ≤ +15V
+50
+200
mV
Receiver Differential
Threshold Low
VTH_L
-15V ≤ VCM ≤ +15V
-200
-50
mV
Receiver Input
Hysteresis
ΔVTH
VCM = 0V, time from last transition is less
than tD_FS
Differential Input FailSafe Level
VTH_FS
-15V ≤ VCM ≤ +15V
250
-50
mV
+50
mV
LOGIC INTERFACE (RE, RO, DE, DI)
MAX22500E
Input Voltage High
VIH
DE, DI, RE
2/3 x
VCC
MAX22501E,
VCC = 5.25V
2.85
1/3 x VL
MAX22501E
1/3 x
VCC
V
+2
μA
10
kΩ
VIL
DE, DI, RE
Input Current
IIN
DI and DE, RE (after first transition)
RO Output High Voltage
RO Output Low Voltage
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RIN_FT
VOH
VOL
-2
DE, RE
RE = GND,
(VA - VB) > 200mV,
IOUT = -1mA
RE = GND,
(VA - VB) > 200mV,
IOUT = -1mA
V
MAX22500E
Input Voltage Low
Input Impedance on
First Transition
2/3 x VL
MAX22501E,
3V ≤ VCC ≤ 5.5V
MAX22500E
VL – 0.4
MAX22501E
VCC 0.4
V
RE = GND, (VA – VB) < -200mV, IOUT =
+1mA
0.4
V
Analog Devices | 4
MAX22500E/MAX22501E
100Mbps Half-Duplex RS-485/RS-422
Transceivers for Long Cables
Electrical Characteristics (continued)
(VCC = 3V to 5.5V, VL = 1.6V to VCC (MAX22500E only), VL ≤ VCC, TA = TMIN to TMAX, unless otherwise noted.) (Note 1, Note 2)
PARAMETER
Three-State Output
Current at Receiver
SYMBOL
CONDITIONS
IOZR
RE= high, 0 ≤ VRO ≤ VCC
Thermal Shutdown
Threshold
TSH
Temperature rising
Thermal Shutdown
Hysteresis
TSH_HYS
MIN
TYP
-1
MAX
UNITS
+1
μA
PROTECTION
ESD Protection (A and
B Pins)
ESD Protection (All
Other Pins)
+160
°C
10
°C
Human Body Model
±15
IEC61000-4-2 Air Gap Discharge to GND
±7
IEC61000-4-2 Contact Discharge to GND
±6
Human Body Model
±2
kV
kV
Electrical Characteristics—Switching
(VCC = 3V to 5.5V, VL = 1.6V to VCC (MAX22500E only), VL ≤ VCC, TA = TMIN to TMAX, unless otherwise noted (Notes 1, 2))
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DRIVER (Note 5)
Driver Propagation
Delay
Differential Driver
Output Skew
Driver Differential
Output Rise and Fall
Time
Data Rate
tDPLH
RL = 54Ω, CL = 50pF, Figure 3, Figure 4
7
20
tDPHL
RL = 54Ω, CL = 50pF, Figure 3, Figure 4
7
20
tDSKEW
tHL, tLH
|tDPLH – tDPHL|, RL
= 54Ω,
CL= 50pF,
Figure 3, Figure 4
(Note 6)
MAX22501E
1.2
MAX22500E,
VL = VCC,
VCC ≥ 3V
1.2
MAX22500E,
VL ≠ VCC
1.6
RL = 54Ω, CL = 50pF, Figure 4
(Note 6)
1.6
DR
ns
ns
3
ns
100
Mbps
Driver Enable to Output
High
tDZH
RL = 500Ω, CL = 50pF, Figure 5, Figure 6
15
30
ns
Driver Enable to Output
Low
tDZL
RL = 500Ω, CL = 50pF, Figure 5, Figure 6
15
30
ns
Driver Disable Time
from High
tDHZ
RL = 500Ω, CL = 50pF, Figure 5, Figure 6
23
30
ns
Driver Disable Time
from Low
tDLZ
RL = 500Ω, CL = 50pF, Figure 5, Figure 6
23
30
ns
Driver Enable from
Shutdown to Output
High
tDZH(SHDN)
RL = 1kΩ, CL = 15pF, Figure 5, Figure 6
52
100
µs
Driver Enable from
Shutdown to Output Low
tDZL(SHDN)
RL = 1kΩ, CL = 15pF, Figure 5, Figure 6
52
100
µs
140
800
ns
Time to Shutdown
www.analog.com
tSHDN
(Notes 7, 8)
50
Analog Devices | 5
MAX22500E/MAX22501E
100Mbps Half-Duplex RS-485/RS-422
Transceivers for Long Cables
Electrical Characteristics—Switching (continued)
(VCC = 3V to 5.5V, VL = 1.6V to VCC (MAX22500E only), VL ≤ VCC, TA = TMIN to TMAX, unless otherwise noted (Notes 1, 2))
PARAMETER
Driver Preemphasis
Interval
SYMBOL
tPRE
CONDITIONS
MAX22500E only,
4.5V ≤ VCC ≤ 5.5V,
RL = 100Ω,
Figure 2
MIN
TYP
MAX
UNITS
RPSET = 4kΩ
10
13
16
ns
RPSET = 400kΩ
0.8
1
1.2
μs
RECEIVER (Note 5)
Delay to Fail-Safe
Operation
tD_FS
Receiver Propagation
Delay
tRPLH,tRPHL
Receiver Output Skew
tRSKEW
Data Rate
10
CL = 15pF, Figure 7, Figure 8
17
|tRPHL - tRPLH|, CL= 15pF,
Figure 7, Figure 8 (Note 6)
DR
µs
20
ns
2.5
ns
100
Mbps
Receiver Enable to
Output High
tRZH
RL = 1kΩ, CL = 15pF, Figure 9
19
30
ns
Receiver Enable to
Output Low
tRZL
RL = 1kΩ, CL = 15pF, Figure 9
19
30
ns
Receiver Disable Time
from High
tRHZ
RL = 1kΩ, CL = 15pF, Figure 9
12
30
ns
Receiver Disable Time
from Low
tRLZ
RL = 1kΩ, CL = 15pF, Figure 9
12
30
ns
Receiver Enable from
Shutdown to Output
High
tRZH(SHDN)
RL = 1kΩ, CL = 15pF, Figure 9
52
100
μs
Receiver Enable from
Shutdown to Output Low
tRZL(SHDN)
RL = 1kΩ, CL = 15pF, Figure 9
52
100
μs
140
800
ns
Time to Shutdown
tSHDN
(Notes 7, 8)
50
Note 1: All devices are 100% production tested at TA = +25°C. Specifications for all temperature limits are guaranteed by design.
Note 2: All currents into the device are positive; all currents out of the device are negative. All voltages are referenced to device
ground, unless otherwise noted.
Note 3: VODP is the differential voltage between A and B during the preemphasis interval on the MAX22500E, and is the differential
voltage when preemphasis is disabled. VODP = DPRE x VOD.
Note 4: ΔVOD and ΔVOC are the changes in VOD and VOC, respectively, when the DI input changes state.
Note 5: Capacitive load includes test probe and fixture capacitance.
Note 6: Not production tested. Guaranteed by design.
Note 7: Shutdown is enabled by driving RE high and DE low. The device is guaranteed to have entered shutdown after tSHDN has
elapsed.
Note 8: The timing parameter refers to the driver or receiver enable delay, when the device has exited the initial hot-swap protect state
and is in normal operating mode.
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Analog Devices | 6
MAX22500E/MAX22501E
A
VOD
RL
2
RL
2
B
100Mbps Half-Duplex RS-485/RS-422
Transceivers for Long Cables
VOC
Figure 1. Driver DC Test Load
A OR B
VOD
VODP
B OR A
50%
tPRE
MAX22500E only, pre-emphasis enabled
VOD = DPRE x VODP
Figure 2. Driver Preemphasis Timing
VCC
DE
A
VOD
RL
CL
B
Figure 3. Driver Timing Test Circuit
f = 1MHz, tLH = 3ns, tHL = 3ns
DI
50%
VL OR VCC
50%
0
tDPLH
tDPHL
B
A
VOD
VOD = (VA - VB)
90%
90%
10%
10%
VO
0
VOD
-VO
tHL
tLH
tDSKEW = |tDPLH - tDPHL|
Figure 4. Driver Propagation Delays
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Analog Devices | 7
MAX22500E/MAX22501E
GND OR VCC
100Mbps Half-Duplex RS-485/RS-422
Transceivers for Long Cables
A
DI
B
OUT
RL
110Ω
CL
50pF
VL OR VCC
DE
tDZH, tDZH(SHDN)
1.5V
0.25V
GENERATOR
50Ω
OUT
1.5V
0V
VOH
0V
tDHZ
Figure 5. Driver Enable and Disable Times (tDZH, tDHZ)
VCC
GND OR VCC
DI
RL
110Ω
A
B
OUT
CL
50pF
VL OR VCC
DE
tDZL, tDZL(SHDN)
1.5V
0V
tDLZ
GENERATOR
VCC
50Ω
OUT
1.5V
0.25V
VOL
Figure 6. Driver Enable and Disable Times (tDZL, tDLZ)
A
ATE
R
VID
RO
B
Figure 7. Receiver Propagation Delay Test Circuit
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Analog Devices | 8
MAX22500E/MAX22501E
100Mbps Half-Duplex RS-485/RS-422
Transceivers for Long Cables
A
+1V
B
-1V
tRPLH
tRPHL
VOH
50%
RO
50%
VOL
tRSKEW = |tRPHL – tRPHL|
Figure 8. Receiver Propagation Delays
S3
+1.5V
-1.5V
R
VIO
GENERATOR
RO
R
1kΩ
S1
S2
CL
15pF
VL OR VCC
50Ω
VL OR VCC
VL OR VCC
RE
RE
1.5V
0V
tRZH, tRZH(SHDN)
VCC
2
RO
1.5V
S1 OPEN
S2 CLOSED
S3 = +1.5V
VOH
VCC
2
RO
0V
1.5V
RE
0V
tRHZ
S1 OPEN
S2 CLOSED
S3 = +1.5V
1.5V
0.25V
VOL
0V
S1 CLOSED
S2 OPEN
S3 = -1.5V
VL OR VCC
RO
0V
VL OR VCC
tRLZ
VOH
RO
S1 CLOSED
S2 OPEN
S3 = -1.5V
VL OR VCC
VL OR VCC
RE
0V
tRZL, tRZL(SHDN)
0.25V
VOL
Figure 9. Receiver Enable and Disable Times
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Analog Devices | 9
MAX22500E/MAX22501E
100Mbps Half-Duplex RS-485/RS-422
Transceivers for Long Cables
Typical Operating Characteristics
(VCC = 5V, VL = VCC (MAX22500E only), 60Ω termination between A and B, TA = 25°C, unless otherwise noted.)
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Analog Devices | 10
MAX22500E/MAX22501E
100Mbps Half-Duplex RS-485/RS-422
Transceivers for Long Cables
Typical Operating Characteristics (continued)
(VCC = 5V, VL = VCC (MAX22500E only), 60Ω termination between A and B, TA = 25°C, unless otherwise noted.)
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Analog Devices | 11
MAX22500E/MAX22501E
100Mbps Half-Duplex RS-485/RS-422
Transceivers for Long Cables
Pin Configurations
MAX22500E TDFN-EP
TOP VIEW
VCC
B
A
10
9
8
GND PSET
6
7
MAX22500E
*EP
+
1
2
3
4
5
VL
RO
DE
RE
DI
TDFN-EP
3mm x 3mm
*EP = Exposed Pad
MAX22501E TDFN-EP
TOP VIEW
VCC
B
A
GND
8
7
6
5
MAX22501E
*EP
+
1
2
3
4
RO
RE
DE
DI
TDFN-EP
3Mm x 3mm
* EP = Exposed Pad
MAX22501E μMAX
TOP VIEW
RO
1
RE
2
DE
3
DI
4
+
MAX22501E
8
VCC
7
B
6
A
5
GND
µMAX
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Analog Devices | 12
MAX22500E/MAX22501E
100Mbps Half-Duplex RS-485/RS-422
Transceivers for Long Cables
Pin Description
PIN
MAX22500E
TDFN-EP
MAX22501E
TDFN-EP
MAX22501E
μMAX
NAME
FUNCTION
1
—
—
VL
Logic Supply Input. VL defines the interface logic levels on DE, DI
and RO. Apply a voltage between 1.6V to 5.5V to VL. Bypass VL
to ground with a 0.1μF capacitor as close to the device as
possible.
2
1
1
RO
Receiver Output. See the Receiving Function Table for more
information.
3
3
3
DE
Driver Output Enable. Force DE high to enable driver. Pull DE low
to three-state the driver output.
4
2
2
RE
Receiver Enable. Pull RE high to disable and the receiver and tristate RO. The device is in low-power shutdown when RE = high
and DE = low.
5
4
4
DI
Driver Input. See the Transmitting Function Table for more
information.
6
—
—
PSET
Preemphasis Select Control Input. Connect a resistor from PSET
to GND to select the preemphasis duration. See the Layout
Recommendations in the Applications Information section for
more information. To disable preemphasis, connect PSET to GND
or VCC.
7
5
5
GND
Ground
8
6
6
A
Noninverting Receiver Input/Driver Output
9
7
7
B
Inverting Receiver Input/Driver Output
10
8
8
VCC
EP
EP
—
—
Supply Input. Bypass VCC to ground with a 0.1μF ceramic
capacitor as close to the device as possible.
Exposed Pad. Connect to ground.
Functional Diagrams
Half-Duplex
5V
3.3V
5V
VCC
VCC
RE
RE
RO
RO
R
B
120Ω
DE
DI
A
D
MICROCONTROLLER
MICROCONTROLLER
VL
3.3V
R
B
120Ω
DE
DI
A
D
PSET
MAX22500E
GND
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MAX22501E
GND
Analog Devices | 13
MAX22500E/MAX22501E
100Mbps Half-Duplex RS-485/RS-422
Transceivers for Long Cables
Table 1. Transmitting Function Table
INPUTS
OUTPUTS
RE
DE
DI
A
B
X
1
1
1
0
X
1
0
0
1
0
0
X
High Impedance
High Impedance
1
0
X
Shutdown. A and B are high impedance
X = Don’t care
Table 2. Receiving Function Table
INPUTS
OUTPUTS
RE
DE
(VA - VB)
Time from Last A-B Transition
RO
0
X
≥ +200mV
Always
1
0
X
-200mV < (VA - VB) < +200mV
< tD_FS
Indeterminate
RO is latched to previous value
0
X
-50mV < (VA - VB) < +50mV
> tD_FS
1
0
X
≤ -200mV
Always
0
0
0
Open/Shorted
> tD_FS
1
1
1
X
X
High Impedance
1
0
X
X
Shutdown. RO is high impedance
X = Don't care
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MAX22500E/MAX22501E
100Mbps Half-Duplex RS-485/RS-422
Transceivers for Long Cables
Detailed Description
The MAX22500E/MAX22501E ESD-protected RS-485/RS-422 transceivers are optimized for high-speed, half-duplex
communications over long cables. Both transceivers feature integrated hot-swap functionality to eliminate false
transitions on the driver during power-up or during a hot-plug event. These transceivers also feature fail-safe receiver
inputs, guaranteeing a logic-high on the receiver output when inputs are shorted or open for longer than 10μs (typ).
Receiver Threshold Voltages
The MAX22500E and MAX22501E receivers feature large threshold hysteresis of 250mV (typ) for increased differential
noise rejection. Additionally, the receivers feature symmetrical threshold voltages. Symmetric thresholds have the
advantage that recovered data at the RO output does not have duty cycle distortion. Typically, fail-safe receivers, which
have unipolar (non-symmetric) thresholds, show some duty cycle distortion at high signal attenuation due to long cable
lengths.
Preemphasis (MAX22500E only)
The MAX22500E features integrated driver preemphasis circuitry, which strongly improves signal integrity at high
data rates over long distances by reducing inter-symbol interference (ISI) caused by long cables. Preemphasis is set
by connecting a resistor (RPSET) between PSET and ground. Long cables attenuate the high-frequency content of
transmitted signals due to the cable's limited bandwidth. This causes signal/pulse distortion at the receiving end, resulting
in ISI. ISI causes jitter in data and clock recovery circuits. ISI can be visualized by considering the following cases: If a
series of ones (1's) is transmitted, followed by a zero (0), the transmission-line voltage has risen to a high value by the
end of the string of ones. It takes longer for the signal to move toward the '0' state because the starting voltage on the line
is so far from the zero crossing. Similarly, if a data pattern has a string of zeros followed by a one and then another zero,
the one-to-zero transition starts from a voltage that is much closer to the zero-crossing (VA - VB = 0) and it takes much
less time for the signal to reach the zero crossing. Preemphasis reduces ISI by boosting the differential signal amplitude
at every transition edge, counteracting the high frequency attenuation of the cable. When the DI input changes from a
logic-low to a logic-high, the differential output (VA - VB) is driven high to VODP. At the end of the preemphasis interval,
the differential voltage returns to a lower level (VOD). The preemphasis differential high voltage (VODP) is typically 1.37
the VOD voltage. If DI switches back to a logic-low state before the preemphasis interval ends, the differential output
switches directly from the 'strong' VODP high to a 'strong' low (-VODP). Driver behavior is similar when the DI input
changes from a logic-high to a logic-low. When this occurs, the differential output is pulled low to -VODP until the end of
the preemphasis interval, at which point VA - VB = -VODP.
Setting the Preemphasis Interval
Connect a resistor (RPSET) between PSET and GND to set the preemphasis time interval on the MAX22500E. An
optimum preemphasis interval ranges from 1 to 1.5 unit intervals (bit time). Use the following equation to calculate the
resistance needed on PSET to achieve a 1.2 preemphasis interval:
RPSET = 400x109 / DR
where DR is the data rate and 1Mbps ≤ DR ≤ 100Mbps. Preemphasis only minimally degrades the jitter on the eye
diagram when using short cables, making it reasonable to permanently enable preemphasis on systems where cable
lengths may vary or change. Figure 10 and Figure 11 are eye diagrams taken at 100Mbps over a 10m Cat-5e cable.
Note that the eye varies only slightly as preemphasis is enabled or disabled. Figure 12 and Figure 13 show the driver
eye diagrams over a long cable length. The MAX22500E was used as the driver and the eye diagrams were taken
at the receiver input after a length of 100m Cat-5e cable. Figure 12 shows the signal at the receiver when the driver
preemphasis is disabled. Figure 13 shows the receiver signal when preemphasis is enabled.
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Analog Devices | 15
MAX22500E/MAX22501E
100Mbps Half-Duplex RS-485/RS-422
Transceivers for Long Cables
Figure 10. Eye Diagram, 100Mbps Over 10m Cat-5e Cable, Preemphasis Disabled
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Analog Devices | 16
MAX22500E/MAX22501E
100Mbps Half-Duplex RS-485/RS-422
Transceivers for Long Cables
Figure 11. Eye Diagram, 100Mbps Over 10m Cat-5e Cable, Preemphasis Enabled
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Analog Devices | 17
MAX22500E/MAX22501E
100Mbps Half-Duplex RS-485/RS-422
Transceivers for Long Cables
Figure 12. Eye Diagram, 50Mbps Over 100m Cat-5e Cable, Preemphasis Disabled
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MAX22500E/MAX22501E
100Mbps Half-Duplex RS-485/RS-422
Transceivers for Long Cables
Figure 13. Eye Diagram, 50Mbps Over 100m Cat-5e Cable, Preemphasis Enabled
Fail-Safe Functionality
The MAX22500E/MAX22501E feature fail-safe receiver inputs, guaranteeing a logic-high on the receiver output (RO)
when the receiver inputs are shorted or open for longer than 10μs (typ). When the differential receiver input voltage
is greater than -50mV [(VA - VB) ≥ -50mV] for more than 10μs (typ), RO is logic-high. For example, in the case of a
terminated bus with all transmitters disabled, the receiver’s differential input voltage is pulled to 0V by the termination
resistor, so (VA - VB = 0V) > -50mV and RO is guaranteed to be a logic-high after 10μs (typ).
Driver Single-Ended Operation
The A and B outputs on the MAX22500E/MAX22501E can be used in the standard differential operating mode or as
single-ended outputs. Because the driver outputs swing rail-to-rail, they can also be used as individual standard TTL logic
outputs.
Hot-Swap Inputs
Inserting circuit boards into a hot or powered backplane can cause voltage transients on DE, RE, and receiver inputs
A and B that can lead to data errors. For example, upon initial circuit board insertion, the processor undergoes a
power-up sequence. During this period, the high impedance state of the output drivers makes them unable to drive the
MAX22500E/MAX22501E enable inputs to a defined logic level. Meanwhile, leakage currents of up to 10μA from the
high-impedance output or capacitively coupled noise from VCC or GND could cause an input to drift to an incorrect
logic state. To prevent such a condition from occurring, the MAX22500E/MAX22501E features hot-swap input circuitry
on DE and RE to safeguard against unwanted driver activation during hot-swap situations. When VCC rises, an internal
pulldown circuit holds DE low and RE high for at least 10μs. After the initial power-up sequence, the internal pulldown/
pullup circuitry becomes transparent, resetting the hot-swap tolerable inputs.
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Analog Devices | 19
MAX22500E/MAX22501E
100Mbps Half-Duplex RS-485/RS-422
Transceivers for Long Cables
Driver Output Protection
Two mechanisms prevent excessive output current and power dissipation caused by faults or by bus contention. The first,
a current limit on the output stage provides immediate protection against short circuits over the whole common-mode
voltage range. The second, a thermal-shutdown circuit, forces the driver outputs into a high-impedance state if the die
temperature exceeds +160°C (typ).
Low-Power Shutdown Mode
The MAX22500E/MAX22501E feature a low-power shutdown mode to reduce supply current when the transceiver is not
needed. Pull the RE input high and the DE input low to put the device in low-power shutdown mode. If the inputs are in
this state for at least 800ns, the parts are guaranteed to enter shutdown. The MAX22500E/MAX22501E draw 5μA (max)
of supply current when the device is in shutdown. The RE and DE inputs can be driven simultaneously. The MAX22500E/
MAX22501E are guaranteed not to enter shutdown if RE is high and DE is low for less than 50ns.
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Analog Devices | 20
MAX22500E/MAX22501E
100Mbps Half-Duplex RS-485/RS-422
Transceivers for Long Cables
Applications Information
Layout Recommendations
Ensure that the preemphasis set resistor (RPSET) is located close to the PSET and GND pins in order to minimize
interference by other signals. Minimize the trace length to the PSET resistor. Additionally, place a ground plane under
RPSET and surround it with ground connections/traces to minimize interference from the A and B switching signals. See
Figure 14.
Figure 14. Sample PSET Resistor Placement
Network Topology
The MAX22500E/MAX22501E transceivers are designed for high-speed bidirectional RS-485/RS-422 data
communications. Multidrop networks can cause impedance discontinuities which affect signal integrity. Maxim
recommends using a point-to-point network topology (Figure 15), instead of a multidrop topology, when communicating
with high data rates. Terminate the transmission line at both ends with the cable’s characteristic impedance to reduce
reflections.
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Analog Devices | 21
MAX22500E/MAX22501E
100Mbps Half-Duplex RS-485/RS-422
Transceivers for Long Cables
3.3V
5V
5V
0.1µF
VL
0.1µF
VCC
VCC
RE
RE
MICROCONTROLLER
RO
R
DE
DI
B
B
A
A
RO
R
DE
D
DI
D
PSET
PSET
MAX22500E
MAX22500E
GND
GND
Figure 15. Point-to-Point Half-Duplex Communication for High Speeds
Ordering Information
PART
MAX22500EATB+
PREEMPHASIS
LOGIC SUPPLY
PIN-PACKAGE
PIN-PITCH (mm)
PACKAGE CODE
Y
Y
TDFN10-EP*
0.5
T1033+2
MAX22500EATB+T
Y
Y
TDFN10-EP*
0.5
T1033+2
MAX22501EATA+
N
N
TDFN8-EP*
0.65
T833+2
MAX22501EATA+T
N
N
TDFN8-EP*
0.65
T833+2
MAX22501EAUA+
N
N
μMAX8
0.65
U8+1
MAX22501EAUA+T
N
N
μMAX8
0.65
U8+1
+ Denotes a lead (Pb)-free/RoHS-compliant package.
* EP = Exposed Pad
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Analog Devices | 22
MAX22500E/MAX22501E
100Mbps Half-Duplex RS-485/RS-422
Transceivers for Long Cables
Revision History
REVISION
NUMBER
REVISION
DATE
PAGES
CHANGED
0
6/17
Initial release
1
6/20
Added MAX22501EAUA+ and MAX22501EAUA+T to the Ordering Information section;
updated the Benefits and Features section and Table 2; added TOC14; fixed various typos
2
2/21
Updated the General Description, Electrical Characteristics, Pin Configurations, and Pin
Description sections
3
12/21
Updated the Hot-Swap Inputs section and Simplified Block Diagram
DESCRIPTION
—
1, 5–6,
14–16, 25
4, 6, 12–14
1, 19
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is
assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may
result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of
their respective owners.
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Analog Devices | 23
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