MAX40213EWA+T

Click here to ask an associate for production status of specific part numbers. MAX40213 Transimpedance Amplifier with Selectable Gain and Input Current Clamp General Description Benefits and Features The MAX40213 is a transimpedance amplifier for optical distance measurement receivers in LiDAR applications. Low noise, high gain, low group delay, and fast recovery from overload make this TIA ideal for distance-measurement applications. Important features include 1.1pA/√Hz input-referred noise density, an internal 2A input clamp, pin-selectable 150kΩ and 750kΩ transimpedance (into a 1kΩ load), and wide bandwidth (300MHz, typ). An offset current input allows optional adjustment of input offset current. The MAX40213 has a shutdown (SD) control input that reduces the supply current to 0.01μA. This transimpedance amplifier is available in a 8-bump WLP, and is specified over the -40°C to +85°C operating temperature range. ● ● ● ● Optimized for CIN = 0.25pF to 5pF Bandwidth = 300MHz (typ) 1.1pA/√Hz Input-Referred Noise Two Pin-Selectable Transimpedance Values (RL = 1kΩ) • 150kΩ • 750kΩ ● ● ● ● ● ● Internal Clamp for Input Current up to 2A (Transient) Fast Overload Recovery: 25ns at 100mA Offset Input Provides Offset Adjust Feature SD Input Shuts Down Internal Circuitry 3.3V Operation 1.75mm x 1.24mm, 8-Bump WLP Applications ● Optical Distance Measurement ● LIDAR Receivers ● Industrial Safety Systems Typical Application Circuit 3.3V 3.3V VCC VCC SD MAX40213 VCC CURRENT CLAMP BIAS BLOCK 50Ω IN OUTP 1kΩ APD VBIAS OUTN OFFSET 50Ω VCC -VPD GND Ordering Information appears at end of data sheet. GAIN 19-100801; Rev 2; 11/21 © 2021 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. One Analog Way, Wilmington, MA 01887 U.S.A. | Tel: 781.329.4700 | © 2021 Analog Devices, Inc. All rights reserved. MAX40213 Transimpedance Amplifier with Selectable Gain and Input Current Clamp TABLE OF CONTENTS General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Benefits and Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Typical Application Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 8 WLP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Typical Operating Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 WLP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Detailed Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Gain Stage 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Gain Stage 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Gain Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 OFFSET Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 SD Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Applications Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Photodiode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Supply Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Layout Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Typical Application Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 AC-Coupled APD Receiver TIA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 www.analog.com Analog Devices | 2 MAX40213 Transimpedance Amplifier with Selectable Gain and Input Current Clamp LIST OF FIGURES Figure 1. AC-Coupled APD Receiver TIA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 www.analog.com Analog Devices | 3 MAX40213 Transimpedance Amplifier with Selectable Gain and Input Current Clamp LIST OF TABLES Table 1. Gain Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 www.analog.com Analog Devices | 4 MAX40213 Transimpedance Amplifier with Selectable Gain and Input Current Clamp Absolute Maximum Ratings Voltage at VCC ...................................................... -0.3V to +3.6V Current into IN (10ns pulse, 0.5% duty cycle) ......................... -2A Current into IN, OFFSET (Continuous) ............. -10mA to +10mA Current into LP, GAIN (Continuous) .................. -10mA to +10mA Current into OUTP and OUTN (Continuous) ..... -20mA to +20mA Voltage at OUTN, OUTP ............................................ VCC + 0.3V Voltage at OFFSET, LP, GAIN ..................... -0.3V to VCC + 0.3V Operating Temperature Range .............................-40°C to +85°C Storage Temperature Range ..............................-55°C to +150°C Soldering Temperature (reflow) ........................................ +260°C Continuous Power Dissipation (TA = +85°C, derate 11.4mW/°C above +70°C (multilayer board)) ................................1951.20mW Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Package Information 8 WLP Package Code W81D1+1 Outline Number 21-100412 Land Pattern Number N/A Thermal Resistance, Four-Layer Board: Junction to Ambient (θJA) 87.71°C/W Junction to Case (θJC) N/A For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial. Electrical Characteristics (VCC = +2.9V to +3.5V, 1kΩ AC-coupled load between OUTN and OUTP, TA = -40°C to +85°C, CIN = 0.5pF (Note 1)) PARAMETER Input Bias Voltage Transimpedance Transimpedance Linearity OFFSET Input Transimpedance Overload Recovery Time Gain Change Delay Output Common-Mode Voltage www.analog.com SYMBOL VBIAS Z21 CONDITIONS MIN IN and OFFSET TYP MAX UNITS 0.78 0.95 V GAIN < VIL, IIN = 500nAP-P 80 150 220 GAIN > VIH, IIN = 100nAP-P 400 750 1100 GAIN > VIH, Z21 = 750kΩ, I1 = -0.1μA, I2 = -0.4μA (Note 2) -19 GAIN < VIL, Z21 = 150kΩ, I1 = -0.5μA, I2 = -2μA (Note 2) kΩ +19 % -4 +4 GAIN < VIL, IIN = 500nAP-P 80 150 220 GAIN > VIH, IIN = 100nAP-P 400 750 1100 IIN = 1mA 25 IIN = 10mA 25 IIN = 100mA 25 Delay from change of GAIN state to correct selected gain. 200 VCC 0.9 VCC 0.5 kΩ ns ns VCC 0.24 V Analog Devices | 5 MAX40213 Transimpedance Amplifier with Selectable Gain and Input Current Clamp Electrical Characteristics (continued) (VCC = +2.9V to +3.5V, 1kΩ AC-coupled load between OUTN and OUTP, TA = -40°C to +85°C, CIN = 0.5pF (Note 1)) PARAMETER SYMBOL Differential Output Offset ΔVOUT Output Impedance ZOUT Maximum Differential Output Voltage Swing Input Resistance VOUT(MAX) CONDITIONS MIN TYP IIN = 0mA, GAIN = GND 10 IIN = 0mA, GAIN = VCC 50 Single-ended 40 IIN = 0mA to -200µA pulse, GAIN = GND IIN = 0mA to -200µA pulse, GAIN = VCC MAX mV 50 65 440 900 1,470 500 1,000 1,500 RIN UNITS 175 Ω mV Ω AC SPECIFICATIONS Bandwidth BW Input Noise Density GAIN = GND (Note 3) 300 GAIN = VCC (Note 3) 300 f = 10MHz 1.1 MHz pA/√Hz POWER SUPPLY Power Supply Current Power Supply Current ICC GAIN = GND or GAIN = VCC SD = VCC 30 55 mA GAIN = GND or GAIN = VCC SD = GND 0.01 2 µA Time from SD > VIL to output commonmode voltage 90% of nominal value. Measured at OUTP and OUTN. Shutdown De-Assert Delay 15 μs LOGIC DC CHARACTERISTICS Input Logic 0 VIL GAIN, SD -0.3 +0.8 V Input Logic 1 VIH GAIN, SD 2.0 VCC + 0.3 V ±1.0 µA Logic Input Current GAIN, SD, -0.3 < VIN < VCC + 0.3V ±0.001 Note 1: Limits are 100% tested at TA = +25°C. Limits over the operating temperature range and relevant supply voltage range are guaranteed by design and characterization. Note 2: Linearity is calculated as follows: For 150kΩ transimpedance, linearity = (large signal gain at -2μA – large signal gain at -0.5μA)/large signal gain at -0.5μA, where large signal gain at X is (VOUT at I_IN = X - VOUT at I_IN = 0)/X. For 750kΩ transimpedance, linearity = (large signal gain at -0.4μA – large signal gain at -0.1μA)/large signal gain at -0.1μA, where large signal gain at X is (VOUT at I_IN = X VOUT at I_IN = 0)/X. Note 3: -3dB bandwidth is measured relative to the gain at 10MHz. www.analog.com Analog Devices | 6 MAX40213 Transimpedance Amplifier with Selectable Gain and Input Current Clamp Typical Operating Characteristics www.analog.com Analog Devices | 7 MAX40213 Transimpedance Amplifier with Selectable Gain and Input Current Clamp Typical Operating Characteristics (continued) www.analog.com Analog Devices | 8 MAX40213 Transimpedance Amplifier with Selectable Gain and Input Current Clamp Typical Operating Characteristics (continued) www.analog.com Analog Devices | 9 MAX40213 Transimpedance Amplifier with Selectable Gain and Input Current Clamp Pin Configuration WLP TOP VIEW MAX40213EWA+ 2 3 4 A GAIN OFFSET VCC OUTN B SD IN GND OUTP + 1 WLP Pin Description PIN NAME A1 GAIN FUNCTION A2 OFFSET A3 VCC A4 OUTN B1 SD Enable/Shutdown Input. VCC = normal operation, GND = shutdown. B2 IN Signal Input. Connect to photodiode cathode through a coupling capacitor when using positive bias voltage at cathode. Connect to photodiode cathode when using negative bias voltage at anode. Gain Select Input 1. Connect to GND or VCC to select the gain. Offset Adjustment Input. Sink current from this input to adjust the effective input offset current. If offset adjustment is not needed, this pin should be left unconnected. +3.3V Supply Voltage Negative 50Ω Output. Increasing input current causes OUT- to decrease. B3 GND Circuit Ground B4 OUTP Positive 50Ω Output. Increasing input current causes OUT+ to increase. www.analog.com Analog Devices | 10 MAX40213 Transimpedance Amplifier with Selectable Gain and Input Current Clamp Detailed Description Gain Stage 1 When a photodiode with negative bias voltage is connected to the TIA input, the signal current flows out of the amplifier's summing node and into the photodiode. The input current flows through an internal load resistor to develop a voltage that is then applied to the input of the second stage. An internal clamp circuit protects against input currents as high as 2A for a 10ns pulse at 0.5% duty cycle. (Longer pulses or higher duty cycles will reduce this value.) The clamp circuit also maintains very fast overload recovery times (about 2ns) for input currents up to 100mA (see the Typical Operating Characteristics). A photodiode with positive bias voltage may be used if it is capacitively coupled to the TIA input. If a photodiode with positive bias voltage is DC-coupled to the TIA input, the TIA will provide gain; however, the maximum input current will be limited to about -2A at 10ns pulse and 0.5% duty cycle. Gain Stage 2 The second gain stage provides additional gain and converts the transimpedance amplifier's single-ended output into a differential signal. This stage is designed to drive a 100Ω to 1kΩ differential load between OUT+ and OUT-. For optimum supply noise rejection, the outputs should be terminated with a differential load. The outputs are not intended to drive a DC-coupled grounded load. The outputs should be AC-coupled or terminated to VCC. If a single-ended output is required, both the used and unused outputs should be terminated in a similar manner. Gain Selection The GAIN input selects the overall transimpedance as shown in Table 1. After changing the GAIN logic level, the new gain is in effect within 200ns. Table 1. Gain Selection GAIN LOGIC LEVEL NOMINAL TRANSIMPEDANCE 0 150kΩ 1 750kΩ OFFSET Input OFFSET is a current input. The offset input current, IOFFSET, is the current flowing from the OFFSET pin. This current affects the TIA's output voltage with a polarity opposite that of the current flowing from IN, so it may be used to effectively apply an offset to the output voltage (see Typical Operating Characteristics). OFFSET can be used to adjust the output offset voltage in a negative direction. The OFFSET pin is biased to the same voltage as the IN pin. The use of OFFSET is optional. If the OFFSET function is not required, simply leave this input unconnected. Do not bypass this input with a capacitor. SD Input The MAX40213's SD (shutdown) input accepts a logic signal that can be used to shut down the TIA. Driving this input with a logic-high enables the TIA, while a logic-low disables the circuit and reduces the supply current to 0.01µA (typ). The transimpedance amplifier takes 15μs for the output common-mode voltage return to active mode from shutdown mode. www.analog.com Analog Devices | 11 MAX40213 Transimpedance Amplifier with Selectable Gain and Input Current Clamp Applications Information Photodiode Noise performance and bandwidth are adversely affected by capacitance on a TIA's input node. Although the MAX40213 is less sensitive than most TIAs to input capacitance, it is good practice to minimize any unnecessary capacitance. The MAX40213 is optimized for 0.5pF to 5pF of capacitance on the input. Selecting a low-capacitance photodiode helps to minimize the total input capacitance on the input pin, thereby improving noise and bandwidth performance. Supply Filter Sensitive optical receivers require wide-band power supply decoupling. Power supply bypassing should provide low impedance between VCC and ground for frequencies between 10kHz and 700MHz. Isolate the amplifier from noise sources with LC supply filters and shielding. Place a supply filter as close to the amplifier as possible. Layout Considerations Some critical layout guidelines are listed below. ● A differential microstrip is the recommended layout for the TIA's outputs with terminations done close to the outputs. Care must be taken to avoid unwanted stubs by removing ground below the traces that are not part of the 50Ω termination line leading into input pins. The parasitic capacitance created between traces and ground slow down and even distort the signals by creating reflections on the path. ● The input trace connecting the photodiode to IN should be as short as possible and have ground etched or removed underneath. This will reduce or avoid unwanted parasitic capacitance created in the PCB. Having longer trace lengths increases the parasitic inductance in signal trace paths. ● Use a PC board with a low-impedance ground plane. ● Mount one or more 10nF ceramic capacitors between GND and VCC as close to the pins as possible. Multiple bypass capacitors help to reduce the effect of trace impedance and capacitor ESR. ● Choose bypass capacitors for minimum inductance and ESR. ● When AC-coupling the outputs, use a 1kΩ termination resistor connected directly between OUTP and OUTN after the AC-coupling capacitors, if practical. If the destination inputs cannot be located adjacent to the outputs, use a 100Ω microstrip between the output pins and the termination resistor, which should be close to the inputs of the destination component. This avoids the creation of stub beyond the termination resistor, which causes reflections. The added length of the differential trace has less degrading effects than added stub length. ● Minimize any parasitic layout inductance. ● It is recommended to use higher performance substrate materials (e.g., Rogers). www.analog.com Analog Devices | 12 MAX40213 Transimpedance Amplifier with Selectable Gain and Input Current Clamp Typical Application Circuits AC-Coupled APD Receiver TIA 3.3V 3.3V VCC VCC +VPD SD MAX40213 VCC CURRENT CLAMP BIAS BLOCK 50Ω IN OUTP 1kΩ VBIAS APD OUTN OFFSET 50Ω VCC GND GAIN Figure 1. AC-Coupled APD Receiver TIA The APD's cathode is connected through a coupling capacitor to the TIA's input, with the anode connected to ground. The bias voltage in this case is positive and is connected to the cathode through a resistor. Incident light pulses cause current to flow from the IN pin and into the APD. This input current also flows through an internal resistor to create a voltage, which is then amplified by the second stage to create a differential output signal that can drive a high-speed ADC or comparator. Ordering Information TEMPERATURE RANGE PIN-PACKAGE TOP MARK MAX40213EWA+ PART NUMBER -40°C to +85°C 8 WLP +AAR MAX40213EWA+T -40°C to +85°C 8 WLP +AAR + Denotes a lead(Pb)-free/RoHS-compliant package. T = Tape-and-reel www.analog.com Analog Devices | 13 MAX40213 Transimpedance Amplifier with Selectable Gain and Input Current Clamp Revision History REVISION NUMBER REVISION DATE 0 10/20 Release for intro 1 5/21 Changed part number and temperature range throughout; updated Typical Operating Characteristics, Pin Configuration, and Ordering Information sections 2 11/21 Updated timing specification in SD Input section DESCRIPTION PAGES CHANGED — 1, 5–10, 13 11 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks andregistered trademarks are the property of their respective owners. w w w . a n a l o g . c o m Analog Devices | 14