MAX4444ESE/GG8

19-1543; Rev 0; 10/99 ILABLE N KIT AVA EVALUATIO Ultra-High-Speed, Low-Distortion, Differentialto-Single-Ended Line Receivers with Enable Features ♦ 5000V/µs Slew Rate (MAX4444) ♦ +2V/V Internally Fixed Gain (MAX4444) ♦ External Gain Selection (MAX4445, AVCL ≥ +2V/V) ♦ 550MHz -3dB Bandwidth ♦ -60dB SFDR at 5MHz ♦ Low Differential Gain/Phase: 0.07%/0.05° ♦ Low Noise: 25nV/√Hz at fIN = 100kHz ♦ Low-Power Disable Mode Reduces Quiescent Current to 3.5mA Applications Ordering Information Differential-to-Single-Ended Conversion Twisted-Pair to Coaxial Converter PART High-Speed Instrumentation Amplifier Data Acquisition TEMP. RANGE PIN-PACKAGE MAX4444ESE -40°C to +85°C 16 Narrow SO MAX4445ESE -40°C to +85°C 16 Narrow SO Medical Instrumentation High-Speed Differential Line Receiver Typical Operating Circuit +5V TOP VIEW 0.1µF IN+ SIGNAL INPUT Pin Configuration VCC 1 16 GND VCC 2 15 OUT 14 VEE IN- 3 EN 75Ω VCC N.C. (RG) 4 OUTPUT OUT MAX4444 VEE 75Ω IN- REF GND 0.1µF N.C. (RG) 5 MAX4444 MAX4445 13 VEE 12 VEE IN+ 6 11 VEE VEE 7 10 REF VEE 8 9 EN SO -5V ( ) ARE FOR MAX4445 ONLY. ________________________________________________________________ Maxim Integrated Products 1 For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. For small orders, phone 1-800-835-8769. MAX4444/MAX4445 General Description The MAX4444/MAX4445 differential line receivers offer unparalleled high-speed, low-distortion performance. Using a three op amp instrumentation amplifier architecture, these ICs have symmetrical differential inputs and a single-ended output. They operate from ±5V supplies and are capable of driving a 100Ω load to ±3.7V. The MAX4444 has an internally set closed-loop gain of +2V/V, while the MAX4445 is compensated for gains of +2V/V or greater, set by an external resistor. A low-power enable mode reduces current consumption to 3.5mA. Using current-feedback techniques, the MAX4444/ MAX4445 achieve a 550MHz bandwidth while maintaining up to a 5000V/µs slew rate. Excellent differential gain/phase and noise specifications make these amplifiers ideal for a wide variety of video and RF signal-processing applications. An evaluation kit is available to speed design. MAX4444/MAX4445 Ultra-High-Speed, Low-Distortion, Differentialto-Single-Ended Line Receivers with Enable ABSOLUTE MAXIMUM RATINGS VCC to VEE ...........................................................................+12V Voltage on IN+, IN-, EN, OUT+, OUT-, RG, REF..............................(VEE - 0.3V) to (VCC + 0.3V) Current Into IN+, IN-, RG, EN .............................................20mA Output Short-Circuit Duration ...........................Indefinite to GND Continuous Power Dissipation (TA = +70°C) 16-Pin Narrow SO (derate 20mW/°C above +70°C) ...1600mW Operating Temperature Range ...........................-40°C to +85°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10sec) .............................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS (VCC = +5V, VEE = -5V, VEN = ≥2V, VCM = 0 , RL = ∞, REF = GND, AVCL = +2V/V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL Operating Supply Voltage Range CONDITIONS MIN TYP ±4.5 ±5.5 V 2.9 V VCM Guaranteed by CMRR test -2.9 Differential Input Voltage Range VDIFF Guaranteed by output swing test -1.7 Input Offset Voltage VOS 15 TCVOS 12 Input Bias Current IOS Differential Input Resistance RIN Gain 10 IB Input Offset Current AV -2.9V ≤ VIN ≤ +2.9V -2.9V ≤ VCM ≤ +2.9V -3V ≤ VOUT ≤ +3V Gain Error -3V ≤ VOUT ≤ +3V, RL = 100Ω Gain-Error Drift RL = 100Ω Output Voltage Swing VOUT UNITS Guaranteed by PSRR test Input Common-Mode Voltage Range Input Offset-Voltage Temperature Coefficient MAX MAX4444 MAX4445 MAX4444 V 65 mV µV/°C 55 µA 0.25 45 82 170 2 (1 + 600/RG) 0.5 2 µA 2.6 MAX4445 1.7 8 0.003 RL = 100Ω ±3.4 ±3.7 RL = 50Ω ±3.3 ±3.6 kΩ V/V % %/°C V Output Current Drive IOUT RL = 30Ω 90 120 mA Power-Supply Rejection Ratio PSRR VS = ±4.5V to ±5.5V 53 70 dB Common-Mode Rejection Ratio CMRR -2.9V ≤ VCM ≤ +2.9V 40 55 dB Disable Output Resistance ROUT(OFF) VEN = 0, -3.5V ≤ VOUT ≤ +3.5V, MAX4444 1.8 V 10 µA 2.6 10 µA 41 55 3.5 5.5 VIL EN Logic High Threshold VIH EN Logic Input Low Current IIL VEN = 0 2.2 EN Logic Input High Current IIH VEN = 5V VIN = 0, VEN = 5V VIN = 0, VEN = 0 Quiescent Current 2 IQ kΩ 0.8 EN Logic Low Threshold 2 V _______________________________________________________________________________________ mA Ultra-High Speed, Low-Distortion, Differentialto-Single-Ended Line Receivers with Enable MAX4444/MAX4445 AC ELECTRICAL CHARACTERISTICS (VCC = +5V, VEE = -5V, VEN = 5V, RL = 100Ω, REF = GND, AVCL = +2V/V, TA = +25°C, unless otherwise noted.) PARAMETER SYMBOL CONDITION MIN TYP MAX UNITS Small-Signal -3dB Bandwidth BWSS VOUT = 100mVp-p 550 MHz Large-Signal -3dB Bandwidth BWLS VOUT = 2Vp-p 500 MHz VOUT = 100mVp-p 80 MHz 0.1dB Gain Flatness VOUT = 4V step Slew Rate (Note 1) SR Rise Time (Note 1) VOUT = 2V step MAX4444 MAX4445 3800 MAX4444 2400 MAX4445 2000 VOUT = 1V step 1200 VOUT = 0.5V step 600 tRISE Fall Time (Note 1) tFALL Settling Time 650 VOUT = 4V step 825 VOUT = 2V step 700 VOUT = 1V step 700 VOUT = 0.5V step 700 Settle to 0.1% , VOUT = 2V step SFDR VOUT = 2Vp-p 2nd-Harmonic Distortion VOUT = 2Vp-p 3rd-Harmonic Distortion 5000 VOUT = 2Vp-p 12 fC = 100kHz -65 fC = 5MHz -60 fC = 20MHz -55 fC = 100MHz -35 fC = 100kHz -65 fC = 5MHz -62 fC = 20MHz -50 fC = 100MHz -35 fC = 100kHz -90 fC = 5MHz -72 fC = 20MHz -62 fC = 100MHz V/µs V/µs ps ps ns dBc dBc dBc -55 Differential Phase Error DP NTSC, RL = 150Ω 0.05 Differential Gain Error DG NTSC, RL = 150Ω 0.07 % Input Noise Voltage Density eN f = 100kHz (Note 2) 25 nV/√Hz iN f = 100kHz 1.8 pA/√Hz ZOUT f = 10MHz 0.7 Ω Input Noise Current Density Output Impedance degrees Enable Time tSHDN(ON) VIN = 1V, VOUT settle to within 10% 80 ns Disable Time tSHDN(OFF) VIN = 1V, VOUT settle to within 10% 200 ns Power-Up Time tON VIN = 1V, VOUT settle to within 10% 0.5 µs Power-Down Time tOFF VIN = 1V, VOUT settle to within 10% 0.3 µs Note 1: Input step voltage has