EVALUATION KIT AVAILABLE
MAX4581L/MAX4582L/
MAX4583L
Low-Voltage, CMOS Analog
Multiplexers/Switches
General Description
Features
The MAX4581L/MAX4582L/MAX4583L are low-voltage,
CMOS analog ICs configured as an 8-channel multiplexer
(MAX4581L), two 4-channel multiplexers (MAX4582L),
and three single-pole/double-throw (SPDT) switches
(MAX4583L).
●● +3V Logic-Compatible Inputs (VIH = 2.0V, VIL = 0.8V)
●● Guaranteed On-Resistance: 80Ω with +12V Supply
●● Guaranteed 4Ω On-Resistance Match Between
Channels
These CMOS devices operate with a +2V to +12V single
supply. Each switch can handle rail-to-rail analog signals.
Off-leakage current is only 2nA at +25°C.
●● Guaranteed Low Off-Leakage Current: 2nA at +25°C
All digital inputs have 0.8V to 2.0V logic thresholds to
ensure TTL/CMOS-logic compatibility when using a +12V
supply.
●● TTL/CMOS-Logic Compatible
●● Guaranteed Low On-Leakage Current: 2nA at +25°C
●● +2V to +12V Supply Operation
●● Low Crosstalk: -96dB (MAX4582L)
●● High Off-Isolation: -90dB
Applications
●● Tiny 4mm x 4mm Thin QFN Package
●● Audio and Video Signal Routing
●● Pin Compatible with Industry-Standard
74HC4051/74HC4052/74HC4053 and MAX4051/
MAX4052/MAX4053
●● Data-Acquisition Systems
●● Communications Circuits
●● DSL Modem
Ordering Information
PART
TEMP RANGE
PIN-PACKAGE
MAX4581LESE -40°C to +85°C 16 Narrow SO
MAX4581LEEE -40°C to +85°C 16 QSOP
MAX4581LETE -40°C to +85°C 16 TQFN-EP* (4mm x 4mm)
Ordering Information continued at end of data sheet.
*EP = Exposed pad.
Pin Configurations/Functional Diagrams
TOP VIEW
MAX4581L
MAX4583L
X6
X4
VCC
X2
Y2
Y0
VCC
X2
Y0
Y1
VCC
Y
MAX4582L
16
15
14
13
16
15
14
13
16
15
14
13
Y
1
12 X1
Z1
1
12 X
X7
2
11 X0
Y3
2
11 X
Z
2
11 X1
X5
3
10 X3
Y1
3
10 X0
Z0
3
10 X0
ENABLE
4
A ENABLE
4
X3 ENABLE
4
9
5
B
GND
THIN QFN
6
7
8
5
GND
8
A
7
9
B
6
C
LOGIC
GND
GND
5
9
GND
LOGIC
THIN QFN
PIN CONFIGURATIONS/FUNCTIONAL DIAGRAMS CONTINUED AT END OF DATA SHEET.
19-2941; Rev 2; 5/14
6
7
8
B
12 X1
C
1
GND
X
THIN QFN
A
MAX4581L/MAX4582L/
MAX4583L
Low-Voltage, CMOS Analog
Multiplexers/Switches
Absolute Maximum Ratings
(All Voltages Referenced to GND, Unless Otherwise Noted.)
VCC.........................................................................-0.3V to +13V
Voltage At Any Pin (Note 1)...........(GND - 0.3V) to (VCC + 0.3V)
Continuous Current into Any Terminal...............................±20mA
Peak Current X_, Y_ or Z_
(pulsed at 1ms, 10% duty cycle)...................................±40mA
ESD per Method 3015.7...................................................>2000V
Continuous Power Dissipation (TA = +70°C)
16-Pin Narrow SO (derate 8.7mW/°C above +70°C)...696mW
16-Pin QSOP (derate 8.3mW/°C above +70°C)..........667mW
16-Pin Thin QFN (derate 16.9mW/°C above +70°C).1349mW
Operating Temperature Range............................ -40°C to +85°C
Storage Temperature Range............................. -65°C to +150°C
Junction Temperature.......................................................+150°C
Lead Temperature (soldering, 10s).................................. +300°C
Note 1: Voltages exceeding VCC or GND on any signal terminal are clamped by internal diodes. Limit forward-diode current to
maximum current rating.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Electrical Characteristics
(VCC = +12V ±5%, V_H = 2.0V, V_L = 0.8V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Notes 2, 3)
PARAMETER
SYMBOL
CONDITIONS
TEMP
MIN
-40°C to +85°C
0
TYPE
(NOTE3)
MAX
UNITS
VCC
V
ANALOG SWITCH
Analog Signal Range
VX, VY, VZ
Switch On-Resistance
RON
VCC = 11.4V; IX, IY, IZ = 1mA;
VX, VY, VZ = 10V
+25°C
ΔRON
VCC = 11.4V; IX, IY, IZ = 1mA;
VX, VY, VZ = 10V (Note 4)
+25°C
Switch On-Resistance
Flatness
RFLAT(ON)
VCC = 11.4V; IX, IY, IZ = 1mA;
VX_, VY_, VZ_ = 1.5V, 6V, 10V
(Note 5)
+25°C
X_, Y_, Z_ Off-Leakage
IX_(OFF),
IY_(OFF),
IZ_(OFF)
VCC = 12.6V;
VX_, VY_, VZ_ = 1V, 10V;
VX, VY, VZ = 10V, 1V (Note 6)
+25°C
-2
+2
-40°C to +85°C
-10
+10
VCC = 12.6V;
MAX4581L
VX_, VY_,
VZ_ =1V, 10V;
VX, VY, VZ = 10V, MAX4582L/
MAX4583L
1V (Note 6)
+25°C
-2
+2
X, Y, Z Off-Leakage
IX(OFF),
IY(OFF),
IZ(OFF)
Switch On-Resistance
Match Between Channels
X, Y, Z On-Leakage
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IX(ON),
IY(ON),
IZ(ON)
VCC = 12.6V;
VX, VY,
VZ = 10V,
1V (Note 6)
MAX4581L
50
-40°C to +85°C
1
-40°C to +85°C
5
15
-100
+100
-2
+2
-40°C to +85°C
-50
+50
+25°C
-2
+2
-100
+100
-2
+2
-50
+50
MAX4582L/ +25°C
MAX4583L -40°C to +85°C
Ω
12
+25°C
-40°C to +85°C
Ω
4
5
-40°C to +85°C
-40°C to +85°C
80
100
Ω
nA
nA
nA
Maxim Integrated │ 2
MAX4581L/MAX4582L/
MAX4583L
Low-Voltage, CMOS Analog
Multiplexers/Switches
Electrical Characteristics (continued)
(VCC = +12V ±5%, V_H = 2.0V, V_L = 0.8V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Notes 2, 3)
PARAMETER
SYMBOL
CONDITIONS
TEMP
MIN
TYPE
(NOTE3)
MAX
UNITS
1.5
2.0
V
DIGITAL I/O (INH, ADD_)
Logic Input High
Threshold
VAH, VBH,
VCH,
VENABLE_H
-40°C to +85°C
Logic Input Low
Threshold
VAL, VBL,
VCL,
VENABLE_L
-40°C to +85°C
0.8
1.5
V
Input Current High
IAH, IBH, ICH, VA, VB, VC,
IENABLE_H VENABLE = 2.0V
+25°C
-1
+1
µA
Input Current Low
IAL, IBL, ICL, VA, VB, VC,
IENABLE_L VENABLE = 0.8V
+25°C
-1
+1
µA
SWITCH DYNAMIC CHARACTERISTICS
Enable Turn-On Time
tON
VX_, VY_, VZ_ = 10V,
RL = 300Ω, CL = 35pF,
Figure 1
+25°C
Enable Turn-Off Time
tOFF
VX_, VY_, VZ_ = 10V,
RL = 300Ω,
CL = 35pF, Figure 1
+25°C
VX_, VY_, VZ_ = 10V,
RL = 300Ω, CL = 35pF,
Figure 2
+25°C
Address Transition Time
tTRANS
Break-Before-Make Time
tBBM
Charge Injection
(Note 7)
Q
100
-40°C to +85°C
200
40
-40°C to +85°C
90
-40°C to +85°C
200
200
ns
ns
ns
VX_, VY_, VZ_ = 10V,
RL = 300Ω,
CL = 35pF, Figure 3
-40°C to +85°C
20
ns
CL = 1nF, RS = 0Ω, VS = 0V,
Figure 4
+25°C
0.5
pC
+25°C
4
pF
CX_(OFF),
CY_(OFF),
CZ_(OFF)
VX_, VY_, VZ_ = 0V,
ƒ = 1MHz, Figure 5
VX_, VY_,
VZ_ = 0V,
ƒ = 1MHz,
Figure 5
MAX4581L
18
Output Off-Capacitance
CX(OFF),
CY(OFF),
CZ(OFF)
MAX4582L +25°C
10
MAX4583L
6
CX(OFF),
CY(OFF),
CZ(OFF)
VX_, VY_,
VZ_ = 0V,
ƒ = 1MHz,
Figure 5
MAX4581L
25
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100
150
Input Off-Capacitance
Output On-Capacitance
200
MAX4582L +25°C
MAX4583L
17
pF
pF
12.5
Maxim Integrated │ 3
MAX4581L/MAX4582L/
MAX4583L
Low-Voltage, CMOS Analog
Multiplexers/Switches
Electrical Characteristics (continued)
(VCC = +12V ±5%, V_H = 2.0V, V_L = 0.8V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Notes 2, 3)
PARAMETER
SYMBOL
CONDITIONS
TEMP
MIN
TYPE
(NOTE3)
MAX
UNITS
Off-Isolation
VISO
RL = 50Ω, ƒ = 1MHz
(Figure 7)
+25°C
-90
dB
Channel-to-Channel
Crosstalk
VCT
RL = 50Ω, ƒ = 1MHz
(Figure 7)
+25°C
-96
dB
Total Harmonic Distortion
THD
RL = 600Ω,
VX_ or VY_ or VZ_ = 5VP-P,
ƒ = 20Hz to 20kHz
+25°C
0.02
%
POWER SUPPLY
VCC
Power-Supply Range
VCC = 12.6V; VA, VB, VZ,
VENABLE = VCC or 0V
ICC
Power-Supply Current
2
12.6
+25°C
-1
+1
-40°C to +85°C
-10
+10
V
µA
Note
Note
Note
Note
2: Thin QFN packages are production tested at TA = +85°C. Limits over temperature are guaranteed by design.
3: The algebraic convention used in this data sheet is where the most negative value is the minimum column.
4: ∆RON = RON(MAX) - RON(MIN).
5: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the
specified analog signal ranges.
Note 6: Leakage parameters are 100% tested at the maximum-rated hot operating temperature and guaranteed by design at
TA = +25°C.
Note 7: Guaranteed by design, not production tested.
Typical Operating Characteristics
(VCC = 12V, VEN = GND, TA = +25°C, unless otherwise noted.)
70
60
50
40
30
80
70
50
40
30
20
20
10
10
0
0
1
2 3
4
5
6
7
VCOM (V)
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8
9 10 11 12
TA = +70°C TA = +85°C
60
0
TA = -40°C
0
1
2 3
TA = +25°C
TA = 0°C
4
5
6
7
VCOM (V)
8
9 10 11 12
100
OFF-LEAKAGE CURRENT
vs. TEMPERATURE
MAX4581L/2L/3L toc03
ON-RESISTANCE (Ω)
80
90
OFF-LEAKAGE CURRENT (nA)
MAX4581L/2L/3L toc01
90
100
ON-RESISTANCE (Ω)
100
ON-RESISTANCE vs. VCOM
MAX4581L/2L/3L toc02
ON-RESISTANCE vs. VCOM
10
1
0.1
IX, IY, IZ
0.01
0.001
0.0001
IX_, IY_, IZ_
-40 -25 -10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
Maxim Integrated │ 4
MAX4581L/MAX4582L/
MAX4583L
Low-Voltage, CMOS Analog
Multiplexers/Switches
Typical Operating Characteristics (continued)
(VCC = 12V, VEN = GND, TA = +25°C, unless otherwise noted.)
1
0.1
8
7
6
5
4
3
VINH, VA, VB, VC = 0V OR VCC
100
10
1
2
0.01
MAX4581L/2L/3L toc06
9
SUPPLY CURRENT
vs. TEMPERATURE
1000
MAX4581L/2L/3L toc05
MAX4581L/2L/3L toc04
10
10
CHARGE INJECTION (pC)
ON-LEAKAGE CURRENT (nA)
100
CHARGE INJECTION vs. VCOM
SUPPLY CURRENT (nA)
ON-LEAKAGE CURRENT
vs. TEMPERATURE
0.1
1
0
0 1
4
5
6
7
0.01
8 9 10 11 12
-40 -25 -10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
TOTAL HARMONIC DISTORTION
vs. FREQUENCY
FREQUENCY RESPONSE
600Ω IN AND OUT
10
0.001
90
60
ON-LOSS
30
-10
-30
GAIN (dB)
0.01
MAX4581L/2L/3L toc08
30
MAX4581L/2L/3L toc07
0.1
-50
-70
-90
0
ON-PHASE
-30
-60
OFF-ISOLATION
-90
CROSSTALK
-120
-110
0.0001
10
100
1k
10k
100k
0.001
0.01
0.1
1
10
100
FREQUENCY (Hz)
FREQUENCY (MHz)
SUPPLY CURRENT
vs. LOGIC-LEVEL VOLTAGE
LOGIC-LEVEL THRESHOLD
vs. SUPPLY VOLTAGE
MAX4581L/2L/3L toc09
10,000
1000
100
10
1
0.1
0.01
0.001
0.0001
-130
2.0
1000
-150
MAX4581L/2L/3L toc10
TOTAL HARMONIC DISTORTION (%)
3
VCOM (V)
TEMPERATURE (°C)
SUPPLY CURRENT (µA)
2
PHASE (DEGREES)
-40 -25 -10 5 20 35 50 65 80 95 110 125
1.8
LOGIC-LEVEL THRESHOLD (V)
0.001
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
1
2
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3 4 5 6 7 8 9 10 11 12
LOGIC-LEVEL VOLTAGE (V)
0
0
1
2
3
4
5
6
7
8
9 10 11 12
SUPPLY VOLTAGE (V)
Maxim Integrated │ 5
MAX4581L/MAX4582L/
MAX4583L
Low-Voltage, CMOS Analog
Multiplexers/Switches
Pin Description
PIN
MAX4581L
MAX4582L
NAME
MAX4583L
FUNCTION
SO/QSOP
QFN
SO/QSOP
QFN
SO/QSOP
QFN
1, 2, 4, 5,
12–15
2, 3,
10–13,
15, 16
—
—
—
—
X0–X7
3
1
13
11
14
12
X
6
4
6
4
6
4
Enable
7, 8
5, 6
7, 8
5, 6
7, 8
5, 6
GND
9
7
—
—
9
7
C
Digital Address C Input
10
8
9
7
10
8
B
Digital Address B Input
11
9
10
8
11
9
A
Digital Address A Input
16
14
16
14
16
14
VCC
—
—
11, 12,
14, 15,
9, 10,
12, 13
—
—
X0–X3
Analog Switch X Inputs 0–3
—
—
1, 2, 4, 5
2, 3,
15, 16
—
—
Y0–Y3
Analog Switch Y Inputs 0–3
—
—
3
1
15
13
Y
Analog Switch Y Output
—
—
—
—
13
11
X1
Analog Switch X Normally Open Input
—
—
—
—
12
10
X0
Analog Switch X Normally Closed Input
—
—
—
—
1
15
Y1
Analog Switch Y Normally Open Input
—
—
—
—
2
16
Y0
Analog Switch Y Normally Closed Input
—
—
—
—
3
1
Z1
Analog Switch Z Normally Open Input
—
—
—
—
5
3
Z0
Analog Switch Z Normally Closed Input
—
—
—
—
4
2
Z
Analog Switch Z Output
—
EP
—
EP
—
EP
Exposed
Pad
Analog Switch Inputs 0–7
Analog Switch X Output
Digital Enable Input. Drive enable low or
connect to GND for normal operation.
Ground. Connect to digital ground. (Analog
signals have no ground reference; they are
limited to VCC.)
Positive Analog and Digital Supply Voltage
Input. Bypass with a 0.1µF capacitor to GND.
Bottom of QFN package only. Contains
an exposed pad that must be connected
externally to VCC.
Note: Input and output pins are identical and interchangeable. Any may be considered an input or output; signals pass equally well
in both directions.
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Maxim Integrated │ 6
MAX4581L/MAX4582L/
MAX4583L
Low-Voltage, CMOS Analog
Multiplexers/Switches
Detailed Description
This means that leakage varies as the analog signal varies. The difference in the two diodes? leakage to VCC
and GND constitutes the analog signal-path leakage current. Because there is no connection between the analog
signal paths and GND, all analog leakage current flows
between each pin and one of the supply terminals, not
to the other switch terminal. Because of this, both sides
of a given switch can show leakage currents of either the
same or opposite polarity.
The MAX4581L/MAX4582L/MAX4583L are TTL/CMOSlogic compatible with 0.8V to 2.0V logic thresholds for all
digital inputs when operating from a +12V supply.
VCC and GND power the internal logic and logic-level
translators, and set both the input and output logic limits.
The logic-level translators convert the logic levels into
switched VCC and GND signals to drive the gates of the
analog switches. This drive signal is the only connection
between the logic supplies (and signals) and the analog
supplies. The logic-level thresholds are TTL/CMOS compatible when VCC is +12V.
The MAX4581L/MAX4582L/MAX4583L are low-voltage,
CMOS analog ICs that operate from a single supply
of +2V to +12V. The MAX4581L is configured as an
8-channel multiplexer, the MAX4582L as two 4-channel
multiplexers, and the MAX4583L as three single-pole/
double-throw (SPDT) switches. These devices can handle rail-to-rail analog signals with only 2nA of off-leakage
current at +25°C.
Applications Information
Power-Supply Considerations
The MAX4581L/MAX4582L/MAX4583Ls? construction
is typical of most CMOS analog switches. The supply
input, VCC, is used to power the internal CMOS switches
and sets the limit of the analog voltage on any switch.
Reverse ESD protection diodes are internally connected
between each analog signal pin and both VCC and GND.
If any analog signal exceeds VCC or goes below GND,
one of these diodes conducts. During normal operation,
these reverse-biased ESD diodes leak, causing the only
current drawn from VCC or GND. Virtually all the analog
leakage current comes from the ESD diodes. Although
the ESD diodes on a given signal pin are identical, and
therefore fairly well balanced, they are reverse biased
differently by either VCC or GND and the analog signal.
Overvoltage Protection
Proper power-supply sequencing is recommended for
all CMOS devices. Do not exceed the absolute maximum ratings because stresses beyond the listed ratings
can cause permanent damage to the devices. Always
sequence VCC first, followed by the logic inputs and analog signals.
Pin Nomenclature
The MAX4581L/MAX4582L/MAX4583L are pin compatible with the industry-standard 74HC4051/74HC4052/
74HC4053 and the MAX4051/MAX4052/MAX4053.
Table 1. Truth Table/Switch Programming
SELECT INPUTS
ON SWITCHES
ENABLE
INPUT
C*
B
A
MAX4581L
MAX4582L
MAX4583L
H
X
X
X
All switches open
All switches open
All switches open
L
L
L
L
X–X0
X–X0, Y–Y0
X–X0, Y–Y0, Z–Z0
L
L
L
H
X–X1
X–X1, Y–Y1
X–X1, Y–Y0, Z–Z0
L
L
H
L
X–X2
X–X2, Y–Y2
X–X0, Y–Y1, Z–Z0
L
L
H
H
X–X3
X–X3, Y–Y3
X–X1, Y–Y1, Z–Z0
L
H
L
L
X–X4
X–X0, Y–Y0
X–X0, Y–Y0, Z–Z1
L
H
L
H
X–X5
X–X1, Y–Y1
X–X1, Y–Y0, Z–Z1
L
H
H
L
X–X6
X–X2, Y–Y2
X–X0, Y–Y1, Z–Z1
L
H
H
H
X–X7
X–X3, Y-Y3
X–X1, Y–Y1, Z–Z1
X = Don’t care.
*C not present on MAX4582L.
Note: Input and output pins are identical and interchangeable. Either may be considered an input or output; signals pass equally well
in either direction.
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Maxim Integrated │ 7
MAX4581L/MAX4582L/
MAX4583L
Low-Voltage, CMOS Analog
Multiplexers/Switches
Test Circuits/Timing Diagrams
VCC
VCC
VCC
A
B
X0
VENABLE
VCC
X1–X7
C
VX0
MAX4581L
VENABLE
90%
VOUT
ENABLE
VOUT
X
GND
50Ω
300Ω
VCC
A
B
35pF
tOFF
tON
VCC
X0–Y0
VENABLE
VCC
50%
0V
X1–X3, Y1–Y3
VX0,
VY0
MAX4582L
90%
VOUT
ENABLE
VOUT
X, Y
GND
50Ω
300Ω
VCC
A
B
35pF
tOFF
tON
VCC
X0, Y0, Z0
VENABLE
VCC
50%
0V
X1, Y1, Z1
C
90%
0V
VCC
VX0,
VY0,
VZ0
MAX4583L
VENABLE
90%
0V
VCC
VENABLE
50%
0V
90%
VOUT
ENABLE
50Ω
GND
VOUT
X, Y, Z
300Ω
35pF
VX1,
VY1,
VZ1
90%
tON
tOFF
Figure 1. Enable Switching Times
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Maxim Integrated │ 8
MAX4581L/MAX4582L/
MAX4583L
Low-Voltage, CMOS Analog
Multiplexers/Switches
VCC
VA, VB, VC
VCC
A
B
50Ω
C
VCC
X0
VA, VB, VC
VCC
50%
0V
X1–X6
VX0
MAX4581L
90%
X7
ENABLE
VOUT
X
GND
300Ω
VCC
A
B
50Ω
VCC
X0, Y0
VA, VB
VCC
X1, X2, Y1, Y2
VX0,
VY0
X3, Y3
ENABLE
VOUT
300Ω
35pF
VCC
A, B, C
VCC
50Ω
90%
tTRANS
tTRANS
VA, VB, VC
X1, Y1, Z1
50%
0V
VX0,
VY0,
VZ0
VCC
MAX4583L
GND
VX3,
VY3
VCC
X0, Y0, Z0
ENABLE
90%
VOUT
X, Y
GND
50%
0V
MAX4582L
VA, VB
tTRANS
tTRANS
35pF
VCC
VA, VB
90%
VX7
90%
VOUT
VOUT
X, Y, Z
300Ω
35pF
VX1,
VY1,
VZ1 t
TRANS
90%
tTRANS
VCC
Figure 2. Address Transition Time
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Maxim Integrated │ 9
MAX4581L/MAX4582L/
MAX4583L
Low-Voltage, CMOS Analog
Multiplexers/Switches
VCC
VCC
VA, VB, VC
VCC
A
B
50Ω
X0–X7
VA, VB
B
50Ω
C
VCC
A
VCC
X0–X3,
Y0–Y3
VCC
MAX4582L
MAX4581L
ENABLE
VOUT
X
GND
300Ω
ENABLE
GND
35pF
VOUT
X, Y
300Ω
35pF
VCC
VA, VB, VC
VCC
VCC
X0, X1, Y0,
Y1, Z0, Z1
A, B, C
50Ω
VCC
0V
VX, VY, VZ
MAX4583L
ENABLE
GND
tR < 20ns
tF < 20ns
50%
VA, VB, VC
VOUT
X, Y, Z
300Ω
35pF
80%
VOUT
0V
tBBM
Figure 3. Break-Before-Make Interval
VCC
CHANNEL
SELECT
VENABLE
50Ω
VCC
A
X_, Y_, Z_
B
C
VENABLE
MAX4581L
MAX4582L
MAX4583L
VCC
0V
VOUT
ENABLE
GND
X, Y, Z
∆VOUT
VOUT
CL = 1000pF
∆VOUT IS THE MEASURED VOLTAGE DUE TO CHARGETRANSFER ERROR Q WHEN THE CHANNEL TURNS OFF.
Q = ∆VOUT X CL.
Figure 4. Charge Injection
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Maxim Integrated │ 10
MAX4581L/MAX4582L/
MAX4583L
Low-Voltage, CMOS Analog
Multiplexers/Switches
VCC
VCC
A
CHANNEL
SELECT
X_, Y_, Z_
B
MAX4581L
MAX4582L
MAX4583L
C
ENABLE
1MHz
CAPACITANCE
ANALYZER
X, Y, Z
GND
Figure 5. NO/COM Capacitance
VCC
NETWORK
ANALYZER
VIN
VCC
CHANNEL
SELECT
X_, Y_, Z_
A
B
C
50Ω
50Ω
MAX4581L
MAX4582L
MAX4583L
ENABLE
X, Y, Z
VOUT
OFF-ISOLATION = 20log x
VIN
ON-LOSS = 20log x
VOUT
MEAS.
50Ω
REF.
CROSSTALK = 20log x
VOUT
VIN
VOUT
VIN
50Ω
GND
MEASUREMENTS ARE STANDARDIZED AGAINST SHORT AT SOCKET TERMINALS.
OFF-ISOLATION IS MEASURED BETWEEN COM AND "OFF" NO TERMINAL ON EACH SWITCH.
ON-LOSS IS MEASURED BETWEEN COM AND "ON" NO TERMINAL ON EACH SWITCH.
CROSSTALK (MAX4582/MAX4583) IS MEASURED FROM ONE CHANNEL (A, B, C) TO ALL OTHER CHANNELS.
SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.
Figure 6. Off-Isolation, On-Loss, and Crosstalk
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Maxim Integrated │ 11
MAX4581L/MAX4582L/
MAX4583L
Low-Voltage, CMOS Analog
Multiplexers/Switches
Pin Configurations/Functional Diagrams (continued)
TOP VIEW
MAX4581L
X4 1
16 VCC
Y0 1
16 VCC
Y1 1
16 VCC
X6 2
15 X2
Y2 2
15 X2
Y0 2
15 Y
Z1 3
14 X
X 3
14 X1
Y 3
14 X1
X7 4
13 X0
Y3 4
13 X
Z 4
13 X1
Y1 5
12 X0
Z0 5
12 X0
ENABLE 6
11 X3
ENABLE 6
11 A
10 A
GND 7
10 B
9
GND 8
9
X5 5
12 X3
ENABLE 6
11 A
GND 7
LOGIC
GND 8
10 B
GND 7
9
GND 8
C
SO/QSOP
TEMP RANGE
PIN-PACKAGE
MAX4582LESE -40°C to +85°C 16 Narrow SO
MAX4582LEEE -40°C to +85°C 16 QSOP
MAX4582LETE -40°C to +85°C 16 TQFN-EP* (4mm x 4mm)
MAX4583LESE -40°C to +85°C 16 Narrow SO
MAX4583LEEE -40°C to +85°C 16 QSOP
MAX4583LETE -40°C to +85°C 16 TQFN-EP* (4mm x 4mm)
*EP = Exposed pad.
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LOGIC
B
C
SO/QSOP
SO/QSOP
Ordering Information (continued)
PART
MAX4583L
MAX4582L
Chip Information
TRANSISTOR COUNT: 219
PROCESS: CMOS
Package Information (continued)
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE
CODE
DOCUMENT
NO.
16 Narrow
SO
S16-3
21-0041
16 QSOP
E16-4
21-0055
16 TQFN-EP
T1644-4
21-0139
LAND
PATTERN
NO.
Refer to
Application
Note 1891
Maxim Integrated │ 12
MAX4581L/MAX4582L/
MAX4583L
Low-Voltage, CMOS Analog
Multiplexers/Switches
Revision History
REVISION
NUMBER
REVISION
DATE
0
5/07
Initial release
1
6/07
Unknown
2
5/14
Removed automotive reference under Applications section
DESCRIPTION
PAGES
CHANGED
—
1, 6, 12, 16
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
© 2014 Maxim Integrated Products, Inc. │ 13
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