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MAX6752KA29+TG51

MAX6752KA29+TG51

  • 厂商:

    AD(亚德诺)

  • 封装:

  • 描述:

    IC SUPERVISOR

  • 数据手册
  • 价格&库存
MAX6752KA29+TG51 数据手册
Click here for production status of specific part numbers. MAX6746–MAX6753 μP Reset Circuits with Capacitor-Adjustable Reset/Watchdog Timeout Delay General Description Benefits and Features The MAX6746–MAX6753 have ±2% factory-trimmed reset threshold voltages in approximately 100mV increments from 1.575V to 5.0V and/or adjustable reset threshold voltages using external resistors. ●● 3.7μA Supply Current Reduces System Power Consumption The MAX6746–MAX6753 low-power microprocessor (μP) supervisory circuits monitor single/dual system supply voltages from 1.575V to 5V and provide maximum adjustability for reset and watchdog functions. These devices assert a reset signal whenever the VCC supply voltage or RESET IN falls below its reset threshold or when manual reset is pulled low. The reset output remains asserted for the reset timeout period after VCC and RESET IN rise above the reset threshold. The reset function features immunity to power-supply transients. The reset and watchdog delays are adjustable with external capacitors. The MAX6746–MAX6751 contain a watchdog select input that extends the watchdog timeout period by 128x. The MAX6752/MAX6753 contain a window watchdog timer that looks for activity outside an expected window of operation. The MAX6746–MAX6753 are available with a push-pull or open-drain active-low RESET output. The MAX6746– MAX6753 are available in an 8-pin SOT23 package and are fully specified over the automotive temperature range (-40°C to +125°C). ●● Configurable Reset and Watchdog Options Enables Wide Variety of Applications • Factory-Set Reset Threshold Options from 1.575V to 5V in ~100mV Increments • Adjustable Reset Threshold Options • Single/Dual Voltage Monitoring • Capacitor-Adjustable Reset Timeout • Capacitor-Adjustable Watchdog Timeout • Min/Max (Windowed) Watchdog Option • Manual-Reset Input Option • Push-Pull or Open-Drain RESET Output Options ●● Integrated Power Supply Protection Increases Robustness • Power-Supply Transient Immunity • Guaranteed RESET Valid for VCC ≥ 1V ●● 8-Pin SOT23 Packages Saves Board Space ●● AEC-Q100 Qualified. Refer to Ordering Information for Specific /V Trim Variants Typical Operating Circuit VIN MAX6749 MAX4751 Applications ●● ●● ●● ●● ●● ●● ●● ●● ●● Medical Equipment Automotive Intelligent Instruments Portable Equipment Battery-Powered Computers/Controllers Embedded Controllers Critical μP Monitoring Set-Top Boxes Computers Selector Guide and Ordering Information appear at end of data sheet. VCC R1 RESET IN R2 GND SRT CSRT SWT CSWT MAX6748 MAX6749 MAX6750 MAX6751 VCC RESET WDI µP RESET I/O WDS WDS = 0 FOR NORMAL MODE WDS = VCC FOR EXTENDED MODE 19-2530; Rev 18; 3/18 MAX6746–MAX6753 μP Reset Circuits with Capacitor-Adjustable Reset/Watchdog Timeout Delay Absolute Maximum Ratings VCC to GND...........................................................-0.3V to +6.0V SRT, SWT, SET0, SET1, RESET IN, WDS, MR, WDI, to GND......................................…-0.3V to (VCC + 0.3V) RESET (Push-Pull) to GND....................…-0.3V to (VCC + 0.3V) RESET (Open-Drain) to GND.............................…-0.3V to +6.0V Input Current (All Pins).....................................................±20mA Output Current (RESET) ...................................................±20mA Continuous Power Dissipation (TA = +70°C) 8-Pin SOT23 (derate 5.1mW/°C above +70°C)...........408.2mW Operating Temperature Range .........................-40°C to +125°C Storage Temperature Range ............................-65°C to +150°C Junction Temperature......................................................+150°C Lead Temperature (soldering, 10s) .................................+300°C Soldering Temperature (reflow) .......................................+260°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 8 SOT23 PACKAGE CODE K8+5 Outline Number 21-0078 Land Pattern Number 90-0176 Thermal Resistance, Single-Layer Board Junction-to-Ambient (qJA) N/A Junction-to-Case (qJC) 800 Junction-to-Ambient (qJA) 196 Thermal Resistance, Four-Layer Board Junction-to-Case (qJC) 70 For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial. Electrical Characteristics (VCC = +1.2V to +5.5V, TA = TMIN to TMAX, unless otherwise specified. Typical values are at VCC = +5V and TA = +25°C.) (Note 1) PARAMETER Supply Voltage Supply Current VCC Reset Threshold Hysteresis VCC Reset Threshold (MAX6752AKA32 Only) Hysteresis (MAX6752AKA32 Only) SYMBOL VCC ICC VTH MAX 1.0 5.5 TA = -40°C to 0°C 1.2 5.5 VCC ≤ 5.5V 5 10 VCC ≤ 3.3V 4.2 9 VCC ≤ 2.0V 3.7 8 See VTH selection table TA = -40°C to +125°C VTH 2% VTH + 2% 0.8 TA = -40°C to +125°C VHYST 3.136 0.65 VCC falling from VTH + 100mV to VTH -100mV at 1mV/µs tRP TYP TA = 0°C to +125°C CSRT = 1500pF IRAMP VSRT = 0 to 1.23V; VCC = 1.6V to 5V SRT Ramp Threshold VRAMP VCC = 1.6V to 5V (VRAMP rising) 0.80 5.692 7.590 UNITS V µA V % 3.224 V 0.90 % 20 CSRT = 100pF SRT Ramp Current www.maximintegrated.com MIN VHYST VCC to Reset Delay Reset Timeout Period CONDITIONS µs 9.487 0.506 ms 200 250 300 nA 1.173 1.235 1.297 V Maxim Integrated │  2 MAX6746–MAX6753 μP Reset Circuits with Capacitor-Adjustable Reset/Watchdog Timeout Delay Electrical Characteristics (continued) (VCC = +1.2V to +5.5V, TA = TMIN to TMAX, unless otherwise specified. Typical values are at VCC = +5V and TA = +25°C.) (Note 1) PARAMETER SYMBOL Normal Watchdog Timeout Period (MAX6746–MAX6751) tWD Extended Watchdog Timeout (MAX6746–MAX6751) tWD Slow Watchdog Period (MAX6752/MAX6753) tWD2 Fast Watchdog Timeout Period, SET Ratio = 8, (MAX6752/MAX6753) tWD1 Fast Watchdog Timeout Period, SET Ratio = 16, (MAX6752/MAX6753) tWD1 Fast Watchdog Timeout Period, SET Ratio = 64, (MAX6752/MAX6753) tWD1 CONDITIONS CSWT = 1500pF CSWT = 1500pF CSWT = 1500pF 5.692 7.590 9.487 0.506 728.6 971.5 CSWT = 1500pF 728.6 971.5 91.08 121.43 151.80 8.09 45.53 60.71 CSWT = 100pF CSWT = 1500pF 1214.4 64.77 CSWT = 100pF CSWT = 1500pF 1214.4 64.77 CSWT = 100pF 75.89 4.05 11.38 15.18 CSWT = 100pF 18.98 1.01 2000 IRAMP VSWT = 0 to 1.23V, VCC = 1.6V to 5V SWT Ramp Threshold VRAMP VCC = 1.6V to 5V (VRAMP rising) RESET Output Leakage Current, Open Drain MAX CSWT = 100pF SWT Ramp Current RESET Output-Voltage High, Push-Pull (Not Asserted) TYP CSWT = 100pF Fast Watchdog Minimum Period (MAX6752/MAX6753) RESET Output-Voltage Low Open-Drain, Push-Pull (Asserted) MIN VOL 250 1.235 ILKG ms ms ms ms ms 300 nA 1.297 V VCC ≥ 1.0V, ISINK = 50µA 0.3 VCC ≥ 2.7V, ISINK = 1.2mA 0.3 VCC ≥ 4.5V, ISINK = 3.2mA VOH ms ns 200 1.173 UNITS V 0.4 VCC ≥ 1.8V, ISOURCE = 200µA 0.8 x VCC VCC ≥ 2.25V, ISOURCE = 500µA 0.8 x VCC VCC ≥ 4.5V, ISOURCE = 800µA 0.8 x VCC V VCC > VTH, reset not asserted, VRESET = 5.5V 1.0 µA DIGITAL INPUTS (MR, SET0, SET1, WDI, WDS) VIL Input Logic Levels VIH VIL VCC ≥ 4.0V 0.8 2.4 VCC < 4.0V VIH 0.3 x VCC 0.7 x VCC 1 MR Minimum Pulse Width www.maximintegrated.com ns 200 MR-to-RESET Delay WDI Minimum Pulse Width µs 100 MR Glitch Rejection MR Pullup Resistance V Pullup to VCC 12 300 20 ns 28 kΩ ns Maxim Integrated │  3 MAX6746–MAX6753 μP Reset Circuits with Capacitor-Adjustable Reset/Watchdog Timeout Delay Electrical Characteristics (continued) (VCC = +1.2V to +5.5V, TA = TMIN to TMAX, unless otherwise specified. Typical values are at VCC = +5V and TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 1.216 1.235 1.254 V -50 ±1 +50 nA RESET IN RESET IN Threshold VRESET IN RESET IN Leakage Current IRESET IN TA = -40°C to +125°C RESET IN falling at 1mV/µs RESET IN to RESET Delay 20 µs Note 1: Production testing done at TA = +25°C. Over temperature limits are guaranteed by design. Typical Operating Characteristics (VCC = +5V, TA = +25°C, unless otherwise noted.) 1 100 1000 10,000 1000 100 NORMAL MODE 10 100 1000 CSRT = 100pF 1.05 CSRT = 1500pF 0.95 0.90 -50 -25 0 25 50 75 TEMPERATURE (°C) www.maximintegrated.com 10,000 100 125 MAX6746 toc05 1.15 1.10 1.05 CSWT = 100pF 1.00 CSWT = 1500pF 0.95 1 2 3 4 0.90 MAXIMUM TRANSIENT DURATION vs. RESET THRESHOLD OVERDRIVE 175 150 125 RESET OCCURS ABOVE THE CURVE 100 75 50 25 0.85 -50 -25 0 25 50 6 5 SUPPLY VOLTAGE (V) 1.20 0.80 MAX6746 toc03 2 0 100,000 NORMALIZED WATCHDOG TIMEOUT PERIOD vs. TEMPERATURE NORMALIZED TIMEOUT PERIOD MAX6746 toc04 NORMALIZED TIMEOUT PERIOD 1.15 1.00 3 CSWT (pF) NORMALIZED RESET TIMEOUT PERIOD vs. TEMPERATURE 1.10 4 1 CSRT (pF) 1.20 5 1 0.1 100,000 EXTENDED MODE TRANSIENT DURATION (µs) 0.1 10,000 6 MAX6746 toc06 10 MAX6746–MAX6751 SUPPLY CURRENT (µA) 100 100,000 SUPPLY CURRENT vs. SUPPLY VOLTAGE WATCHDOG TIMEOUT PERIOD vs. CSWT MAX6746 toc02 MAX6746 toc01 RESET TIMEOUT PERIOD (ms) 1000 WATCHDOG TIMEOUT PERIOD (ms) RESET TIMEOUT PERIOD vs. CSRT 75 TEMPERATURE (°C) 100 125 0 VTH = 2.92V 0 200 400 600 800 1000 RESET THRESHOLD OVERDRIVE (mV) Maxim Integrated │  4 MAX6746–MAX6753 μP Reset Circuits with Capacitor-Adjustable Reset/Watchdog Timeout Delay Typical Operating Characteristics (continued) (VCC = +5V, TA = +25°C, unless otherwise noted.) VCC = 1.8V VCC = 3.3V 2 1 0 -50 -25 0 25 50 75 100 125 1.002 0.998 0.994 1.236 0.992 0.990 0.60 TIMEOUT PERIOD (ms) 26.2 25.8 -50 -25 0 25 50 75 100 0 25 50 75 TEMPERATURE (°C) www.maximintegrated.com 1.235 125 RESET AND WATCHDOG TIMEOUT PERIOD vs. SUPPLY VOLTAGE CSWT = CSRT = 100pF 0.56 100 125 0.52 0.48 0.40 1 2 3 4 5 6 SUPPLY VOLTAGE (V) 0.44 25.4 MAX6746 toc08b 1.237 0.996 MAX6746 toc09 VCC TO RESET DELAY (µs) VCC FALLING AT 1mV/µs -25 1.239 1.238 1.000 VCC TO RESET DELAY vs. TEMPERATURE (VCC FALLING) -50 1.240 TEMPERATURE (°C) 26.6 25.0 MAX6746 toc08 1.006 1.004 TEMPERATURE (°C) 27.0 VCC = 5V 9.0 RESET AND WATCHING TIMEOUT PERIOD vs. SUPPLY VOLTAGE CSWT = CSRT = 1500pF 8.5 TIMEOUT PERIOD (ms) 3 1.008 RESET IN THRESHOLD (V) 4 1.010 MAX6746 toc10 SUPPLY CURRENT (µA) MAX6746 toc07 VCC = 5V NORMALIZED RESET THRESHOLD VOLTAGE 6 5 RESET IN THRESHOLD vs. SUPPLY VOLTAGE NORMALIZED RESET IN THRESHOLD VOLTAGE vs. TEMPERATURE MAX6746 toc11 SUPPLY CURRENT vs. TEMPERATURE RESET 8.0 WATCHDOG 7.5 7.0 6.5 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 VCC (V) 6.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 VCC (V) Maxim Integrated │  5 MAX6746–MAX6753 μP Reset Circuits with Capacitor-Adjustable Reset/Watchdog Timeout Delay Pin Configurations TOP VIEW RESET IN (MR) 1 SWT 2 SRT 3 + MAX6746– MAX6751 GND 4 8 VCC SET0 1 7 RESET SWT 2 6 WDI SRT 3 5 WDS GND 4 SOT23 MAX6752 MAX6753 8 VCC 7 RESET 6 WDI 5 SET1 SOT23 ( ) ARE FOR MAX6746 AND MAX6747 ONLY. Pin Descriptions PIN MAX6746 MAX6747 MAX6748– MAX6751 MAX6752 MAX6753 NAME 1 — — MR — 1 — RESET IN — — 1 SET0 FUNCTION Manual-Reset Input. Pull MR low to manually reset the device. Reset remains asserted for the reset timeout period after MR is released. Reset Input. High-impedance input to the adjustable reset comparator. Connect RESET IN to the center point of an external resistor-divider to set the threshold of the externally monitored voltage. Logic Input. SET0 selects watchdog window ratio or disables the watchdog timer. See Table 1. Watchdog Timeout Input. MAX6746–MAX6751: Connect a capacitor between SWT and ground to set the basic watchdog timeout period (tWD). Determine the period by the formula tWD = 4.94 x 106 x CSWT with tWD in seconds and CSWT in Farads. Extend the basic watchdog timeout period by using the WDS input. Connect SWT to ground to disable the watchdog timer function. 2 2 2 SWT 3 3 3 SRT Reset Timeout Input. Connect a capacitor from SRT to GND to select the reset timeout period. Determine the period as follows: tRP = 4.94 x 106 x CSRT with tRP in seconds and CSRT in Farads. 4 4 4 GND Ground WDS Watchdog Select Input. WDS selects the watchdog mode. Connect WDS to ground to select normal mode and the watchdog timeout period. Connect WDS to VCC to select extended mode, multiplying the basic timeout period by a factor of 128. A change in the state of WDS clears the watchdog timer. 5 5 www.maximintegrated.com — MAX6752/MAX6753: Connect a capacitor between SWT and ground to set the slow watchdog timeout period (tWD2). Determine the slow watchdog period by the formula: tWD2 = 0.65 x 109 x CSWT with tWD2 in seconds and CSWT in Farads. The fast watchdog timeout period is set by pin strapping SET0 and SET1 (Connect SET0 high and SET1 low to disable the watchdog timer function.) See Table 1. Maxim Integrated │  6 MAX6746–MAX6753 μP Reset Circuits with Capacitor-Adjustable Reset/Watchdog Timeout Delay Pin Descriptions (continued) PIN MAX6746 MAX6747 MAX6748– MAX6751 MAX6752 MAX6753 NAME — — 5 SET1 FUNCTION Logic Input. SET1 selects the watchdog window ratio or disables the watchdog timer. See Table 1. Watchdog Input. MAX6746–MAX6751: A falling transition must occur on WDI within the selected watchdog timeout period or a reset pulse occurs. The watchdog timer clears when a transition occurs on WDI or whenever RESET is asserted. Connect SWT to ground to disable the watchdog timer function. 6 6 6 WDI 7 7 7 RESET 8 8 8 VCC www.maximintegrated.com MAX6752/MAX6753: WDI falling transitions within periods shorter than tWD1 or longer than tWD2 force RESET to assert low for the reset timeout period. The watchdog timer begins to count after RESET is deasserted. The watchdog timer clears when a valid transition occurs on WDI or whenever RESET is asserted. Connect SET0 high and SET1 low to disable the watchdog timer function. See the Watchdog Timer section. Push/Pull or Open-Drain Reset Output. RESET asserts whenever VCC or RESET IN drops below the selected reset threshold voltage (VTH or VRESET IN, respectively) or manual reset is pulled low. RESET remains low for the reset timeout period after all reset conditions are deasserted, and then goes high. The watchdog timer triggers a reset pulse (tRP) whenever a watchdog fault occurs. Supply Voltage. VCC is the power-supply input and the input for fixed threshold VCC monitor. Maxim Integrated │  7 MAX6746–MAX6753 μP Reset Circuits with Capacitor-Adjustable Reset/Watchdog Timeout Delay tWD1 (MIN) tWD1 (MAX) GUARANTEED TO ASSERT RESET tWD2 (MIN) tWD2 (MAX) GUARANTEED TO GUARANTEED TO NOT ASSERT ASSERT RESET RESET *UNDETERMINED *UNDETERMINED WDI CONDITION 1 FAST FAULT WDI CONDITION 2 NORMAL OPERATION WDI CONDITION 3 SLOW FAULT *UNDETERMINED STATES MAY OR MAY NOT GENERATE A FAULT CONDITION Figure 1. MAX6752/MAX6753 Detailed Watchdog Input Timing Relationship Detailed Description The MAX6746–MAX6753 assert a reset signal whenever the VCC supply voltage or RESET IN falls below its reset threshold. The reset output remains asserted for the reset timeout period after VCC and RESET IN rise above its respective reset threshold. A watchdog timer triggers a reset pulse whenever a watchdog fault occurs. The reset and watchdog delays are adjustable with external capacitors. The MAX6746–MAX6751 contain a watchdog select input that extends the watchdog timeout period to 128x. The MAX6752 and MAX6753 have a sophisticated watchdog timer that detects when the processor is running outside an expected window of operation. The watchdog signals a fault when the input pulses arrive too early (faster that the selected tWD1 timeout period) or too late (slower than the selected tWD2 timeout period) (see Figure 1). RESET is guaranteed to be in the correct logic state for VCC greater than 1V. For applications requiring valid reset logic when VCC is less than 1V, see the Ensuring a Valid RESET Down to VCC = 0V (Push-Pull RESET) section. RESET IN Threshold The MAX6748–MAX6751 monitor the voltage on RESET IN using an adjustable reset threshold (VRESET IN) set with an external resistor voltage-divider (Figure 2). Use the following formula to calculate the externally monitored voltage (VMON_TH): VMON_TH = VRESET IN x (R1 + R2)/R2 VMON_TH R1 Reset Output The reset output is typically connected to the reset input of a μP. A μP’s reset input starts or restarts the μP in a known state. The MAX6746–MAX6753 μP supervisory circuits provide the reset logic to prevent code-execution errors during power-up, power-down, and brownout conditions (see the Typical Operating Circuit). RESET changes from high to low whenever the monitored voltage, RESET IN and/or VCC drop below the reset threshold voltages. Once VRESET IN and/or VCC exceeds its respective reset threshold voltage(s), RESET remains low for the reset timeout period, then goes high. www.maximintegrated.com VCC RESET IN R2 GND VCC MAX6748 MAX6749 MAX6750 MAX6751 VMON_TH = 1.235 x (R1 + R2) / R2 Figure 2. Calculating the Monitored Threshold Voltage (VMON_TH) Maxim Integrated │  8 MAX6746–MAX6753 μP Reset Circuits with Capacitor-Adjustable Reset/Watchdog Timeout Delay timing performance. The MAX6748 and MAX6749 can be configured to monitor VCC voltage by connecting VCC to VMON_TH. VMON_TH R1 VCC RESET IN R2 GND VCC MAX6748 MAX6749 MAX6750 MAX6751 Dual-Voltage Monitoring (MAX6750/MAX6751) The MAX6750 and MAX6751 contain both factory-trimmed threshold voltages and an adjustable reset threshold input, allowing the monitoring of two voltages, VCC and VMON_ TH (see Figure 2). RESET is asserted when either of the voltages fall below its respective threshold voltages. Manual Reset (MAX6746/MAX6747) Figure 3. Adding an External Manual-Reset Function to the MAX6748–MAX6751 where VMON_TH is the desired reset threshold voltage and VTH is the reset input threshold (1.235V). Resistors R1 and R2 can have very high values to minimize current consumption due to low leakage currents. Set R2 to some conveniently high value (500kΩ, for example) and calculate R1 based on the desired reset threshold voltage, using the following formula: R1 = R2 x (VMON_TH/VRESET IN - 1) (Ω) The MAX6748 and MAX6749 do not monitor VCC supply voltage; therefore, VCC must be greater than 1.5V to guarantee RESET IN threshold accuracy and Many μP-based products require manual-reset capability to allow an operator or external logic circuitry to initiate a reset. The manual-reset input (MR) can connect directly to a switch without an external pullup resistor or debouncing network. MR is internally pulled up to VCC and, therefore, can be left unconnected if unused. MR is designed to reject fast, falling transients (typically 100ns pulses) and must be held low for a minimum of 1μs to assert the reset output. A 0.1μF capacitor from MR to ground provides additional noise immunity. After MR transitions from low to high, reset remains asserted for the duration of the reset timeout period. A manual-reset option can easily be implemented with the MAX6748–MAX6751 by connecting a normally open momentary switch in parallel with R2 (Figure 3). When the switch is closed, the voltage on RESET IN goes to zero, initiating a reset. Similar to the MAX6746/MAX6747 manual reset, reset remains asserted while the voltage at RESET IN is zero and for the reset timeout period after the switch is opened. VCC tWD WDI tRP OV VCC RESET OV NORMAL MODE (WDS = GND) Figure 4a. Watchdog Timing Diagram, WDS = GND www.maximintegrated.com Maxim Integrated │  9 MAX6746–MAX6753 μP Reset Circuits with Capacitor-Adjustable Reset/Watchdog Timeout Delay VCC tRP tWD x 128 WDI OV VCC RESET OV EXTENDED MODE (WDS = VCC) Figure 4b. Watchdog Timing Diagram, WDS = VCC Watchdog Timer MAX6746–MAX6751 The watchdog’s circuit monitors the μP’s activity. It the μP does not toggle the watchdog input (WDI) within tWD (userselected), RESET asserts for the reset timeout period. The internal watchdog timer is cleared by any event that asserts RESET, by a falling transition at WDI (which can detect pulses as short as 300ns), or by a transition at WDS. The watchdog timer remains cleared while reset is asserted; as soon as reset is released, the timer starts counting. The MAX6746–MAX6751 feature two modes of watchdog operation: normal mode and extended mode. In normal mode (Figure 4a), the watchdog timeout period is determined by the value of the capacitor connected between SWT and ground. In extended mode (Figure 4b), the watchdog timeout period is multiplied by 128. For example, in extended mode, a 0.1μF capacitor gives a watchdog timeout period of 65s (see the Extended-Mode Watchdog Timeout Period vs. CSWT graph in the Typical Operating Circuit). To disable the watchdog timer function, connect SWT to ground. MAX6752/MAX6753 The MAX6752 and MAX6753 have a windowed watchdog timer that asserts RESET for the adjusted reset timeout period when the watchdog recognizes a fast watchdog fault (tWDI < tWD1), or a slow watchdog fault (period > tWD2). The reset timeout period is adjusted independently of the watchdog timeout period. The slow watchdog period (tWD2) is calculated as follows: tWD2 = 0.65 x 109 x CSWT with tWD2 in seconds and CSWT in Farads. The fast watchdog period (tWD1) is selectable as a ratio from the slow watchdog fault period (tWD2). Select the fast watchdog period by pin strapping SET0 and SET1, where high is VCC and low is GND. Table 1 illustrates www.maximintegrated.com Table 1. Min/Max Watchdog Setting SET0 SET1 RATIO Low Low 8 Low High 16 High Low Watchdog Disabled High High 64 the SET0 and SET1 configuration for the 8, 16, and 64 window ratio ( tWD2/tWD1). For example, if CSWT is 1500pF, and SET0 and SET1 are low, then tWD2 is 975ms (typ) and tWD1 is 122ms (typ). RESET asserts if the watchdog input has two falling edges too close to each other (faster than tWD1) (Figure 5a) or falling edges that are too far apart (slower than tWD2) (Figure 5b). Normal watchdog operation is displayed in Figure 5c. The internal watchdog timer is cleared when a WDI falling edge is detected within the valid watchdog window or when RESET is deasserted. All WDI inputs are ignored while RESET is asserted. The watchdog timer begins to count after RESET is deasserted. The watchdog timer clears and begins to count after a valid WDI falling logic input. WDI falling transitions within periods shorter than tWD1 or longer than tWD2 force RESET to assert low for the reset timeout period. WDI falling transitions within the tWD1 and tWD2 window do not assert RESET. WDI transitions between tWD1(min) and tWD1(max) or tWD2(min) and tWD2(max) are not guaranteed to assert or deassert RESET. To guarantee that the window watchdog does not assert RESET, strobe WDI between tWD1(max) and tWD2(min). The watchdog timer is cleared when RESET is asserted or after a falling transition on WDI, or after a state change on SET0 or SET1. Disable the watchdog timer by connecting SET0 high and SET1 low. Maxim Integrated │  10 MAX6746–MAX6753 μP Reset Circuits with Capacitor-Adjustable Reset/Watchdog Timeout Delay tWDI < tWD1 (MIN) 5V 3.3V VCC WDI RESET (a) FAST FAULT MAX6747 MAX6749 MAX6451 MAX6753 RESET tWDI > tWD2 (MAX) 100kΩ VCC RESET µP N GND GND WDI RESET (b) SLOW FAULT tWD1 (MAX) < tWDI < tWD2 (MIN) WDI RESET (c) NORMAL OPERATION (NO PULSING, OUTPUT STAYS HIGH) Figure 5. MAX6752/MAX6753 Window Watchdog Diagram Applications Information Selecting Reset/Watchdog Timeout Capacitor The reset timeout period is adjustable to accommodate a variety of μP applications. Adjust the reset timeout period (tRP) by connecting a capacitor (CSRT) between SRT and ground. Calculate the reset timeout capacitor as follows: CSRT = tRP/(4.94 x 106) with tRP in seconds and CSRT in Farads. The watchdog timeout period is adjustable to accommodate a variety of μP applications. With this feature, the watchdog timeout can be optimized for software execution. The programmer can determine how often the watchdog timer should be serviced. Adjust the watchdog timeout period (tWD) by connecting a specific value capacitor (CSWT) between SWT and GND. For normal mode operation, calculate the watchdog timeout capacitor as follows: CSWT = tWD/(4.94 x 106) www.maximintegrated.com Figure 6. Interfacing to Other Voltage Levels with tWD in seconds and CSWT in Farads. For the MAX6752 and MAX6753 windowed watchdog function, calculate the slow watchdog period, tWD2 as follows: tWD2 = 0.65 x 109 x CSWT CSRT and CSWT must be a low-leakage (< 10nA) type capacitor. Ceramic capacitors are recommended. Transient Immunity In addition to issuing a reset to the μP during power-up, power-down, and brownout conditions, these supervisors are relatively immune to short-duration supply transients (glitches). The Maximum Transient Duration vs. Reset Threshold Overdrive graph in the Typical Operating Characteristics shows this relationship. The area below the curves of the graph is the region in which these devices typically do not generate a reset pulse. This graph was generated using a falling pulse applied to VCC, starting above the actual reset threshold (VTH) and ending below it by the magnitude indicated (reset threshold overdrive). As the magnitude of the transient increases (farther below the reset threshold), the maximum allowable pulse width decreases. Typically, a VCC transient that goes 100mV below the reset threshold and lasts 50μs or less does not cause a reset pulse to be issued. For applications where the power supply to VCC has high transient rates, dV/dt > 5V/50µS, an RC filter on VCC is required. See Figure 8. Application Circuit for High-Input Voltage Transient Applications. Maxim Integrated │  11 MAX6746–MAX6753 μP Reset Circuits with Capacitor-Adjustable Reset/Watchdog Timeout Delay Interfacing to Other Voltages for Logic Compatibility Ensuring a Valid RESET Down to VCC = 0V (Push-Pull RESET) Generally, the pullup resistor connected to RESET connects to the supply voltage that is being monitored at the IC’s VCC pin. However, some systems can use the open-drain output to level-shift from the monitored supply to reset circuitry powered by some other supply. Keep in mind that as the supervisor’s VCC decreases towards 1V, so does the IC’s ability to sink current at RESET. Also, with any pullup resistor, RESET is pulled high as VCC decays toward zero. The voltage where this occurs depends on the pullup resistor value and the voltage to which it is connected. In those applications where RESET must be valid down to 0V, add a pulldown resistor between RESET and GND for the MAX6746/MAX6748/MAX6750/MAX6752 push/pull outputs. The resistor sinks any stray leakage currents, holding RESET low (Figure 7). The value of the pulldown resistor is not critical; 100kΩ is large enough not to load RESET and small enough to pull RESET to ground. The external pulldown cannot be used with the open-drain reset outputs. The open-drain RESET output can be used to interface to a μP with other logic levels. As shown in Figure 6, the open-drain output can be connected to voltages from 0 to 6V. When VCC falls below 1V, RESET current sinking capabilities decline drastically. The high-impedance CMOS logic inputs connected to RESET can drift to undetermined voltages. This presents no problems in most applications, since most μPs and other circuitry do not operate with VCC below 1V. 3.3V VCC VCC 100Ω MAX6746 MAX6748 MAX6450 MAX6752 RESET VCC 1µF MAX6753 RESET GND 100kΩ Figure 7. Ensuring RESET Valid to VCC = 0V www.maximintegrated.com GND Figure 8. Application Circuit for High-Input Voltage Transient Applications Maxim Integrated │  12 MAX6746–MAX6753 μP Reset Circuits with Capacitor-Adjustable Reset/Watchdog Timeout Delay Table 2. Reset Threshold Voltage Suffix (TA = -40°C to +125°C) SUFFIX MIN TYP MAX 50 4.900 5.000 5.100 49 4.802 4.900 4.998 48 4.704 4.800 4.896 47 4.606 4.700 4.794 46 4.533 4.625 4.718 45 4.410 4.500 4.590 44 4.288 4.375 4.463 43 4.214 4.300 4.386 42 4.116 4.200 4.284 41 4.018 4.100 4.182 40 3.920 4.000 4.080 39 3.822 3.900 3.978 38 3.724 3.800 3.876 37 3.626 3.700 3.774 36 3.528 3.600 3.672 35 3.430 3.500 3.570 34 3.332 3.400 3.468 33 3.234 3.300 3.366 32 3.136 3.200 3.264 3.136 3.200 3.014 2.940 29 Table 3. Standard Version Table PART TOP MARK MAX6746KA16 AEDI MAX6746KA23 AEDJ MAX6746KA26 AEDK MAX6746KA29 AALN MAX6746KA46 AEDL MAX6747KA16 AALO MAX6747KA23 AEDM MAX6747KA26 AEDN MAX6747KA29 AEDO MAX6747KA46 AEDP MAX6748KA AALP MAX6749KA AALQ MAX6750KA16 AEDQ MAX6750KA23 AALR MAX6750KA26 AEDR MAX6750KA29 AEDS MAX6750KA46 AEDT MAX6751KA16 AEDU MAX6751KA23 AEDV MAX6751KA26 AEDW 3.224 MAX6751KA29 AEDX 3.075 3.000 3.137 3.060 MAX6751KA46 AEDY MAX6752KA16 AEDZ 2.867 2.925 2.984 MAX6752KA23 AEEA 28 2.744 2.800 2.856 MAX6752KA26 AALT 27 2.646 2.700 2.754 MAX6752KA29 AEEB 26 2.573 2.625 2.678 MAX6752KA46 AEEC 25 2.450 2.500 2.550 MAX6753KA16 AEED 24 2.352 2.400 2.448 MAX6753KA23 AEEE 23 2.267 2.313 2.359 22 21 20 19 18 17 16 2.144 2.058 1.960 1.862 1.764 1.632 1.544 2.188 2.100 2.000 1.900 1.800 1.665 1.575 2.232 2.142 2.040 1.938 1.836 1.698 1.607 MAX6753KA26 AEEF MAX6753KA29 AEEG MAX6753KA46 AEEH 32A (MAX6752AKA32 Only) 31 30 Note: Standard versions are shown in bold. There is a 2500-piece minimum order increment for standard versions. Sample stock is typically held on standard versions only. Nonstandard versions require a minimum order increment of 10,000 pieces. Contact factory for availability www.maximintegrated.com Maxim Integrated │  13 MAX6746–MAX6753 μP Reset Circuits with Capacitor-Adjustable Reset/Watchdog Timeout Delay Selector Guide PART FIXED VCC RESET THRESHOLD ADJUSTABLE RESET THRESHOLD STANDARD WATCHDOG TIMER MIN/MAX WATCHDOG TIMER MAX6746 X — X MAX6747 X — X MAX6748 — X X MAX6749 — X X MAX6750 X X MAX6751 X MAX6752 X MAX6753 X — www.maximintegrated.com PUSH/ PULL RESET OPEN-DRAIN RESET MANUALRESET INPUT — X — X — — X X — X — — — — X — X — X — — X X — — X — — — X X — — — X — X — Maxim Integrated │  14 MAX6746–MAX6753 μP Reset Circuits with Capacitor-Adjustable Reset/Watchdog Timeout Delay Ordering Information PART Chip Information TEMP RANGE PIN-PACKAGE MAX6746KA_ _-T -40°C to +125°C 8 SOT23 MAX6746KA_ _+T -40°C to +125°C 8 SOT23 MAX6747KA_ _+T -40°C to +125°C 8 SOT23 MAX6746KA_ _/V+T -40°C to +125°C 8 SOT23 MAX6746KA23/V+T -40°C to +125°C 8 SOT23 MAX6746KA28/V+T -40°C to +125°C 8 SOT23 MAX6746KA29/V+T -40°C to +125°C 8 SOT23 MAX6746KA31/V+T -40°C to +125°C 8 SOT23 MAX6747KA_ _-T -40°C to +125°C 8 SOT23 MAX6747KA_ _/V+T -40°C to +125°C 8 SOT23 MAX6747KA30/V+T -40°C to +125°C 8 SOT23 MAX6747KA31/V+T -40°C to +125°C 8 SOT23 MAX6747KA46/V+T -40°C to +125°C 8 SOT23 MAX6748KA+T -40°C to +125°C 8 SOT23 MAX6749KA+T -40°C to +125°C 8 SOT23 MAX6750KA_ _+T -40°C to +125°C 8 SOT23 MAX6750KA_ __/V+T -40°C to +125°C 8 SOT23 MAX6750KA30/V+T -40°C to +125°C 8 SOT23 MAX6750KA32/V+T -40°C to +125°C 8 SOT23 MAX6751KA_ _-T -40°C to +125°C 8 SOT23 MAX6751KA_ _+T -40°C to +125°C 8 SOT23 MAX6751KA_ _/V+T* -40°C to +125°C 8 SOT23 MAX6751KA17/V+T -40°C to +125°C 8 SOT23 MAX6751KA30/V+T -40°C to +125°C 8 SOT23 MAX6751KA50/V+T -40°C to +125°C 8 SOT23 MAX6752KA_ _+T -40°C to +125°C 8 SOT23 MAX6752KA_ _/V+T* -40°C to +125°C 8 SOT23 MAX6752AKA32+T -40°C to +125°C 8 SOT23 MAX6752AKA32/V+T -40°C to +125°C 8 SOT23 MAX6752KA32/V+T -40°C to +125°C 8 SOT23 MAX6753KA_ _-T -40°C to +125°C 8 SOT23 MAX6753KA_ _+T -40°C to +125°C 8 SOT23 MAX6753KA_ _/V+T -40°C to +125°C 8 SOT23 MAX6753KA28/V+T -40°C to +125°C 8 SOT23 MAX6753KA29/V+T -40°C to +125°C 8 SOT23 MAX6753KA30/V+T -40°C to +125°C 8 SOT23 MAX6753KA46/V+T -40°C to +125°C 8 SOT23 PROCESS: BiCMOS Note: “_ _” represents the two number suffix needed when ordering the reset threshold voltage value for the MAX6746/MAX6747 and MAX6750–MAX6753. The reset threshold voltages are available in approximately 100mV increments. Table 2 contains the suffix and reset factory-trimmed voltages. All devices are available in tape-and-reel only. There is a 2500-piece minimum order increment for standard versions (see Table 3). Sample stock is typically held on standard versions only. Nonstandard versions require a minimum order increment of 10,000 pieces. Contact factory for availability. Devices are available in both leaded and lead(Pb)-free packaging. +Denotes a lead(Pb)-free/RoHS-compliant package. T = Tape and reel. /V denotes an automotive qualified part. *Future product—contact factory for availability. www.maximintegrated.com Maxim Integrated │  15 MAX6746–MAX6753 μP Reset Circuits with Capacitor-Adjustable Reset/Watchdog Timeout Delay Revision History REVISION NUMBER REVISION DATE PAGES CHANGED 0 7/02 Initial release — 3 12/05 Added the lead-free notation 1 4 9/10 Added the automotive version of the MAX6746 and the MAX6753 and revised the Typical Operating Characteristics 5 12/10 Added the automotive version of the MAX6750 1 6 4/11 Added the automotive version of the MAX6747 1 7 12/13 Added the automotive version of the MAX6751 1 8 2/14 Added a future product reference to MAX6751KA_ _ /V+T 1 9 5/14 Corrected typo 10 10 6/14 Added the automotive version of the MAX6752 1 11 9/15 Added MAX6752A to data sheet with new limits 2, 12, 14 12 12/15 Added lead-free part numbers to Ordering Information table and lead-free package code to Package Information table 14 13 2/16 Added MAX6752AKA32+T to Ordering Information table 14 14 9/16 15 1/17 16 10/17 Added AEC qualification text to Benefits and Features section and updated Ordering Information table with additional part numbers 17 12/17 Updated Ordering Information table with additional part numbers 14 18 3/18 Updated Absolute Maxim Rating and added Package Information section 2 DESCRIPTION Updated tWD equation value in Pin Configuration table and Applications Information section Added text to Transient Immunity section and added Figure 8 1, 4 6, 10 10, 11 1, 14 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com. Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc. ©  2018 Maxim Integrated Products, Inc. │  16
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