MAX703/MAX704
Low-Cost Microprocessor Supervisory
Circuits with Battery Backup
General Description
The MAX703/MAX704 microprocessor (μP) supervisory
circuits reduce the complexity and number of components
required for power-supply monitoring and battery control
functions in μP systems. These devices significantly
improve system reliability and accuracy compared to that
obtained with separate ICs or discrete components.
The MAX703/MAX704 are available in 8-pin DIP and SO
packages and provide four functions:
1) An active-low reset during power-up, power-down, and
brownout conditions.
2) Battery-backup switching for CMOS RAM, CMOS μPs,
or other low-power logic circuitry.
3) A 1.25V threshold detector for power-fail warning,
low-battery detection, or for monitoring a power supply
other than +5V.
Features
●● Battery-Backup Power Switching
●● Precision Supply-Voltage Monitor
• 4.65V (MAX703)
• 4.40V (MAX704)
●● 200ms Reset Pulse Width
●● Debounced TTL/CMOS-Compatible Manual Reset
Input
●● 200μA Quiescent Current
●● 50nA Quiescent Current in Battery-Backup Mode
●● Voltage Monitor for Power-Fail or Low-Battery
Warning
●● 8-Pin DIP and SO Packages
●● Guaranteed RESET Assertion to VCC = 1V
Ordering Information
PART
TEMP RANGE
PIN-PACKAGE
MAX703C/D
0°C to +70°C
Dice*
4) An active-low manual reset input.
MAX703CPA
0°C to +70°C
8 PDIP
The MAX703 and MAX704 differ only in their supplyvoltage monitor levels. The MAX703 generates a reset when
the supply drops below 4.65V, while the MAX704 generates a reset below 4.40V.
MAX703CSA
0°C to +70°C
8 SO
MAX703EPA
-40°C to +85°C
8 PDIP
MAX703ESA
-40°C to +85°C
8 SO
MAX703MJA
-55°C to +125°C
8 CERDIP**
MAX704C/D
0°C to +70°C
Dice*
MAX704CPA
0°C to +70°C
8 PDIP
MAX704CSA
0°C to +70°C
8 SO
MAX704EPA
-40°C to +85°C
8 PDIP
MAX704ESA
-40°C to +85°C
8 SO
Applications
●●
●●
●●
●●
Computers
Controllers
Intelligent Instruments
Critical μP Power Monitoring
Typical Operating Circuit
UNREGULATED DC
MICROPROCESSOR
VCC
R1
R2
REGULATED +5V
0.1µF
3.6V
LITHIUM
BATTERY
VCC
RESET
PFO
PFI
RESET
NMI
MAX703
MAX704
BUS
VBATT
MR
GND
PUSHBUTTON
SWITCH
VOUT
GND
MAX704MJA
-55°C to +125°C
8 CERDIP**
*Dice are tested at TA = +25°C only.
**Contact factory for availability and processing to MIL-STD-883.
Devices in PDIP and SO packages are available in both leaded
and lead(Pb)-free packaging. Specify lead(Pb)-free by adding
the “+” symbol at the end of the part number when ordering.
Lead(Pb)-free not available for CERDIP package.
Pin Configuration
TOP VIEW
VOUT
1
VCC 2
VCC
CMOS RAM
GND
GND
3
MAX703
MAX704
PFI 4
DIP/SO
19-0130; Rev 3; 5/14
8
VBATT
7
RESET
6
MR
5
PFO
MAX703/MAX704
Low-Cost Microprocessor Supervisory
Circuits with Battery Backup
Absolute Maximum Ratings
Terminal Voltage (with respect to GND)
Rate-of-Rise VBATT, VCC................................................100V/μs
VCC...................................................................-0.3V to +6.0V
Operating Temperature Range
VBATT................................................................-0.3V to +6.0V
C Suffix................................................................0°C to +70°C
All Other Inputs (Note 1).......................-0.3V to (VCB + 0.3V)
E Suffix.............................................................-40°C to +85°C
Input Current
M Suffix..........................................................-55°C to +125°C
VCC ..............................................................................200mA
Continuous Power Dissipation (TA = +70°C)
VBATT ............................................................................50mA
8-Pin PDIP (derated 9.09mW/°C above +70°C)..........727mW
GND................................................................................20mA
8-Pin SO (derated 5.88mW/°C above +70°C).............471mW
Output Current
8-Pin CERDIP (derated 8.00mW/°C above +85°C).....640mW
VOUT..............................Short-Circuit Protected for Up to 10s
Storage Temperature Range ............................-65°C to +160°C
All Other Outputs ............................................................20mA
Lead Temperature (soldering, 10s) .................................+300°C
Note 1: VCB is the greater of VCC and VBATT. The input voltage limits on PFI and MR may be exceeded if the current into these
pins is limited to less than 10mA.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Electrical Characteristics
(VCC = +4.75V to +5.5V for MAX703, VCC = +4.5V to +5.5V for MAX704, VBATT = 2.8V, TA = TMIN to TMAX, unless otherwise noted.)
PARAMETER
SYMBOL
Operating Voltage Range VCC,
VBATT
Supply Current (Excluding IOUT)
CONDITIONS
(Note 2)
ISUPPLY
MIN
TYP
0
MAX
UNITS
5.5
V
MAX70_C
200
350
MAX70_E/M
200
500
0.05
1.0
ISUPPLY in Battery-Backup Mode
(Excluding IOUT)
VCC = 0V,
VBATT = 2.8V
TA = +25°C
VBATT Standby Current
(Note 3)
5.5V > VCC >
VBATT + 0.2V
TA = +25°C
-0.10
+0.02
TA = TMIN to TMAX
-1.00
+0.02
TA = TMIN to TMAX
IOUT = 5mA
VOUT Output
IOUT = 50mA
VOUT in Battery-Backup Mode
IOUT = 250µA, VCC < VBATT - 0.2V
Battery Switch Threshold (VCC VBATT)
VCC < VRST
5.0
VCC VCC 0.05
0.025
VCC VCC 0.5
0.25
VBATT - VBATT 0.1
0.02
Power-up
20
Power-down
-20
Battery Switchover Hysteresis
RESET Threshold
RESET Pulse Width
mV
4.65
4.75
MAX704
4.25
4.40
4.50
140
200
40
VOH
RESET Output Voltage
VOL
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mV
4.50
tRST
ISOURCE = 800µA
µA
V
MAX703
RESET Threshold Hysteresis
µA
V
40
VRST
µA
V
mV
280
ms
VCC 1.5
ISINK = 3.2mA
0.4
MAX70_C, VCC = 1V, VCC falling,
VBATT = 0V, ISINK = 50µA
0.3
MAX70_E/M, VCC = 1.2V, VCC falling,
VBATT = 0V, ISINK = 100µA
0.3
V
Maxim Integrated │ 2
MAX703/MAX704
Low-Cost Microprocessor Supervisory
Circuits with Battery Backup
Electrical Characteristics (continued)
(VCC = +4.75V to +5.5V for MAX703, VCC = +4.5V to +5.5V for MAX704, VBATT = 2.8V, TA = TMIN to TMAX, unless otherwise noted.)
PARAMETER
SYMBOL
MR Input Threshold
CONDITIONS
VIL
Low
VIH
High
MR Pulse Width
tMR
MR to RESET Delay
tMD
MIN
TYP
MAX
UNITS
0.8
V
2.0
150
ns
250
ns
MR Pullup Current
MR = 0V
100
250
600
µA
PFI Input Threshold
VCC = 5V
1.20
1.25
1.30
V
-25
+0.01
+25
nA
PFI Input Current
PFO Output Voltage
VOH
ISOURCE = 800µA
VOL
ISINK = 3.2mA
VCC 1.5
V
0.4
Note 2: Either VCC or VBATT can go to 0V if the other is greater than 2.0V.
Note 3: “-” = battery-charging current, “+” = battery-discharging current.
Typical Operating Characteristics
(VCC = +5V, VBATT = 2.8V, TA = +25°C, unless otherwise noted.)
VCC = +5V
VBATT = +2.8V
TA = +25°C
4.95
2.80
OUTPUT VOLTAGE vs. LOAD CURRENT
VCC = 0V
VBATT = +2.8V
TA = +25°C
2.78
MAX703 RESET OUTPUT VOLTAGE
vs. SUPPLY VOLTAGE
MAX703 toc02
OUTPUT VOLTAGE vs. LOAD CURRENT
MAX703 toc01
5.00
MAX703 toc03
VBATT = 0V
TA = +25°C
4.90
VOUT (V)
VOUT (V)
VCC
SLOPE = 5Ω
4.85
1V/div
2.76
SLOPE = 80Ω
2.74
OV
4.75
10
0
20
30
40
50
2.70
0
0.2
0.4
IOUT (mA)
0.8
1.0
MAX703 toc04
+5V
PFO
MAX703 toc06
GND
10kΩ
1kΩ
30pF
TA = +25ºC
+1.30V
2µs/div
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0V
VCC = +5V
TA = +25°C
PFO
30pF
1kΩ
+3V
1.25V
30pF
RESET
+5V
PFO
1V/div
RESET
1V/div
POWER-FAIL COMPARATOR
RESPONSE TIME
+5V
PFI
RESET
330pF
500ms/div
PFI
PFO
VCC
0V
MAX703 toc05
+4V
+5V
GND
POWER-FAIL COMPARATOR
RESPONSE TIME
MAX703 RESET RESPONSE TIME
RESET VCC
0.6
IOUT (mA)
+5V
VCC
RESET
RESET
2.72
+5V
2kΩ
VCC
VCC
4.80
+5V
0V
0V
1.25V
VCC = +5V
TA = +25°C
PFI
400ns/div
+1.30V
PFI
+1.20V
+1.20V
400ns/div
Maxim Integrated │ 3
MAX703/MAX704
Low-Cost Microprocessor Supervisory
Circuits with Battery Backup
Pin Description
PIN NAME
FUNCTION
1
VOUT
Supply Output for CMOS RAM. When VCC is above the reset threshold, VOUT connects to VCC through a p-channel
MOSFET switch. When VCC is below the reset threshold, the higher of VCC or VBATT is connected to VOUT.
2
VCC
+5V Supply Input
3
GND
Ground
4
PFI
Power-Fail Comparator Input. When PFI is less than 1.25V, PFO goes low; otherwise PFO remains high. Connect PFI
to GND or VCC when not used.
5
PFO
Power-Fail Comparator Output. It goes low and sinks current when PFI is less than 1.25V; otherwise PFO remains high.
6
MR
Manual Reset Input. Generates a reset pulse when pulled below 0.8V. This active-low input is TTL/CMOS compatible
and can be shorted to ground with a switch. It has an internal 250µA pullup current. Leave floating when not used.
7
RESET
Reset Output. Remains low while VCC is below the reset threshold (4.65V for the MAX703, 4.40V for the MAX704). It
remains low for 200ms after VCC rises above the reset threshold (Figure 2) or MR goes from low to high.
8
Backup-Battery Input. When VCC falls below the reset threshold, VBATT is switched to VOUT if VBATT is 20mV greater
VBATT than VCC. When VCC rises 20mV above VBATT, VCC is switched to VOUT. The 40mV hysteresis prevents repeated
switching if VCC falls slowly.
+5V
VCC
VBATT
BATTERY-SWITCHOVER
CIRCUITRY
VBATT = 3.0V
VRST
VOUT
0V
VCC
+5V
RESET
GENERATOR
RESET
VOUT
3.0V
0V
+5V
1.25V
tRST
RESET
MR
0V
PFI
PFO
MAX703
MAX704
1.25V
GND
+5V
PFO*
0V
*PFO DEPENDS ON PFI EXCEPT IN BATTERY-BACKUP MODE, WHERE PFO IS LOW.
Figure 1. Block Diagram
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Figure 2. Timing Diagram
Maxim Integrated │ 4
MAX703/MAX704
Detailed Description
RESET Output
A μP’s reset input starts the μP in a known state.
Whenever the μP is in an unknown state, it should be held
in reset. The MAX703/MAX704 assert reset when VCC is
low, preventing code-execution errors during power-up,
power-down, or brownout conditions.
When VBATT is 2V or more, RESET is always valid,
irrespective of VCC. On power-up, as VCC rises, RESET
remains low. When VCC exceeds the reset threshold, an
internal timer holds RESET low for a time equal to the
reset pulse width (typically 200ms); after this interval,
RESET goes high (Figure 2). If a power-fail or brownout condition occurs (i.e., VCC drops below the reset
threshold), RESET is asserted. As long as VCC remains
below the reset threshold, the internal timer is continually
restarted, causing the RESET output to remain low. Thus,
a brownout condition that interrupts a previously initiated
reset pulse causes an additional 200ms delay from the
end of the last interruption.
Power-Fail Comparator
The PFI input is compared to an internal reference. If PFI
is less than 1.25V, PFO goes low. The power-fail comparator can be used as an undervoltage detector to signal
a failing power supply. In the Typical Operating Circuit,
an external voltage-divider at PFI is used to monitor the
unregulated DC voltage from which the regulated +5V
supply is derived.
The voltage-divider can be chosen so the voltage at PFI falls
below 1.25V just before the +5V regulator drops out. PFO is
then used as an interrupt to prepare the μP for power-down.
Low-Cost Microprocessor Supervisory
Circuits with Battery Backup
MAX704 substrate, regardless of the voltage applied to
VBATT (Figure 3). During this time, diode D1 (between
VBATT and the substrate) conducts current from VBATT to
VCC if VBATT ≥ (VCC + 0.6V).
When the battery-backup mode is activated, VBATT connects to VOUT. In this mode, the substrate connects to
VBATT and internal circuitry is powered from the battery
(Figure 3). Table 1 shows the status of the MAX703/
MAX704 inputs and outputs in battery-backup mode.
When VCC is below, but within, 1V of VBATT, the internal
switchover comparator draws about 30μA. Once VCC
Table 1. Input and Output Status in
Battery-Backup Mode
SIGNAL
VCC
STATUS
Disconnected from VOUT.
VOUT
Connected to VBATT through an internal 80Ω
p-channel MOSFET switch.
VBATT
Connected to VOUT. Supply current is < 1µA
when VCC < (VBATT - 1V).
RESET
Logic-low.
PFI
Power-fail comparator is disabled.
PFO
Logic-low.
MR
Disabled.
VBATT
VCC
S1
MAX703
MAX704
S2
To conserve power, the power-fail comparator is turned off
and PFO is forced low when the MAX703/MAX704 enter
battery-backup mode.
D1
As long as VCC exceeds the reset threshold, VCC connects to VOUT through a 5Ω p-channel MOSFET power
switch. Once VCC falls below the reset threshold, RESET
goes low and VCC or VBATT (whichever is higher) switches to VOUT. Note that VBATT switches to VOUT through
an 80Ω switch only if VCC is below the resetthreshold voltage and VBATT is greater than VCC. When VCC exceeds
the reset threshold, it is connected to the MAX703/
S4
D2
SUBSTRATE
Backup-Battery Switchover
In the event of a brownout or power failure, it may be necessary to preserve the contents of RAM. With a backup
battery installed at VBATT, the MAX703/MAX704 automatically switch RAM to backup power when VCC fails.
S3
D3
VOUT
S1/S2
S1/S2
VCC > Reset Threshold
CONDITION
Open
Closed
VCC < Reset Threshold and
VCC > VBATT
Open
Closed
VCC < Reset Threshold and
VCC < VBATT
Closed
Open
Figure 3. Battery-Switchover Block Diagram
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Maxim Integrated │ 5
MAX703/MAX704
Low-Cost Microprocessor Supervisory
Circuits with Battery Backup
drops to more than 1V below VBATT, the internal switchover comparator shuts off and the supply current falls to
less than 1μA.
+5V
VOUT
VCC
Manual Reset
TO STATIC RAM
MAX704
The manual reset input (MR) allows RESET to be activated by a pushbutton switch. The switch is effectively
debounced by the 140ms minimum reset pulse width.
Because it is TTL/CMOS compatible, MR can be driven
by an external logic line.
Applications Information
Supercaps are capacitors with extremely high capacitance values (on the order of 0.1 Farad). When using
supercaps, if VCC exceeds the MAX703/MAX704 reset
thresholds (4.65V and 4.40V, respectively), VBATT may
not exceed VCC by more than 0.6V. Thus, with a 5%
tolerance on VCC, VBATT should not exceed VCC (min)
+ 0.6V = 5.35V. Similarly, with a 10% tolerance on VCC,
VBATT should not exceed 5.1V.
Figure 4’s supercap circuit uses the MAX703 with a ±5%
tolerance voltage supply. In this circuit, the supercap
rapidly charges to within a diode drop of VCC. However,
the diode leakage current with trickle charge the supercap voltage to VCC. If VBATT = 5.25V and the power is
suddenly removed and then reapplied with VCC = 4.75V,
VBATT - VCC does not exceed the allowable 0.6V difference voltage.
Figure 5’s circuit uses the MAX704 with a ±10% tolerance
voltage supply. Note that if VCC = 5.5V and VBATT ≤ 5.1V,
the power can be suddenly removed and reapplied with
VCC = 4.5V, and VBATT - VCC will not exceed the allowable 0.6V voltage difference.
+5V
VOUT
TO STATIC RAM
MAX703
RESET
VBATT
0.1F
100kΩ
0.1F
TOP
GND
Figure 5. Using a Supercap as a Backup Power Source with
the MAX704 and a +5V ±10% Supply
Using a Supercap as a
Backup Power Source
VCC
RESET
VBATT
TOP
GND
Batteries and Power Supplies as
Backup Power Sources
Lithium batteries work well as backup batteries because
they have very low self-discharge rates and high-energy
density. Single lithium batteries with opencircuit voltages of 3.0V to 3.6V are ideal for use with the MAX703/
MAX704. Batteries with an open-circuit voltage less than
the minimum reset threshold plus 0.3V can be directly
connected to the MAX703/MAX704 VBATT input with no
additional circuitry (see the Typical Operating Circuit).
However, batteries with open-circuit voltages greater than
the reset threshold plus 0.3V cannot be used as backup
batteries, since they source current into the substrate
through diode D1 (Figure 3) when VCC is close to the
reset threshold.
Table 2. Allowable Backup-Battery
Voltages
PART
MAXIMUM BACKUP-BATTERY VOLTAGE (V)
MAX703
4.80
MAX704
4.55
Using the MAX703/MAX704 without a
Backup Power Source
If a backup power source is not used, ground VBATT
and connect VCC to VOUT. A direct connection to VCC
eliminates any voltage drop across the internal switch,
which would otherwise appear at VOUT. Alternatively, use
the MAX705–MAX708, which do not have batterybackup
capabilities.
Figure 4. Using a Supercap as a Backup Power Source with a
MAX703 and a +5V ±5% Supply
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Maxim Integrated │ 6
MAX703/MAX704
Low-Cost Microprocessor Supervisory
Circuits with Battery Backup
Ensuring a Valid RESET Output
Down to VCC = 0V
When VCC falls below 1V, the MAX703/MAX704 RESET
output no longer sinks current; it becomes an open circuit.
High-impedance CMOS logic inputs can drift to undetermined voltages if left as open circuits. If a pulldown
resistor is added to the RESET pin as shown in Figure 6,
any stray charge or leakage currents will flow to ground,
holding RESET low. Resistor value R1 is not critical. It
should be about 100kΩ, which is large enough not to load
RESET and small enough to pull RESET to ground.
Replacing the Backup Battery
The backup battery can be removed while VCC remains
valid without triggering a reset. As long as VCC stays
above the reset threshold, battery-backup mode cannot
VOUT
VCC
MAX703
MAX704
Hysteresis adds a noise margin to the power-fail comparator and prevents repeated triggering of PFO when
VIN is near the power-fail comparator trip point. Figure 7
shows how to add hysteresis to the power-fail comparator. Select the ratio of R1 and R2 so that PFI sees 1.25V
when VIN falls to the desired trip point (VTRIP). Resistor
R3 adds hysteresis. It will typically be an order of magnitude greater than R1 or R2. The current through R1 and
R2 should be at least 1μA to ensure that the 25nA (max)
PFI input current does not shift the trip point. R3 should
be larger than 10kΩ to prevent it from loading down the
PFO pin. Capacitor C1 adds additional noise rejection.
The power-fail comparator can be used to monitor a
negative supply voltage using Figure 8’s circuit. When
the negative supply is valid, PFO is low. When the negative supply voltage droops, PFO goes high. This circuit’s
accuracy is affected by the PFI threshold tolerance, the
VCC voltage, and resistors R1 and R2.
R1
Figure 6. RESET Valid to Ground Circuit
VIN
Adding Hysteresis to the
Power-Fail Comparator
Monitoring a Negative Voltage
RESET
VBATT
be entered. This is an improvement on switchover ICs
that initiate a reset when VCC and VBATT are at or near
the same voltage level (regardless of the reset threshold
voltage). If the voltage on the unconnected VBATT pin
floats up toward VCC, this condition alone cannot initiate
a reset when using the MAX703/MAX704.
+5V
+5V
R1
PFI
C1*
R3
R2
R1
VCC
PFI
MAX703
MAX704
PFO
TOP
R2
MAX703
MAX704
PFO
GND
GND
*OPTIONAL
V-
+5V
+5V
PFO
PFO
0V
VCC
0V
VL
R + R 2
V TRIP = 1.25 1
R2
R 2 ||R 3
VH = 1.25 /
R 1 + R 2 ||R 3
VTRIP
VIN
VH
VL − 1.25 5 − 1.25 1.25
+
=
R1
R3
R2
Figure 7. Adding Hysteresis to the Power-Fail Comparator
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0V
VTRIP
V-
0V
5 − 1.25 1.25 − V TRIP
=
R1
R2
NOTE: VTRIP IS NEGATIVE
Figure 8. Monitoring a Negative Voltage
Maxim Integrated │ 7
MAX703/MAX704
Low-Cost Microprocessor Supervisory
Circuits with Battery Backup
Using the Power-Fail Comparator
to Assert Reset
In addition to asserting reset at the VCC reset threshold voltage, reset can also be asserted at the PFI input
threshold voltage. Connect PFO to MR to initiate a reset
pulse when the monitored supply drops below a userspecified threshold or when VCC falls below the reset
threshold. For additional noise rejection, place a capacitor
between PFI and GND.
Table 3. Maxim Microprocessor Supervisory Products
NOMINAL
MINIMUM
WATCHRESET
BACKUPCE
MANUAL WATCH- LOW- ACTIVE- BATT
DOG
POWER-FAIL
PULSE
BATTERY WRITE
RESET
DOG
LINE
HIGH
ON
TIMEOUT
COMPARATOR
WIDTH
SWITCH PROTECT
INPUT
INPUT OUTPUT RESET OUTPUT
PERIOD
(ms)
(s)
PART
NOMINAL
RESET
THRESHOLD
(V)
MAX690A
4.65
140
1.6
Yes
No
Yes
No
No
No
No
No
MAX691A
4.65
140/Adj.
1.6/Adj.
Yes
Yes
Yes
No
Yes
Yes
Yes
Yes
MAX692A
4.40
140
1.6
Yes
No
Yes
No
No
No
No
No
MAX693A
4.40
140/Adj.
1.6/Adj.
Yes
Yes
Yes
No
Yes
Yes
Yes
Yes
MAX696
Adj.
35/Adj.
1.6/Adj.
Yes
No
Yes
No
Yes
Yes
Yes
Yes
MAX697
Adj.
35/Adj.
1.6/Adj.
No
Yes
Yes
No
Yes
Yes
Yes
No
MAX700
4.65/Adj.
200
—
No
No
No
Yes
No
No
Yes
No
MAX703
4.65
140
—
Yes
No
Yes
Yes
No
No
No
No
MAX704
4.40
140
—
Yes
No
Yes
Yes
No
No
No
No
MAX705
4.65
140
1.6
No
No
Yes
Yes
Yes
No
No
No
MAX706
4.40
140
1.6
No
No
Yes
Yes
Yes
No
No
No
MAX707
4.65
140
—
No
No
Yes
Yes
No
No
Yes
No
MAX708
4.40
140
—
No
No
Yes
Yes
No
No
Yes
No
MAX791
4.65
140
1.0
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
MAX1232
4.50/4.75
250
0.15/
0.60/1.2
No
No
No
Yes
No
No
Yes
No
MAX1259
—
—
—
Yes
No
Yes
No
No
No
No
No
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Maxim Integrated │ 8
MAX703/MAX704
Low-Cost Microprocessor Supervisory
Circuits with Battery Backup
Chip Topography
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
0.070”
[1.778mm]
VOUT
VBATT
VCC
RESET
WDI
GND
PFI
0.065”
[1.651mm]
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
8 PDIP
P8+1
21-0043
—
8 SO
S8+2
21-0041
90-0096
8 CERDIP
J8+2
21-0045
—
PFO
SUBSTRATE MUST BE LEFT UNCONNECTED
www.maximintegrated.com
Maxim Integrated │ 9
MAX703/MAX704
Low-Cost Microprocessor Supervisory
Circuits with Battery Backup
Revision History
REVISION
NUMBER
REVISION
DATE
3
5/14
PAGES
CHANGED
DESCRIPTION
Removed “Automotive Systems” from the Applications section
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
© 2014 Maxim Integrated Products, Inc. │ 10
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