EVALUATION KIT AVAILABLE
MAX77178/MAX77179
High-Bandwidth LTE/WCDMA PA Power Management ICs
in a 1.75mm x 1.4mm, 0.4mm Pitch WLP
General Description
Features
The MAX77178/MAX77179 step-down converters are
optimized for powering the power amplifier (PA) in multimode/multiband handsets for 3G/4G applications such
as LTE, WCDMA, as well as other RF PA applications
such as Wi-FiM and WiMAXM.
S Meet 3G/4G Timing and RF Spectrum Mask
Requirements
20µs (typ) Settling Time for 0.5V to 3.4V Output
Voltage Change
30µs (typ) Settling from Enable to 95% Output
Voltage Regulation
S Four Selectable Output Voltages with Logic Inputs
(MAX77178 Only)
S Analog Controlled Output Voltage Settings from
0.5V to VIN (MAX77179 Only)
S 1A Peak Output Current Capability
S ±3% Output Voltage Accuracy
S Allows Use of Small (1210) 0.47µH Inductor
S 100% Duty-Cycle Operation
S Simple Logic On/Off Controls
S < 1µA Shutdown Supply Current
S 2.5V to 5.5V Supply Voltage Range
S Overcurrent and Overtemperature Protection
The 2.5V to 5.5V input supply range supports both current
and future battery chemistries. The MAX77179 uses an
analog input driven by an external DAC to control the output
voltage linearly for continuous PA power adjustment. The
output voltage range (0.5V to VIN) supports operation with
a wide variety of PAs. The MAX77178 uses a 2-bit GPIO
interface with four selectable output voltage options to
control the output voltage supply for PA power adjustment.
Fast switching frequency (8MHz, typ) allows the use of
low value inductor and small ceramic output capacitors while maintaining low-ripple voltage. Efficiency
is enhanced at light loads by switching to skip mode
where the converter switches only as needed to service
the load. Adaptive smart FET scaling further improves
efficiency under all operating conditions.
Applications
Other features include overcurrent and overtemperature
protection, and a very low-current (0.1µA, typ) shutdown
mode.
LTE, WCDMA Cell Phones/Smartphones /Tablets/
Data Cards
Ordering Information appears at end of data sheet.
WiMAX is a registered certification mark and service mark of
WiMAX Forum.
For related parts and recommended products to use with this part,
refer to www.maximintegrated.com/MAX77178.related.
Wi-Fi is a registered certification mark of Wi-Fi Alliance
Corporation.
Typical Operating Circuit
VIN
IN3
VIN
IN1
C4
1µF
MAX77178
MAX77179
(REF)
SEL0 (MODE_SEL)
LX
SEL1 (BYP)
PGND
EN
C1
0.1µF
C2
4.7µF
IN2
0.47µH
VOUT
C3
4.7µF
C5
0.1µF
FB
AGND
GSNS
NOTE: ( ) FOR MAX77179
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
19-6405; Rev 0; 3/13
MAX77178/MAX77179
High-Bandwidth LTE/WCDMA PA Power Management ICs
in a 1.75mm x 1.4mm, 0.4mm Pitch WLP
ABSOLUTE MAXIMUM RATINGS
IN1, IN2 to PGND..................................................-0.3V to +6.0V
IN3 to AGND.........................................................-0.3V to +6.0V
SEL0, SEL1, EN, FB to AGND (MAX77179).-0.3V to (VIN3 + 0.3)
MODE_SEL, BYP, REF, EN, FB to
AGND (MAX77178)................................. -0.3V to (VIN3 + 0.3)
REF to GSNS............................................... -0.3V to (VIN3 + 0.3)
AGND to GSNS.....................................................-0.3V to +0.3V
AGND to PGND.....................................................-0.3V to +0.3V
ILX Current................................................................ 1250mARMS
Continuous Power Dissipation (TA = +70NC)
12-Bump, 1.75mm x 1.4mm WLP
(derate 13.7 mW/°C above +70°C)............................1096mW
Operating Temperature Range........................... -40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range............................. -65°C to +150°C
Soldering Temperature (reflow).......................................+260°C
PACKAGE THERMAL CHARACTERISTICS (Note 1)
WLP
Junction-to-Ambient Thermal Resistance (qJA)...........73°C/W
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Note 2: This device is constructed using a unique set of packaging techniques that impose a limit on the thermal profile the device
can be exposed to during board-level solder attach and rework. This limit permits only the use of the solder profiles
recommended in the industry-standard specification, JEDEC 020A, paragraph 7.6, Table 3 for IR /VPR and convection
reflow. Preheating is required. Hand or wave soldering is not allowed.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VIN1 = VIN2 = VIN3 = 3.7V, VPGND = VAGND = 0V, L = 0.47µH, COUT = 4.7µF, TA = -40°C to +85°C. Typical values are at
TA = +25°C, unless otherwise noted.) (Note 3)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
5.5
V
2.30
V
GENERAL
IN1, IN2, IN3 Operating Voltage
IN1, IN2, IN3 Undervoltage Lockout
(UVLO) Threshold
2.5
IN1, IN2, IN3 falling (enter power-down mode and
disable the output)
2.10
IN1, IN2, IN3 UVLO Hysteresis
IN1, IN2, IN3 Shutdown Supply
Current
2.20
100
VEN = VAGND = 0V or VIN_ is
below UVLO threshold
TA = +25NC
0.1
TA = +85NC
0.1
mV
1
FA
STEP-DOWN DC-DC CONVERTER
IN1, IN2, IN3 No-Load Supply
Current
VOUT = 0.5V, no load, skip mode operation
450
VOUT = 0.5V, no load, PWM operation
3.5
VOUT = 3V, no load, PWM operation
mA
8
Output Capacitance Required for
Stability
VOUT = 0.5V to VIN1, IOUT = 0A to 1A
0.1
Output Inductance Required for
Stability
VOUT = 0.5V to VIN1, IOUT = 0A to 1A
0.22
Startup Time from Shutdown
From VEN = low to VEN = high, VOUT = 0.5V
Maxim Integrated
FA
0.47
30
10
FF
1.0
FH
Fs
2
MAX77178/MAX77179
High-Bandwidth LTE/WCDMA PA Power Management ICs
in a 1.75mm x 1.4mm, 0.4mm Pitch WLP
ELECTRICAL CHARACTERISTICS (continued)
(VIN1 = VIN2 = VIN3 = 3.7V, VPGND = VAGND = 0V, L = 0.47µH, COUT = 4.7µF, TA = -40°C to +85°C. Typical values are at
TA = +25°C, unless otherwise noted.) (Note 3)
PARAMETER
CONDITIONS
Output Transition Time (MAX77179)
Rise time when VOUT transitions from 0.5V to 3.4V,
IOUT = 1A, COUT = 4.7FF, L = 0.47FH
0.33
V/Fs
Output Transition Time (MAX77178)
Rise time when VOUT transitions from 0.8V to 3.4V,
IOUT = 500mA, COUT = 4.7FF, L = 0.47FH
0.33
V/Fs
Maximum Output Current
MIN
TYP
MAX
1
UNITS
A
High-Side Current-Limit Threshold
1.2
2.0
A
Low-Side Current-Limit Threshold
0.8
1.65
A
Low-Side Negative Current-Limit
Threshold
0.7
1.8
A
Low-Side Zero-Cross Threshold
LX High-Side On-Resistance
LX Low-Side On-Resistance
LX Leakage Current
Efficiency
Maxim Integrated
40
IN1/IN2 to LX,
ILX = -200mA
LX to PGND,
ILX = -200mA
VIN_ = VLX = 5.5V,
VEN = 0V
VOUT > 1.6V,
VMODE_SEL = VIN3
90
1V P VOUT P 1.6V,
VMODE_SEL = VIN3
135
VOUT < 1V,
VMODE_SEL = VIN3
192
VOUT > 1.8V,
VMODE_SEL = VAGND
135
VOUT P 1.8V,
VMODE_SEL = VAGND
360
VOUT > 1.6V,
VMODE_SEL = VIN3
75
1V P VOUT P 1.6V,
VMODE_SEL = VIN3
110
VOUT < 1V,
VMODE_SEL = VIN3
150
VOUT > 1.8V,
VMODE_SEL = VAGND
110
VOUT P 1.8V,
VMODE_SEL = VAGND
290
TA = +25NC
TA = +85NC
-2.0
0.03
0.24
VIN1 = 3.6V, VOUT = 0.7V, IOUT = 16mA
68
VIN1 = 3.6V, VOUT = 1.3V, IOUT = 50mA
80
VIN1 = 3.6V, VOUT = 2.2V, IOUT = 300mA
89
VIN1 = 3.6V, VOUT = 3.0V, IOUT = 500mA
93
mA
160
mI
130
mI
+2.0
FA
%
3
MAX77178/MAX77179
High-Bandwidth LTE/WCDMA PA Power Management ICs
in a 1.75mm x 1.4mm, 0.4mm Pitch WLP
ELECTRICAL CHARACTERISTICS (continued)
(VIN1 = VIN2 = VIN3 = 3.7V, VPGND = VAGND = 0V, L = 0.47µH, COUT = 4.7µF, TA = -40°C to +85°C. Typical values are at
TA = +25°C, unless otherwise noted.) (Note 3)
PARAMETER
CONDITIONS
MIN
LX Rise Time
TYP
MAX
UNITS
1
ns
Output-Voltage Line Regulation
VIN = 2.5V to 5.5V, IOUT = 100mA, VOUT = 1.8V
1.3
%/V
Line Regulation Transient Response
VIN1(DC) = 3.6VRMS, VIN1(AC) = 300mVP-P ripple
at 10Hz to 270kHz, IOUT = 500mA, VOUT = 3.0V
25
mVP-P
Output-Voltage Load Regulation
IOUT = 0 to 1A
-1.5
%/A
Load Regulation Transient Response
tRISE = tFALL = 1.5Fs, IOUT = 0.2A to 1A,
VOUT = 3.0V
25
mVP-P
Operating Frequency
VOUT = 1.8V, IOUT = 0A, PWM
Automatic Bypass Mode Entry
Threshold
VIN - VOUT, when the drop between VIN and VOUT
becomes less than this threshold, high-side FET is
turned on continuously
6
8
10
MHz
0.125
V
Automatic Bypass Mode Entry
Hysteresis
40
mV
Automatic Bypass Mode Exit
Debounce Time
5
Fs
Minimum Duty Cycle
Skip mode
0
PWM mode
10
Maximum Duty Cycle
Output-Voltage Ripple
%
100
COUT = 4.7FF, ESR of COUT < 20mI, fSW = 8MHz,
IOUT = 10mA to 1A, VOUT = 1.8V, PWM mode
5
Skip mode, IOUT = 0mA
45
%
mVP-P
PROTECTION CIRCUITS
Thermal Shutdown
160
NC
Thermal Shutdown Hysteresis
20
NC
CONTROL
REF Input Voltage Range
MAX77179, analog control voltage
REF to OUT Gain Accuracy
MAX77179, VREF = 1V, gain = VOUT/VREF
REF to OUT Absolute Accuracy
(MAX77179)
Output Voltage Range (MAX77179)
Maxim Integrated
VREF = 1V, IOUT = 0
TA = +25NC
TA = -40NC to +85NC
Controlled by the REF input
VREF = 0V, skip mode operation
0
VIN3 - 0.3
-2.5
+2.5
-3
+3
-3.5
+3.5
0.5
VIN
0.1
V
%
%
V
4
MAX77178/MAX77179
High-Bandwidth LTE/WCDMA PA Power Management ICs
in a 1.75mm x 1.4mm, 0.4mm Pitch WLP
ELECTRICAL CHARACTERISTICS (continued)
(VIN1 = VIN2 = VIN3 = 3.7V, VPGND = VAGND = 0V, L = 0.47µH, COUT = 4.7µF, TA = -40°C to +85°C. Typical values are at
TA = +25°C, unless otherwise noted.) (Note 3)
PARAMETER
Output Voltage Accuracy
(MAX77178)
CONDITIONS
VSEL1 = 0, VSEL0 = 0,
VOUT = 2.9V
TA = +25NC
VSEL1 = 0, VSEL0 = 1,
VOUT = 2.325V
TA = +25NC
VSEL1 = 1, VSEL0 = 1,
VOUT = 1.7V
VSEL1 = 1, VSEL0 = 0,
VOUT = 1.0V
MIN
TA = -40NC to +85NC
UNITS
+2
-2
+2
Q3
-2
TA = -40NC to +85NC
TA = +25NC
MAX
Q3
TA = -40NC to +85NC
TA = +25NC
TYP
-2
+2
%
Q3
-2.5
TA = -40NC to +85NC
+2.5
Q3
TA = +25NC
0.1
TA = +85NC
1
1
REF Input Current
MAX77179, VREF = 1V
REF Input Capacitance
MAX77179
Analog Gain Setting Range
MAX77179 (Note 4)
Logic-Input High Voltage
VIN_ = 2.5V to 5.5V, VSEL_,VBYP, VMODE_SEL, VEN
Logic-Input Low Voltage
VIN_ = 2.5V to 5.5V, VSEL_, VBYP, VMODE_SEL, VEN
Logic-Input Pulldown Resistor
SEL0, SEL1, MODE_SEL, BYP
800
kI
Select Debounce Delay
tEN_DEBOUNCE , SEL0 or SEL1(MAX77178), BYP
or MODE_SEL (MAX77179)
500
ns
Output Noise
Not production tested,
650MHz to 2.2GHz, 30kHz
resolution bandwidth
-105
dBm/
Hz
VIN = 3.6V,
VOUT = 3V;
IOUT = 200mA,
400mA, 600mA
FA
5
pF
2.5
V/V
1.2
V
0.4
V
Note 3: All devices are 100% production tested at TA = +25°C. Limits over the operating temperature range are guaranteed
by design.
Note 4: Factory programmable parameter. Contact the factory for options.
Maxim Integrated
5
MAX77178/MAX77179
High-Bandwidth LTE/WCDMA PA Power Management ICs
in a 1.75mm x 1.4mm, 0.4mm Pitch WLP
Typical Operating Characteristics
(Typical Operating Circuits, VIN = 3.7V, IOUT = 0.47μH, COUT = 4.7μF, TA = +25°C, unless otherwise noted.)
MAX77179
EFFICIENCY vs. LOAD CURRENT
90
80
70
EFFICIENCY (%)
50
40
60
50
40
30
VIN = 4.2V/3.7V/3.2V
VOUT = 0.6V
VIN = 4.2V/3.7V/3.2V
VOUT = 1.8V
20
10
10
1000
100
60
50
40
VIN = 4.2V/3.7V/3.2V
VOUT = 2.5V
20
10
10
1
70
30
30
20
1
10
100
10
1000
100
1000
LOAD CURRENT (mA)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
MAX77179
EFFICIENCY vs. LOAD CURRENT
MAX77178
EFFICIENCY vs. LOAD CURRENT
MAX77178
EFFICIENCY vs. LOAD CURRENT
80
80
EFFICIENCY (%)
70
90
60
50
40
70
60
50
40
30
30
VIN = 4.2V/3.7V/3.2V
VOUT = 3.2V
20
10
10
100
1000
10
LOAD CURRENT (mA)
70
60
50
40
10
100
VIN = 4.2V/3.7V/3.2V
VOUT = 1.7V
10
1000
10
LOAD CURRENT (mA)
10
100
1000
LOAD CURRENT (mA)
MAX77178
EFFICIENCY vs. LOAD CURRENT
90
80
90
80
EFFICIENCY (%)
70
60
50
40
30
MAX77178 toc04d
100
MAX77178 toc04c
100
EFFICIENCY (%)
80
20
MAX77178
EFFICIENCY vs. LOAD CURRENT
70
60
50
40
30
VIN = 4.2V/3.7V/3.2V
VOUT = 2.325V
20
10
VIN = 4.2V/3.7V/3.2V
VOUT = 2.9V
20
10
10
10
100
LOAD CURRENT (mA)
Maxim Integrated
90
30
VIN = 4.2V/3.7V/3.2V
VOUT = 1.0V
20
10
100
EFFICIENCY (%)
90
MAX77178 toc04b
100
MAX77178 toc04
100
EFFICIENCY (%)
80
MAX77178 toc04a
EFFICIENCY (%)
60
90
EFFICIENCY (%)
70
100
MAX77178 toc02
100
MAX77178 toc01
80
MAX77179
EFFICIENCY vs. LOAD CURRENT
MAX77178 toc03
MAX77179
EFFICIENCY vs. LOAD CURRENT
1000
10
10
100
1000
LOAD CURRENT (mA)
6
MAX77178/MAX77179
High-Bandwidth LTE/WCDMA PA Power Management ICs
in a 1.75mm x 1.4mm, 0.4mm Pitch WLP
Typical Operating Characteristics (continued)
(Typical Operating Circuits, VIN = 3.7V, IOUT = 0.47μH, COUT = 4.7μF, TA = +25°C, unless otherwise noted.)
EFFICIENCY vs. OUTPUT VOLTAGE
MODE_SEL = HIGH
70
60
50
70
60
50
VIN = 3.7V
ROUT = 5I
40
MODE_SEL = HIGH
80
MODE_SEL = HIGH
70
60
50
VIN = 3.7V
ROUT = 10I
40
80
VIN = 3.7V
ROUT = 20I
40
0.2 0.6 1.0 1.4 1.8 2.2 2.6 3.0 3.4 3.8
0.2 0.6 1.0 1.4 1.8 2.2 2.6 3.0 3.4 3.8
0.2 0.6 1.0 1.4 1.8 2.2 2.6 3.0 3.4 3.8
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
FREQUENCY vs. REFERENCE VOLTAGE
8
FREQUENCY (MHz)
7
9
6
5
4
3
7
6
5
4
3
2
2
1
1
VIN = 3.7V, ROUT = 5I
0
0
0.3
0.9
1.2
1.5
0
0.3
0.6
0.9
1.5
1.2
3
VIN = 3.7V, ROUT = 20I
0
0.3
8
VOUT = 3.2V
6
VOUT = 1.8V
4
VOUT = 0.6V
2
40
4.5
SUPPLY VOLTAGE (V)
5.0
0.9
ERROR = VOUT - 2.5 x VREF
20
VREF = 0.32V/0.48V/0.72V
1.2
1.5
VREF = 0.16V
VREF = 0.96V
0
VREF = 1.12V
-20
-40
-60
VREF = 1.28V
-80
0
4.0
0.6
REFERENCE VOLTAGE (V)
LOAD REGULATION ERROR (mV)
VOUT = 2.5V
MAX77178 toc11
NO LOAD SUPPLY CURRENT (mA)
4
LOAD REGULATION ERROR
vs. LOAD CURRENT
VIN = 3.7V
10
Maxim Integrated
5
REFERENCE VOLTAGE (V)
12
3.5
6
0
NO LOAD SUPPLY CURRENT
vs. SUPPLY VOLTAGE
3.0
7
1
VIN = 3.7V, ROUT = 10I
REFERENCE VOLTAGE (V)
2.5
8
2
0
0.6
9
5.5
MAX77178 toc12
8
FREQUENCY (MHz)
9
FREQUENCY vs. REFERENCE VOLTAGE
10
MAX77178 toc09
MAX77178 toc08
10
MAX77178 toc10
FREQUENCY vs. REFERENCE VOLTAGE
10
FREQUENCY (MHz)
MODE_SEL = GND
90
EFFICIENCY (%)
MODE_SEL = GND
80
100
MAX77178 toc06
MAX77178 toc05
MODE_SEL = GND
90
EFFICIENCY (%)
EFFICIENCY (%)
90
EFFICIENCY vs. OUTPUT VOLTAGE
100
MAX77178 toc07
EFFICIENCY vs. OUTPUT VOLTAGE
100
0
200
400
600
800
LOAD CURRENT (mA)
1000
7
MAX77178/MAX77179
High-Bandwidth LTE/WCDMA PA Power Management ICs
in a 1.75mm x 1.4mm, 0.4mm Pitch WLP
Typical Operating Characteristics (continued)
(Typical Operating Circuits, VIN = 3.7V, IOUT = 0.47μH, COUT = 4.7μF, TA = +25°C, unless otherwise noted.)
VREF = 0.48V
VREF = 0.72V
0
VREF = 0.16V
-50
VREF = 1.12V
-100
VREF = 1.28V
VREF = 0.96V
2.7
3.1
0
-50
-100
-150
3.5
3.9 4.3 4.7
SUPPLY VOLTAGE (V)
5.1
5.5
VIN = 3.7V
ERROR = VOUT - 2.5 x VREF
0.1
0.3
0.5
VREF = 0.72V
0
VREF = 0.16V
-20
ERROR = VOUT - 2.5 x VREF
VIN = 3.7V
-40
-60
VREF = 1.28V
-80
0.7 0.9 1.1
REF VOLTAGE (V)
1.3
1.5
-40
-15
10
35
60
85
TEMPERATURE (°C)
LIGHT LOAD SWITCHING WAVEFORM
HEAVY LOAD SWITCHING WAVEFORM
MAX77178 toc16
VOUT
AC-COUPLED
MAX77178 toc15
50
20
OUTPUT VOLTAGE ERROR (mV)
VREF = 0.32V
50
MAX77178 toc14
ERROR = VOUT - 2.5 x VREF
OUTPUT VOLTAGE ERROR (mV)
LINE REGULATION ERROR (mV)
100
OUTPUT VOLTAGE ERROR
vs. TEMPERATURE
OUTPUT VOLTAGE ERROR
vs. REF VOLTAGE
MAX77178 toc13
LINE REGULATION ERROR
vs. SUPPLY VOLTAGE
MAX77178 toc17a
20mV/div
VOUT
AC-COUPLED
10mV/div
2V/div
VLX
0V
VLX
2V/div
20mA LOAD
0V
100mA /div
ILX
500mA /div
ILX
VOUT = 2.5V
500mA LOAD
0A
0A
200ns/div
2µs/div
HEAVY LOAD SWITCHING WAVEFORM
ENABLE WAVEFORM (NO LOAD)
MAX77178 toc17b
VOUT
AC-COUPLED
MAX77178 toc18
10mV/div
5V/div
0V
2V/div
VEN
VOUT
0V
2V/div
VLX
VLX
2V/div
0V
0V
500mA /div
ILX
VOUT = 3.2V
500mA LOAD
200ns/div
Maxim Integrated
VREF = 1.28V
ILX
0A
1A /div
0A
10µs/div
8
MAX77178/MAX77179
High-Bandwidth LTE/WCDMA PA Power Management ICs
in a 1.75mm x 1.4mm, 0.4mm Pitch WLP
Typical Operating Characteristics (continued)
(Typical Operating Circuits, VIN = 3.7V, IOUT = 0.47μH, COUT = 4.7μF, TA = +25°C, unless otherwise noted.)
REF TRANSIENT RESPONSE
(0.28V TO 1.36V)
ENABLE WAVEFORM (5I LOAD)
MAX77178 toc20
MAX77178 toc19
VEN
VOUT
1.36V
5V/div
0V
2V/div
VREF
0V
VOUT
0.28V
2V/div
0V
2V/div
2V/div
VLX
VLX
0V
0V
VREF = 1.28V
ILX
1A /div
ROUT = 5I
ILX
1A /div
0A
0A
4µs/div
10µs/div
REFIN TRANSIENT RESPONSE
(1.36V TO 0.28V)
LINE TRANSIENT RESPONSE
MAX77178 toc21
VREF
1.36V
MAX77178 toc22
4.2V
4.2V
0.28V
VIN
VOUT
3.2V
2V/div
0V
VLX
2V/div
0V
0A
ILX
VOUT
AC-COUPLED
1A /div
50mV/div
VREF = 0.72V
ROUT = 5I
NO LOAD
4µs/div
20µs/div
LOAD TRANSIENT RESPONSE
LOAD TRANSIENT RESPONSE
MAX77178 toc23a
MAX77178 toc23b
500mA
500mA
IOUT
10mA
IOUT
10mA
10mA
10mA
20mV/div
VOUT
AC-COUPLED
VOUT
AC-COUPLED
20mV/div
VREF = 0.72V
10µs/div
Maxim Integrated
VREF = 1.28V
10µs/div
9
MAX77178/MAX77179
High-Bandwidth LTE/WCDMA PA Power Management ICs
in a 1.75mm x 1.4mm, 0.4mm Pitch WLP
Pin Configuration
TOP VIEW
(BUMPS ON BOTTOM)
1
MAX77178
2
+ AGND
3
EN
AGND
MAX77179
4
1
3
4
EN
AGND
IN3
MODE_SEL
GSNS
FB
LX
BYP
PGND
IN2
IN1
+ REF
IN3
A
2
A
SEL0
GSNS
FB
LX
B
B
SEL1
PGND
IN2
IN1
C
C
WLP
WLP
Pin Description
PIN
NAME
FUNCTION
MAX77178
MAX77179
A1
—
AGND
—
A1
REF
DAC-Controlled Analog Input. It is used to set the PA voltage. Connect REF to a
DAC for PA power control.
A2
A2
EN
Enable Input. Connect EN to IN_ or logic-high for normal operation. Connect EN to
AGND or logic-low for shutdown mode.
A3
A3
AGND
A4
A4
IN3
B1
—
SEL0
—
B1
MODE_SEL
B2
B2
GSNS
B3
B3
FB
Output-Voltage Feedback Input. Connect FB directly to the load, ensuring that no
current is running in FB trace.
B4
B4
LX
Inductor Connection. Connect an inductor from LX to the output of the DC-DC
converter. LX is high impedance during shutdown.
Maxim Integrated
Ground Connection
Low-Noise Analog Ground. Connect AGND to the IN3 decoupling capacitor and
then to PGND.
Analog Supply Voltage Input. Connect IN3 to a battery or supply voltage from 2.5V
to 5.5V. Bypass IN3 to AGND with a 1FF ceramic capacitor as close as possible to
the devices. Connect IN3 to the same source as IN1/IN2.
Output-Voltage Selection Input 0. Connect SEL0 and SEL1 to logic-high or logic-low
to set the step-down converter output voltage to one of four voltage levels. See Table
1. SEL0 is internally connected to AGND through an 800kI pulldown resistor.
Mode Selection Input. MODE_SEL adjusts the FET scaling threshold. MODE_SEL is
internally connected to AGND through an 800kI pulldown resistor.
Ground Sense Node. Connect GSNS to the same ground as the DAC used to control
REF. Alternatively, GSNS can be connected directly to AGND.
10
MAX77178/MAX77179
High-Bandwidth LTE/WCDMA PA Power Management ICs
in a 1.75mm x 1.4mm, 0.4mm Pitch WLP
Pin Description (continued)
PIN
MAX77178
MAX77179
C1
—
NAME
FUNCTION
SEL1
Output-Voltage Selection Input 1. Connect SEL0 and SEL1 to logic-high or logic-low
to set the step-down converter output voltage to one of four voltage levels. See Table
1. SEL1 is internally connected to AGND through an 800kI pulldown resistor.
Bypass Mode Selection Input. When BYP = GND, the IC is set for automatic bypass
mode operation. When BYP = IN, the control circuitry forces the IC into bypass
mode where the high-side FET is turned on continuously with all FET scaling
segments enabled, regardless of the mode of operation. BYP is internally connected
to AGND through an 800kI pulldown resistor.
—
C1
BYP
C2
C2
PGND
C3, C4
IN2,
IN1
C3, C4
Power Ground. Connect PGND and the input/output capacitor grounds through a
star connection to the PCB ground plane.
Power-Supply Voltage Input. Connect IN1/IN2 to a battery or supply voltage from
2.5V to 5.5V. IN1/IN2 powers the internal p-channel and n-channel MOSFETs.
Bypass IN1/IN2 to PGND with a 4.7FF ceramic capacitor as close as possible to the
devices. Connect IN1/IN2 to the same source as IN3.
Detailed Description
The MAX77178/MAX77179 step-down converters are
optimized for dynamically powering the PA in multiband
3G/4G mobile communications. They provide a singledevice PA power-management solution that supports
basic power control for WCDMA and LTE applications.
The devices are high-bandwidth converters designed to
meet the load-transient response requirements for largesignal polar transmitter architectures.
The 2.5V to 5.5V input supply range supports both
current and future battery chemistries. Fast switching
frequency allows the use of small ceramic input and
output capacitors while maintaining low-ripple voltage.
Efficiency is enhanced at light loads by switching to
skip mode where the converter switches only as needed
to service the load when the skip mode is enabled.
Adaptive smart FET scaling further improves efficiency
under all operating conditions.
Shutdown Mode
The MAX77178 provides two logic control inputs (SEL0
and SEL1) to program the DC-DC converter output voltage to one of four options (1.0V, 1.7V, 2.325V, or 2.9V).
This method simplifies system implementation by minimizing changes to the existing baseband software. For
other output voltage options, contact factory.
Connect EN to AGND or logic-low to place the ICs in
shutdown mode. In shutdown, the control circuitry, internal switching MOSFET and synchronous rectifier turn off
and LX becomes high impedance. Connect EN to IN_, or
logic-high for normal operation.
The MAX77179 provides an independent DAC-controlled
analog input (REF) to support power control applications
for WCDMA/LTE. Two other logic control inputs (BYP and
MODE_SEL) select the DAC-controlled input source and
the ICs’ operational modes for multimode applications.
The output voltage range (0.5V to VIN) supports operation with a wide variety of PAs, and allows implementation
of aggressive power-management schemes.
The step-down converters feature skip mode to provide
the highest possible efficiency during light load conditions. Skip mode is only activated when the output voltage is within 12% of the desired regulated value. This
requirement maintains the proper slew-rate operation
of the output voltage, particularly when the REF input
is slewing down. Skip mode occurs when a zero-cross
condition is detected on the inductor current.
Maxim Integrated
SKIP Mode
11
MAX77178/MAX77179
High-Bandwidth LTE/WCDMA PA Power Management ICs
in a 1.75mm x 1.4mm, 0.4mm Pitch WLP
FET Scaling Operation
The ICs include a FET scaling feature to improve efficiency over a wide range of operating conditions. The
size of the power FET is adjusted based on the outputvoltage setting of the DC-DC converter to provide optimal efficiency for different output power conditions. Since
the ICs can drive multiple PAs, the load resistance and
output power operating points can be different. For this
reason, the MODE_SEL pin allows selection between two
different FET scaling transition points.
Output Voltage Control
The MAX77178 has two digital inputs (SEL0 and SEL1) to
set the output voltage to one of four options (1.0V, 1.7V,
2.325V, or 2.9V). See Table 1 for programmable output
voltage settings. Contact factory for alternate output voltage settings.
The MAX77179 uses an analog input (REF) driven by
an external DAC to control the output voltage linearly for
continuous PA power adjustment. See Table 2 for details.
Thermal-Overload Protection
Thermal-overload protection limits total power dissipation in the device. If the junction temperature exceeds
+160°C, the step-down converters turn off, allowing the
ICs to cool. The step-down converters turn on and begin
soft-start after the junction temperature cools by 20°C.
This results in a pulsed output during continuous thermaloverload conditions.
Applications Information
Inductor Selection
The ICs operate with a switching frequency of 8MHz and
uses a 0.47µH inductor. This operating frequency allows
the use of physically small inductors while maintaining
high efficiency. See Table 3 for the recommended inductors. The inductor’s saturation current rating must meet
or exceed the LX current limit. For optimum transient
response and highest efficiency, use inductors with a low
DC resistance.
Capacitor Selection
The input capacitor in a DC-DC converter reduces current peaks drawn from the input power sources and
reduces switching noise in the controller. The impedance
of the input capacitor at the switching frequency needs
to be less than that of the input source so high-frequency
Maxim Integrated
Table 1. MAX77178 Output Voltage
Selection
EN
SEL1
SEL0
OUTPUT VOLTAGE (V)
0
X
X
Off
1
0
0
2.9
1
0
1
2.325
1
1
0
1.0
1
1
1
1.7
X = Don’t care.
Table 2. MAX77179 Mode Selection
EN
MODE_SEL
BYP
0
X
X
MODE
Off
1
0
0
On, MODE_SEL low mode
VOUT = 2.5 O VREF
1
0
1
On, forced bypass mode
1
1
0
On, MODE_SEL high mode
VOUT = 2.5 O VREF
1
1
1
On, forced bypass mode
X = Don’t care.
switching currents do not pass through the input source.
The DC-DC converter output filter capacitors keep output
ripple small and ensure control-loop stability. The output
capacitor must also have low impedance at the switching frequency. Ceramic capacitors are suitable, with
ceramic exhibiting the lowest ESR and high-frequency
impedance. Ceramic capacitors with X5R, X7R, or better
dielectric are recommended for stable operation over the
entire operating temperature range.
The primary objective in power-tracking applications is
to reduce ripple to approximately 1mV using minimum
board space. Note that to minimize space taken, bypassing adjacent to the PA and the power trace between the
device and the PA are relied upon to further reduce ripple.
See the PCB Layout section. Note that since a secondary filter is relied upon to further reduce ripple and since
power tracking often operates at high output voltage,
reducing the ICs’ operating frequency, high value capacitors with lower resonant frequency are recommended.
Table 4 lists the recommended capacitor specification
for power tracking.
12
MAX77178/MAX77179
High-Bandwidth LTE/WCDMA PA Power Management ICs
in a 1.75mm x 1.4mm, 0.4mm Pitch WLP
Table 3. Suggested Inductors
MANUFACTURER
PART NUMBER
INDUCTANCE (µH)
ESR
(mI)
CURRENT
RATING (A)
DIMENSIONS (mm)
2.0 x 1.6 x 0.95
TDK
VLS201610ET-R47N
0.47
54
2.10
Taiyo Yuden
MAKK2016TR50M
0.50
38
3.2
2.0 x 1.6 x 1.0
Coilcraft
XPL 2010-331
0.33
54
2.75
2.0 x 1.6 x 0.95
TDK
VLS201610ET-R33N
0.33
46
2.50
2.0 x 1.6 x 0.95
Table 4. Recommended Capacitor Specification for Power Tracking
COMPONENT
C1
PART NUMBER
PART DESCRIPTION
Not needed
Less bypassing than envelope tracking needed
C2, C3
Taiyo Yuden JMK105BBJ475MV
4.7FF Q20%, 6.3V X5R ceramic capacitor (0402)
C4
Samsung CL03A105MQ3CSNH
1FF Q10%, 6.3V X5R ceramic capacitor (0201)
C5
Not needed
Replaced by bypassing at PA
PCB Layout
Due to fast-switching waveforms and high-current paths,
careful PCB layout is required to achieve optimal performance. Of the current loops present in the ICs, the
IN to PGND current loop has the highest AC current
and dI/dts. The IN bypass capacitor should be placed
as close as possible to the devices. In communication
systems, the PA draws rapid pulses of current that can
cause a significant transient during transmission. The IN
line requires a low-frequency bypassing capacitance.
To avoid high-frequency interference, high-frequency
capacitor must be placed closer to the device than the
low-frequency capacitor. At high frequencies, board
layout is governed more by electromagnetic interactions,
and less by electronic circuit theory. As an example a
constant trace width has less reflection. Use rounded
corners and avoid changes in trace width as much as
possible.
Minimize trace lengths between the ICs and the inductor,
the input capacitor and the output capacitor; keep these
traces short, direct, and wide. The ground connections of
CIN and COUT should be as close together as possible
and connected to PGND. Connect AGND and PGND
directly to the ground plane. Refer to the EV kit for an
example layout. See Figure 1.
One difficult aspect of reducing output voltage ripple is
minimizing ripple components caused by ESR and ESL
of the output capacitor. ESL is often the dominant factor
in the output voltage ripple at 8MHz. A 1.5nH ESL causes
a 12mV output ripple step based on the 0.47FH inductor
Maxim Integrated
to be used. Good layout practice such as placing the
capacitor next to the device, using short and wide traces,
and running traces over the uninterrupted ground plane
can limit parasitic inductance to limit ESL to approximately 0.5nH. Note that above the capacitor’s resonance
frequency, the output filter’s transfer function no longer
rolls off with frequency. To reduce this to acceptable
levels, it might be necessary to parallel smaller value output capacitors to reduce the ESL and reach the desired
value of output capacitance.
It is possible to change the filter topology in an attempt
to reduce switching ripple without having to increase
the switching frequency or decrease the passband of
the output filter. This is done by adding an additional
stage to the output filter, called a secondary filter. In
power-tracking applications, this can be accomplished
by designing the DC-DC converter’s output trace and
choosing the PA’s bypass to act as a filter. For example
a 13mm long, 1mm wide trace over 14mils of FR4 has
approximately 5nH of inductance. If the PA has 1.5FF of
bypass capacitance under operating conditions, the secondary filter formed has a corner frequency of 1.8MHz.
Assuming that the PA’s bypass capacitance has an ESL
of 0.5nH, up to 20dB of output ripple can be removed by
this secondary filter.
Note that the ICs are not designed to respond to feedback with the additional phase shift inserted by the
secondary filter. The FB terminal of the device should be
connected to the output of the primary output filter.
13
MAX77178/MAX77179
High-Bandwidth LTE/WCDMA PA Power Management ICs
in a 1.75mm x 1.4mm, 0.4mm Pitch WLP
VIN1/ VIN2
C1
0.1µF
GND
C2
4.7µF
C5
0.1µF
BYP
MODE
_SEL
REF
PGND1
GSNS
EN
IN2
FB
AGND
IN1
LX
IN3
C3
4.7µF
C4
1µF
VOUT
VIN3
GROUND
L1
0.47µH
Figure 1. MAX77179 Recommended PCB Layout
Maxim Integrated
14
MAX77178/MAX77179
High-Bandwidth LTE/WCDMA PA Power Management ICs
in a 1.75mm x 1.4mm, 0.4mm Pitch WLP
Block Diagrams and Application Circuits
VIN
IN1
C2
4.7µF
IN2
VIN
C4
1µF
IN3
REFERENCE
VOLTAGE
SELECTION
MAX77178
PWM
LOGIC
LX
SEL0
SEL1
PGND
CONTROL
LOGIC
VOLTAGE
SENSE
EN
0.47µH
C1
0.1µF
VOUT
C3
4.7µF
C5
0.1µF
FB
GAIN
CONTROL
AGND
GSNS
VIN
IN1
C2
4.7µF
IN2
REF
VIN
C4
1µF
FILTER
MAX77179
IN3
PWM
LOGIC
LX
MODE_SEL
BYP
PGND
CONTROL
LOGIC
VOLTAGE
SENSE
EN
0.47µH
C3
4.7µF
C1
0.1µF
VOUT
C5
0.1µF
FB
GAIN
CONTROL
AGND
Maxim Integrated
GSNS
15
MAX77178/MAX77179
High-Bandwidth LTE/WCDMA PA Power Management ICs
in a 1.75mm x 1.4mm, 0.4mm Pitch WLP
Package Information
Ordering Information
PART
PINPACKAGE
PACKAGE
CODE
MAX77178EWC+T
12 WLP, 0.4mm pitch
W121A1+1
MAX77179EWC+T
12 WLP, 0.4mm pitch
W121A1+1
All devices operate over the -40°C to +85°C temperature range.
+Denotes a lead(Pb)-free/RoHS compliant package.
T = Tape and reel. These devices have a minimum order
increment of 2500 pieces.
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a
“+”, “#”, or “-” in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but the
drawing pertains to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE
CODE
DOCUMENT
NO.
OUTLINE
NO.
12 WLP,
0.4mm pitch
W121A1+1
21-0449
Refer to
Application
Note 1891
Chip Information
PROCESS: BiCMOS
Maxim Integrated
16
MAX77178/MAX77179
High-Bandwidth LTE/WCDMA PA Power Management ICs
in a 1.75mm x 1.4mm, 0.4mm Pitch WLP
Revision History
REVISION
NUMBER
REVISION
DATE
0
3/13
DESCRIPTION
Initial release
PAGES
CHANGED
—
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent
licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and
max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000
© 2013
Maxim Integrated
17
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
工商网监
湘ICP备2023018690号
