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MAX77839
5.5V Input, 4.4A/3.6A Switching Current 6μA IQ
Buck-Boost Converter
General Description
Benefits and Features
The MAX77839 is a highly-efficient buck-boost regulator
with an industry leading quiescent current of 6μA targeted
for one-cell Li-ion and down to any battery chemistry with
1.8V discharge voltage. It supports input voltages of 1.8V
to 5.5V and an output voltage range of 2.3V to 5.3V. The
IC provides two different switching current limits to optimize external component sizing based on given load current requirements ("A" and "B" = 4.4A (typ), "C" and "D" =
3.6A (typ)), and two different GPIO pin configurations ("A"
and "C" = FPWM pin,"B" and "D" = POK pin). These options provide design flexibility that allow the IC to cover a
wide range of applications and use cases while minimizing
board space.
● Flexible System Integration
• 1.8V to 5.5V Input Voltage Range
• 2.3V to 5.3V Single Resistor Adjustable Output
• 3A Maximum Output Current
• 4.4A ILIM, See TOC 24 ("A" and "B" Options)
• 3.6A ILIM, See TOC 23 ("C" and "D" Options)
• 96% Peak Efficiency (VIN = 3.6V, VOUT = 3.3V)
• Optional GPIO Pin (FPWM Input, POK Output)
The IC features a single-resistor adjustable output voltage
from 2.3V to 5.3V. A configurable GPIO pin allows to select either a FPWM mode control input or a POK open
drain output, depending on the system requirements.
Maxim's unique buck-boost controller technology provides
high efficiency, excellent load and line transient response,
and a seamless transition between buck and boost modes
of operation.
The MAX77839 is available in both a 2.07mm x 1.51mm,
15-bump wafer-level package (WLP), and a 2.5mm x
2.0mm, 11-lead FC2QFN package.
● Low Supply Current that Extends Battery Life
• Skip Mode that Reduces Supply Current at Light
Loads
• 6μA Ultra-Low IQ
● 2.2MHz (typ) Switching Frequency
● Integrated Protections that Provide System
Robustness
• Undervoltage Lockout (UVLO)
• Overvoltage Protection (OVP)
• Cycle-by-Cycle Inductor Peak Current Limit
• Thermal Shutdown (TSHDN)
● Active Output Discharge
● Small Solution Size
• 2.07mm x 1.51mm, 0.4mm Pitch, 15-Bump WLP
• 2.5mm x 2.0mm, 0.5mm Pitch, 11-Pin FC2QFN
Applications
●
●
●
●
●
●
Asset Tracking/Fleet Management
5G/2G/GSM Cellular Power
RF Amplifier
Smartphones ToF/Facial and Gesture Recognition
System Power Pre-Regulation
Single-Cell Li-ion Battery Powered Devices
Ordering Information appears at end of data sheet.
19-100983; Rev 2; 1/22
© 2021 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners.
One Analog Way, Wilmington, MA 01887 U.S.A. | Tel: 781.329.4700 | © 2022 Analog Devices, Inc. All rights reserved.
MAX77839
5.5V Input, 4.4A/3.6A Switching Current 6μA IQ
Buck-Boost Converter
Simplified Block Diagram
L
1μH
CIN 16V
X7R
0805
10μF
ENABLE
CBIAS 10V
X7R
0402
2.2μF
LX2
LX1
1.8V to 5.5V
DC SOURCE
OUT
IN
MAX77839
EN
COUT
10V X7R
0805
47μF
OUTS
VOUT
2.3V-5.3V
FPWM (A & C OPTIONS)
POK (B & D OPTIONS)
GPIO
SEL
BIAS
AGND
PGND
RSEL*
*CHOOSE RSEL VALUE BASED ON VOUT, SEE TABLE 1
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Analog Devices | 2
MAX77839
5.5V Input, 4.4A/3.6A Switching Current 6μA IQ
Buck-Boost Converter
Absolute Maximum Ratings
IN, OUT, LX1, LX2, OUTS, BIAS to PGND, AGND . -0.3V to +6V
PGND to AGND ..................................................... -0.3V to +0.3V
EN, GPIO, SEL to AGND ...........................-0.3V to VBIAS + 0.3V
Continuous Power Dissipation
15 WLP Package (TA = +70°C, derate 16.22mW/°C above
+70°C (Note 1)) ........................................................1297.6mW
11 FC2QFN Package (TA = +70°C, derate 19.12 mW/°C above
+70°C (Note 1)) ........................................................1529.6mW
Note 1: Package thermal resistances were obtained using the method described in JEDEC speficiation JESD51-7, using a four -layer
board. For detailed information on pacakge thermal considerations, refer www.maximintegrated.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the
device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
Recommended Operating Conditions
PARAMETER
Input Voltage
Output Voltage
Output Current Range
Operating Juction Temperature
SYMBOL
CONDITION
VIN
VOUT
IOUT
TJ
For continuous operation at 3A, the junction
temperature (TJ) is limited to +105ºC for the WLP
package. If the junction temperature is higher than
+105ºC, the expected lifetime at 3A continuous
operation is derated. Boost mode operation is also
limited by ILIM.
TYPICAL
RANGE
UNIT
1.8 to 5.5
V
2.3 to 5.3
V
0 to 3
A
-40 to
+125
ºC
Note: These limits are not guaranteed.
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Analog Devices | 3
MAX77839
5.5V Input, 4.4A/3.6A Switching Current 6μA IQ
Buck-Boost Converter
Package Information
WLP
Package Code
W151K2Z+1
Outline Number
21-100441
Land Pattern Number
Refer to Application Note 1891
Thermal Resistance, Four Layer Board:
Junction-to-Ambient (θJA)
61.65C°/W
FC2QFN
Package Code
F112A2F+1
Outline Number
21-100431
Land Pattern Number
90-100154
Thermal Resistance, Four Layer Board:
Junction-to-Ambient (θJA)
52.30C°/W
Junction-to-Case Thermal Resistance (θJC)
0.20C°/W
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages.
Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different
suffix character, but the drawing pertains to the package regardless of RoHS status.
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a
four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/
thermal-tutorial.
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Analog Devices | 4
MAX77839
5.5V Input, 4.4A/3.6A Switching Current 6μA IQ
Buck-Boost Converter
Electrical Characteristics
(TA ≈ TJ = -40°C to +125°C, typical values are at TA ≈ TJ = +25°C, VIN = +3.8V, RSEL = Short to AGND, GPIO = Low (for A, C options),
GPIO = Pull up to VIN with 15kΩ resistor (for B, D options) unless otherwise noted. (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
5.5
V
1.80
V
INPUT VOLTAGE AND SUPPLY CURRENT
Operating Input Voltage
VIN
Input Undervoltage
Lockout (UVLO) Voltage
VUVLO_Rising
Input Undervoltage
Lockout (UVLO)
Hysteresis
1.8
Input rising
1.70
VUVLO_Hys
Shutdown Supply
Current
ISHDN
1.75
70
EN = low, TJ = -40ºC to +85ºC
mV
2
μA
14
μA
IQ
EN = high, FPWM = low, TJ = -40ºC to
+125ºC, no switching
6
IQ_FPWM
EN = high, FPWM = high, TJ = -40ºC to
+125ºC, no switching
3
mA
Turn-On Delay Time
tDLY_ON
From EN high to RSEL reading
100
μs
RSEL Reading Time
tRSEL
Input Quiescent Current
360
450
600
μs
V
BUCK-BOOST CONVERTER
Output Voltage Range
Output Voltage
Accuracy
Switching Frequency
VOUT
VOUT_ACC
See RSEL table
2.3
5.3
FPWM = high, TJ = +25ºC, no load
-1.0
+1.0
FPWM = low, TJ = +25ºC, no load
-1.0
+3.5
fSW
1.936
2.20
2.464
A, B options
4.05
4.4
4.75
C, D options
3.24
3.6
3.96
A, B options
1.75
2.1
2.45
C, D options
1.28
1.6
1.92
%
MHz
High-Side Switching
Current Limit
ILIM
High-Side Switching
Current Limit During
Soft-Start
ILIM_SS
Low-Side Switch On
Resistance
RDSON_LO
LX1, LX2
58
mΩ
High-Side Switch On
Resistance
RDSON_HI
LX1, LX2
50
mΩ
Thermal Shutdown
Threshold
TSHDN
TJ rising
150
ºC
Thermal Shutdown
Hysteresis
TSHDN_HYS
15
ºC
Active Discharge
Resistance
RDSCHG
100
Ω
Line Regulation
ΔVOUT/ΔVIN
VIN = 1.8V to 5.5V, FPWM = high, no
load, VOUT = 3.3V, 5V
Load Regulation
ΔVOUT/ΔIOUT
IOUT = 0A to full load, VIN = 2.3V, 3.8V,
5.5V, VOUT = 3.3V, 3.6V, 5V
Soft-Start Timeout
Overvoltage Protection
Threshold
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tSS
VOVP
VOUT - VOUTS
-0.3
+0.3
A
A
%/V
±0.3
%/A
4
ms
0.5
V
Analog Devices | 5
MAX77839
5.5V Input, 4.4A/3.6A Switching Current 6μA IQ
Buck-Boost Converter
Electrical Characteristics (continued)
(TA ≈ TJ = -40°C to +125°C, typical values are at TA ≈ TJ = +25°C, VIN = +3.8V, RSEL = Short to AGND, GPIO = Low (for A, C options),
GPIO = Pull up to VIN with 15kΩ resistor (for B, D options) unless otherwise noted. (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
0.4
V
DIGITAL LOGIC (EN, GPIO)
Input Logic-Low Level
VIL
Input Logic-High Level
VIH
Internal Pulldown
Resistance
RPD
EN, GPIO (A, C options)
Output Logic-Low Level
VOL
GPIO pin (B, D options), pullup voltage =
3.3V, IOL = 1mA
1.3
V
800
kΩ
0.4
V
Note 2: Limits are 100% production tested at TA ≈ TJ = +25ºC. The MAX77839 is tested under pulsed load conditions such that TA ≈
TJ. Limits over the operating temperature range (TJ = -40ºC to +125ºC) are guaranteed by design and characterization using
statistical process control methods.
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Analog Devices | 6
MAX77839
5.5V Input, 4.4A/3.6A Switching Current 6μA IQ
Buck-Boost Converter
Typical Operating Characteristics
(VIN = 3.8V, VOUT = 3.3V, L = 1μH (Coilcraft XAL4020-102ME), Skip Mode, ILIM_LX = 4.4A, TA = +25°C, unless otherwise noted.)
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Analog Devices | 7
MAX77839
5.5V Input, 4.4A/3.6A Switching Current 6μA IQ
Buck-Boost Converter
Typical Operating Characteristics (continued)
(VIN = 3.8V, VOUT = 3.3V, L = 1μH (Coilcraft XAL4020-102ME), Skip Mode, ILIM_LX = 4.4A, TA = +25°C, unless otherwise noted.)
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Analog Devices | 8
MAX77839
5.5V Input, 4.4A/3.6A Switching Current 6μA IQ
Buck-Boost Converter
Typical Operating Characteristics (continued)
(VIN = 3.8V, VOUT = 3.3V, L = 1μH (Coilcraft XAL4020-102ME), Skip Mode, ILIM_LX = 4.4A, TA = +25°C, unless otherwise noted.)
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Analog Devices | 9
MAX77839
5.5V Input, 4.4A/3.6A Switching Current 6μA IQ
Buck-Boost Converter
Pin Configurations
WLP
TOP VIEW
(BUMP SIDE DOWN)
MAX77839
2
3
4
5
A
OUT
LX2
PGND
LX1
IN
B
EN
LX2
PGND
LX1
IN
C
OUTS
AGND
SEL
GPIO
BIAS
+
1
15-BUMP WLP, 0.4mm PITCH
FC2QFN
TOP VIEW
(LEAD SIDE DOWN)
IN
MAX77839
BIAS
GPIO
LX1
SEL
PGND
AGND
LX2
OUT
EN
OUTS
11-LEAD FC2QFN, 0.5mm PITCH
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Analog Devices | 10
MAX77839
5.5V Input, 4.4A/3.6A Switching Current 6μA IQ
Buck-Boost Converter
Pin Description
PIN
NAME
FUNCTION
TYPE
WLP
FC2QFN
A5, B5
11
IN
Buck-Boost Input. Bypass to PGND with two 16V 10μF X7R
ceramic capacitors.
Analog
C5
10
BIAS
Internal Bias Supply. Bypass to AGND with a 10V 2.2μF X7R
ceramic capacitor. Do not load this pin externally.
Power Output
A4, B4
1
LX1
Input-Side Buck-Boost Switching Node
Power
GPIO pin.
C4
9
GPIO
For A, C options, forced-PWM mode digital input. Apply high for
FPWM mode, apply low for auto skip mode operation.
Digital Input/
Output
For B, D options, POK open drain output. Pull up with 15kΩ
resistor to IO voltage.
A3, B3
2
PGND
Power Ground
Ground
C3
8
SEL
Output Voltage Selection Input. Connect a resistor between this
pin and ground to configure the output voltage. Consult Output
Voltage Configuration for a table of recommended resistors and
corresponding output voltages.
Analog
A2, B2
3
LX2
Output-Side Buck-Boost Switching Node
Power
C2
7
AGND
Analog Ground
Ground
Buck-Boost Power Output. Bypass to PGND with two 16V X7R
10μF ceramic capacitors.
Power
A1
4
OUT
B1
5
EN
C1
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6
OUTS
Buck-Boost Enable Input
Digital Input
Buck-Boost Output Voltage Sense Input. Connect to the output at
the point-of-load.
Analog
Analog Devices | 11
MAX77839
5.5V Input, 4.4A/3.6A Switching Current 6μA IQ
Buck-Boost Converter
Functional Diagrams
Functional Block Diagram
LX1
LX2
CS1
IN
OUT
CS2
UVLO
CS2
ILIM_PEAK
OCP
ACTIVE
DISCHARGE
Softstart
PGND
IN OUT
LOGIC
CONTROL
BIAS
EN
OUTS
SLOPE
COMPENSATION
GPIO
HSCS1/2
OPT A, C
OVP
OPT B, D
COMP
OPT B,D
REF
CS1/CS2
EAMP
REF
TARGET
OUTPUT
SELECTOR
SEL
MAX77839
AGND
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Analog Devices | 12
MAX77839
5.5V Input, 4.4A/3.6A Switching Current 6μA IQ
Buck-Boost Converter
Detailed Description
The MAX77839 is a simple, high-efficiency buck-boost regulator with a wide input voltage range for single cell Li-ion
batteries, two cell AA batteries, LiSOCI2 batteries, or any battery chemistry with a 1.8V discharge voltage. The converter
seamlessly transitions between buck and boost modes of operation. It includes two GPIO options for FPWM enable
(options A and C) or POK open drain output (options B and D). The MAX77839 is also equipped with active output
discharge, selection of two different inductor peak current limits, and various protections to ensure robustness in harsh
operating conditions. The IC is available in WLP and FC2QFN packages.
Startup and Shutdown
Startup
When the EN pin is set to high, the IC turns on the internal bias circuitry, which takes typically 100µs (tON_DLY) to settle.
After the internal bias circuitry is settled, the controller senses the SEL pin resistance to set the reference voltage. The
RSEL reading takes about 450µs (tRSEL). After the IC reads the RSEL value, it begins the soft-start process.
To limit the inrush current during soft-start, the MAX77839 reduces the switching current limit level to about half of the
normal level. Soft-start time ends when the output voltage reaches the target regulation point, and then increases the
switching current limit level to the normal level. After an additional 100μs of transition time, the MAX77839 switches over
to normal switching control (Skip mode). Note that the part switches in FPWM for the entire duration of tSS.
The MAX77839 is equipped with a soft-start time out timer (tSS = 4ms (typ)), and if the output voltage does not reach the
target regulation point (90% of VTARGET), then the MAX77839 latches off and does not start up until EN or VIN is cycled.
EN
VOUT
tDLY_ON
tRSEL
tSS (FPWM)
100µs
ILIM
ILIM_SS
IL
Figure 1. Startup Waveform
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Analog Devices | 13
MAX77839
5.5V Input, 4.4A/3.6A Switching Current 6μA IQ
Buck-Boost Converter
Immediate Shutdown Conditions
The converter stops switching whenever the MAX77839 is disabled by EN control or is latched off by protections. After
the converter stops switching, the MAX77839 turns on the active discharge switch between OUT and PGND to quickly
discharge the output capacitor.
There are also several conditions that cause latch off, regardless of EN state:
●
●
●
●
Thermal shutdown (TSHDN)
Soft-start timeout (TSS)
Continuous ILIM events for about 2ms (typ)
Undervoltage Lockout (UVLO)
The events in this category shutdown the output. The converter can start up again once fault conditions are removed
from the system and VIN or EN is toggled.
Protections
Thermal Shutdown
The device has an internal thermal-protection circuit that monitors die temperature. The buck-boost disables if the die
temperature exceeds TSHDN (+150°C typ). The buck-boost can be enabled again after the die temperature cools by
approximately +15°C.
Undervoltage Lockout
The device supports a UVLO feature that prevents operation in abnormal input voltage conditions when VIN falls below
the VUVLO_Falling threshold. The device enables when both the input voltage VIN rises above the VUVLO_Rising threshold
and EN is pulled high.
Overcurrent Protection
The device features a robust switching current-limit scheme that protects the device and the inductor during overload and
fast transient conditions. The current-sense circuit takes current information from the high-side MOSFETs to determine
the peak-switching current (RDS(ON) x IL).
The IC provides two different cycle-by-cycle current limit levels (3.6A (typ) and 4.4A (typ)) for the high-side MOSFET. If
the switching current hits current limit (ILIM) for about 2ms, the IC shuts off the output. An overcurrent event removed
within 2ms allows the converter to recover and regulate normally.
Toggle the EN pin to reenable the buck-boost converter if it is latched off by an overcurrent event lasting longer than
2ms.
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Analog Devices | 14
MAX77839
5.5V Input, 4.4A/3.6A Switching Current 6μA IQ
Buck-Boost Converter
SHORT
CIRCUIT
VOUT
2ms
ILIM
IL
Figure 2. Short-Circuit Waveform
Overvoltage Protection
The IC detects the voltage difference between OUT and OUTS, and if the voltage difference (OUT - OUTS) exceeds the
OVP threshold voltage level (0.5V typ), then the device turns off all switches. This prevents OUTS = OPEN conditions
from overdriving the output beyond safe operating ranges. Additionally, the device shuts off whenever OUTS detects a
voltage over 20% of the target output value (10% when OUT target set above 5V).
Control Scheme
The MAX77839 utilizes a four-switch H-bridge architecture to realize both buck and boost operating modes. It regulates
the output voltage to a target value at any valid input voltage and provides great response to both line and load transient
events. Fast switching frequency and a unique control algorithm allow for small external components, low output noise,
and high-efficiency across the entire operating range.
The buck-boost converter operates using a 2.2MHz fixed-frequency pulse width modulation (PWM) control scheme with
current-mode compensation. The architecture integrates four FETs operating as switches: an input high-side FET (HS1),
input low-side FET (LS1), output high-side FET (HS2), and output low-side FET (HS2). A proprietary algorithm controls
these switches in four different phases:
● Phase 1 (Φ1): HS1 and LS2 switch on to store energy in the inductor by ramping up inductor current at a rate
dIL
VIN
determined by the input voltage and the inductance: dt = L
● Phase 2 (Φ2): HS1 and HS2 switch on to either charge or discharge the inductor, depending on the difference
between the input and output voltage. In boost mode, VOUT > VIN and the inductor current ramps down. In buck
dIL
VIN − VOUT
mode, VIN > VOUT and the inductor current ramps up: dt =
L
● Phase 3 (Φ3): LS1 and HS2 switch on to discharge the inductor by ramping down inductor current at a rate determined
dIL
− VOUT
by the output voltage and the inductance: dt =
L
● Phase 4 (Φ4): LS1 and LS2 switch on to disconnect the inductor from output and input voltages
Soft-start utilizes Φ1 and Φ3 to ramp the output voltage up.
Boost mode (VIN < VOUT) utilizes Φ1 and Φ2 within a single clock period. See Figure 3 for a graphical representation.
Buck mode (VIN > VOUT) utilizes Φ2 and Φ3 within a single clock period. See Figure 3 for a graphical representation.
Skip mode is initiated by consequent zero crossings of high side (HS2) switching current. In skip mode, device switching
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Analog Devices | 15
MAX77839
5.5V Input, 4.4A/3.6A Switching Current 6μA IQ
Buck-Boost Converter
is controlled by output voltage. The converter increases the target regulation point to VOUT_SKIP_H (about 3%
higher than regulation target), and continues switching to ramp up the output voltage until the output voltage reaches
VOUT_SKIP_H. When the output voltage reaches VOUT_SKIP_H, Φ4 discharges the inductor current until output
voltage drops to VOUT_SKIP_L (about 1% higher than regulation target) level. This cycle continues until the output
voltage does not reach the target level for six switching cycles.
BUCK OPERATION
BUCK-BOOST H-BRIDGE
TOPOLOGY
IN
Ф2
OUT
Ф2
Ф3
HS1
Ф2
CHARGE/DISCHARGE L
TSW
HS2
TSW
CLK
Ф3
DISCHARGE L
CLK
CLK
BOOST OPERATION
L
LS1
Ф3
LS2
Ф1
Ф1
CHARGE L
Ф4 DISCHARGE L
Ф2
Ф1
TSW
CLK
Ф2
TSW
CLK
CLK
Figure 3. Buck-Boost H-Bridge Topology
Output Voltage Configuration
Set the output voltage by connecting a resistor (RSEL) to the SEL pin of the MAX77839. The device uses this resistance
to calculate the target output voltage. Choose a resistor with 1% tolerance or better. Table 1 lists recommended values
for RSEL to achieve different output voltages.
Table 1. RSEL Selection Table
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VOUT (V)
RSEL (kΩ)
3.3
Short (0Ω)
2.3
4.99
2.4
5.90
2.5
7.15
2.6
8.45
2.7
10.0
2.8
11.8
Analog Devices | 16
MAX77839
5.5V Input, 4.4A/3.6A Switching Current 6μA IQ
Buck-Boost Converter
Table 1. RSEL Selection Table (continued)
VOUT (V)
RSEL (kΩ)
2.9
14.0
3.0
16.9
3.1
20.0
3.2
23.7
3.4
28.0
3.5
34.0
3.6
40.2
3.7
47.5
3.8
56.2
3.9
66.5
4.0
80.6
4.1
95.3
4.2
113
4.3
133
4.4
162
4.5
191
4.6
226
4.7
267
4.8
324
4.9
383
5.0
452
5.1
536
5.2
634
5.3
768
2.85
909 or Open
Output Active Discharge
The buck-boost provides an internal 100Ω resistor that switches on for the output active discharge function. The internal
switch provides a path to discharge the energy stored in the output capacitor to PGND whenever the regulator is disabled
by EN or any protections. While the regulator remains enabled, the internal switch is disconnected from the output.
GPIO Pin
The MAX77839 includes two GPIO options which can be either a digital input pin for FPWM enable (A and C options)
or an open drain output for POK signal (B and D options). When FPWM is enabled, the converter operates in PWM
mode regardless of load. If the FPWM enable pin is chosen as the GPIO option, when FPWM is disabled, the converter
operates in auto skip mode and utilizes skip mode when it detects a zero crossing in switching current to reduce switching
losses. Applications that require low output ripple or fast load transients at all conditions should consider the FPWM
option. When the POK output pin is chosen as the GPIO option, the open drain output pin pulls LOW if the output reaches
within ±10% of the target voltage. Applications that require a POK signal for controlling the power-up sequence should
consider the POK option.
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Analog Devices | 17
MAX77839
5.5V Input, 4.4A/3.6A Switching Current 6μA IQ
Buck-Boost Converter
Applications Information
Input Capacitor Selection
Bypass IN with a 10V, X7R, 10μF nominal input capacitor (CIN). Larger values improve decoupling of the buck-boost
regulator and filter the switching noise for the system. The RMS current rating of the input capacitor needs to be higher
1
√
than D(1 − D) × Io2 + 12 (D)dI2 in buck mode, where dI is inductor current ripple, D is the duty cycle, and Io is the load
current. Consider using multiple capacitors in parallel to meet this spec if necessary.
Output Capacitor Selection
The minimum effective capacitance of 4.7μF for the output capacitor is required for small output ripple and ensuring
stable operation of the buck-boost regulator. Determine the expected effective COUT carefully by considering the
capacitor's initial tolerance, variation with temperature, and derating with DC bias voltage. Refer to Tutorial 5527 for more
1
√
information. The RMS current rating of the effective output capacitor needs to be higher than D(1 − D) × Io2 + 12 (D)dI2
in boost mode, where dI is the inductor current ripple, D is the duty cycle, and Io is the load current.
A 10V, 22μF ceramic capacitor is recommended for most applications. Ceramic capacitors with X7R dielectrics are highly
recommended for better effective capacitance, capacitance tolerance over bias voltage and temperature variations.
Inductor Selection
The MAX77839's current sensing circuit and compensation loop is optimized for 1μH inductance. An inductor with a
saturation current that is greater than or equal to the peak current limit setting (ILIM), and an RMS current rating based off
the expected continuous peak inductor current at given max load current is recommended. Lower DCR increases buckboost efficiency. Recall that there are two different ILIM options for the MAX77839. Table 2 lists recommended inductors
for each ILIM option. Note that this table was generated in 2019, and as inductor technology improves rapidly, may not
be the most up-to-date at the time of reading.
Table 2. Recommended Inductors
MANUFACTURER
Cyntec
PART NUMBER
HTEK20161T-1R0MSR
INDUCTANCE
(μH)
DC
RESISTANCE
(mΩ)
SATURATION
CURRENT (A)
RMS CURRENT
FOR 40ºC
TEMPERATURE
RISE (A)
DIMENSIONS
LxWxH
(mm)
1.0
35
4.2
4.1
2.0 x 1.6 x 1.0
C, D
OPTION
Samsung
CIGT252010TM1R0MLE
1.0
21
5.5
5.3
2.5 x 2.0 x 1.0
A, B, C,
D
Cyntec
HTEP25201T-1R0MSR
1.0
18
5.5
5.7
2.5 x 2.0 x 1.0
A, B, C,
D
Cyntec
HTEH25201T-1R0MTR
1.0
21
5.5
5.7
2.5 x 2.0 x 1.0
A, B, C,
D
Coilcraft
XEL4020-102ME
1.0
13.25
9.0
9.6
4.0 x 4.0 x 2.1
A, B, C,
D
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Analog Devices | 18
MAX77839
5.5V Input, 4.4A/3.6A Switching Current 6μA IQ
Buck-Boost Converter
PCB Layout Guidelines
Careful circuit board layout is critical to achieve low switching power losses and clean, stable operation. For the WLP
and FC2QFN package, a high density interconnect (HDI) PCB is not required. Figure 4 shows an example non-HDI
PCB layout for the MAX77839 WLP package, and Figure 5 shows an example non-HDI PCB layout for the MAX77839
FC2QFN package.
When designing the PCB, follow these guidelines:
1. Place the input capacitors CIN and output capacitors COUT immediately next to the IN pin and OUT pin, respectively,
of the IC. The trace between the capacitors' ground pin to the IC PGND pin needs to be routed through the component
mounting layer to minimize trace parasitics. Additionally, the trace for these connections needs to be as short and
wide as possible. Since the IC operates at a high switching frequency, this placement is critical for minimizing parasitic
inductance within the input and output current loops, which can cause high voltage spikes and can damage the
internal switching MOSFETs.
2. Place the inductor next to the LX bumps/pins (as close as possible), route inductor traces through vias, and make
the traces between the LX bumps/pins and the inductor short and wide to minimize PCB trace impedance. Excessive
PCB impedance reduces converter efficiency. When routing LX traces on a separate layer (as in the examples), make
sure to include enough vias to minimize trace impedance. Routing LX traces on multiple layers is recommended to
further reduce trace impedance. Furthermore, do not allow LX traces to take up an excessive amount of area. The
voltage on this node switches very quickly and additional area creates more radiated emissions.
3. Prioritize the low-impedance ground plane of the PCB directly underneath the IC, COUT, CIN, and the inductor.
Cutting this ground plane risks interrupting the switching current loops.
4. AGND must carefully connect to PGND on the PCBs low-impedance ground plane. Connect AGND to the lowimpedance ground plane on the PCB (the same net as PGND) away from any critical loops.
5. The IC requires a supply input (BIAS) which is often the same net as IN. Carefully bypass BIAS to PGND with a
dedicated capacitor (CBIAS) as close as possible to the IC. Route a dedicated trace between CBIAS and the BIAS
bump/pin. Avoid connecting BIAS directly to the nearest IN bumps/pins without dedicated bypassing.
6. Connect the OUTS bump/pin to the regulating point with a dedicated trace away from noisy nets such as LX1 and
LX2.
7. Keep the power traces and load connections short and wide. This is essential for high converter efficiency.
8. Do not neglect ceramic capacitor DC voltage derating. Choose capacitor values and case sizes carefully. See the
Output Capacitor Selection section and refer to Tutorial 5527 for more information.
www.analog.com
Analog Devices | 19
MAX77839
5.5V Input, 4.4A/3.6A Switching Current 6μA IQ
Buck-Boost Converter
GPIO
LEGEND
RSEL
CBIAS
0402
AGND
RSEL
0402
OUT
0806 (2016)
IN
0603
COUT
0603
+
CIN
0603
EN
PGND
L
2016
LX1
LX2
0402
VIAS
COMPONENT SIZES LISTED IN
IMPERIAL (METRIC)
NOTE: PLACE CIN AND COUT CLOSE TO THE IC TO MINIMIZE
PARASITIC INDUCTANCE WITHIN THE LOOP
Figure 4. PCB Layout Example (WLP)
LEGEND
EN
OUTS
RSEL
0402
CBIAS
0402
GPIO
AGND
OUT
0806 (2016)
IN
COUT
0603
+
CIN
0603
0603
0402
VIAS
PGND
LX1
L
2016
COMPONENT SIZES LISTED IN
IMPERIAL (METRIC)
LX2
NOTE: PLACE CIN AND COUT CLOSE TO THE IC TO MINIMIZE
PARASITIC INDUCTANCE WITHIN THE LOOP
Figure 5. PCB Layout Example (FC2QFN)
www.analog.com
Analog Devices | 20
MAX77839
5.5V Input, 4.4A/3.6A Switching Current 6μA IQ
Buck-Boost Converter
Typical Application Circuits
Typical Application Circuit
L
1μH
LX2
LX1
1.8V to 5.5V
DC SOURCE
CIN 16V
X7R
0805
10μF
ENABLE
MAX77839
COUT
10V X7R
0805
47μF
OUTS
EN
FPWM ENABLE
GPIO
SEL
BIAS
CBIAS 10V
X7R
0402
2.2μF
VOUT
2.3V-5.3V
OUT
IN
AGND
RSEL*
PGND
*CHOOSE RSEL VALUE BASED ON VOUT, SEE TABLE 1
Figure 6. Options A and C
L
1μH
CIN 16V
X7R
0805
10μF
ENABLE
CBIAS 10V
X7R
0402
2.2μF
LX2
LX1
1.8V to 5.5V
DC SOURCE
VOUT
2.3V-5.3V
OUT
IN
MAX77839
EN
COUT
10V X7R
0805
47μF
OUTS
VIO
POK
GPIO
SEL
BIAS
AGND
PGND
RSEL*
*CHOOSE RSEL VALUE BASED ON VOUT, SEE TABLE 1
Figure 7. Options B and D
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Analog Devices | 21
MAX77839
5.5V Input, 4.4A/3.6A Switching Current 6μA IQ
Buck-Boost Converter
Ordering Information
PART NUMBER
ILIM OPTION (A)
MAX77839AEWL+T
MAX77839AEFQ+T
MAX77839BEWL+T
FPWM
4.4
POK
MAX77839BEFQ+T
MAX77839CEWL+T
MAX77839CEFQ+T
MAX77839DEWL+T
GPIO FUNCTION
FPWM
3.6
MAX77839DEFQ+T
POK
PIN-PACKAGE
15 WLP
11 FC2QFN
15 WLP
11 FC2QFN
15 WLP
11 FC2QFN
15 WLP
11 FC2QFN
+Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
www.analog.com
Analog Devices | 22
MAX77839
5.5V Input, 4.4A/3.6A Switching Current 6μA IQ
Buck-Boost Converter
Revision History
REVISION
NUMBER
REVISION
DATE
PAGES
CHANGED
0
12/20
Initial release
1
6/21
Updated General Description, Benefits and Features, Absolute Maximum Ratings,
Recommended Operating Conditions, Package Information, Startup and Shutdown,
Protections, Undervoltage Lockout, Overcurrent Protection, Output Active Discharge, GPIO
Pin, Input Capacitor Selection, Output Capacitor Selection, Inductor Selection, PCB Layout
Guidelines, and Typical Application Circuits section, updated TOCs 3, 4, and 5, updated
Ordering Information table
2
1/22
Updated Ordering Information table
DESCRIPTION
—
1, 3, 4, 7,
13, 14,
17–21, 23
22
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is
assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may
result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of
their respective owners.
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Analog Devices | 23
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