MAX690A/MAX692A/
MAX802L/MAX802M/
MAX805L
Microprocessor Supervisory Circuits
General Description
The MAX690A/MAX692A/MAX802L/MAX802M/MAX805L
reduce the complexity and number of components
required for power-supply monitoring and batterycontrol functions in microprocessor (μP) systems. They
significantly improve system reliability and accuracy
compared to separate ICs or discrete components.
These parts provide four functions:
1) A reset output during power-up, power-down, and
brownout conditions.
2) Battery-backup switching for CMOS RAM, CMOS μP,
or other low-power logic.
3) A reset pulse if the optional watchdog timer has not
been toggled within 1.6s.
4) A 1.25V threshold detector for power-fail warning or
low-battery detection, or to monitor a power supply
other than +5V.
The parts differ in their reset-voltage threshold levels and
reset outputs. The MAX690A/MAX802L/MAX805L generate
a reset pulse when the supply voltage drops below 4.65V,
and the MAX692A/MAX802M generate a reset below 4.40V.
The MAX802L/MAX802M guarantee power-fail accuracies
to ±2%. The MAX805L is the same as the MAX690A except
that RESET is provided instead of RESET.
All parts are available in 8-pin DIP and SO packages.
The MAX690A/MAX802L are pin compatible with the
MAX690 and MAX694. The MAX692A/MAX802M are pin
compatible with the MAX692.
Features
●● Precision Supply Voltage Monitor:
4.65V for MAX690A/MAX802L/MAX805L
4.40V for MAX692A/MAX802M
●● Reset Time Delay: 200ms
●● Watchdog Timer: 1.6s Timeout
●● Battery-Backup Power Switching
●● 200μA Quiescent Supply Current
●● 50nA Quiescent Supply Current in BatteryBackup Mode
●● Voltage Monitor for Power-Fail or Low-Battery
Warning
●● Power-Fail Accuracy Guaranteed to ±2%
(MAX802L/M)
●● Guaranteed RESET Assertion to VCC = 1V
●● 8-Pin SO and DIP Packages
Ordering Information
PART
TEMP RANGE
MAX690ACPA
0°C to +70°C
8 Plastic DIP
PIN-PACKAGE
MAX690ACSA
0°C to +70°C
8 SO
MAX690AC/D
0°C to +70°C
Dice*
MAX690AEPA
-40°C to +85°C
8 Plastic DIP
MAX690AESA
-40°C to +85°C
8 SO
MAX690AMJA
-55°C to +125°C
8 CERDIP**
●● Battery-Powered Computers and Controllers
●● Intelligent Instruments
●● Critical μP Power Monitoring
Ordering Information continued at end of data sheet.
*Dice are specified at TA = +25°C
**Contact factory for availability and processing to MIL STD883. Devices in PDIP and SO packages are available in both
leaded and lead(Pb)-free packaging. Specify lead free by
adding the + symbol at the end of the part number when
ordering. Lead free not available for CERDIP package.
Typical Operating Circuit
Pin Configurations
Applications
UNREGULATED
DC
R1
REGULATED +5V
VCC
0.1µF
VCC
PFI
R2
3.6V
LITHIUM
BATTERY
19-4333; Rev 5; 4/15
VBATT
RESET
MAX690A PFO
MAX802L
WDI
GND
TOP VIEW
RESET
µP
NMI
I/O LINE GND
VOUT
BUS
VCC
CMOS
RAM
GND
VOUT
1
VCC
2
GND 3
PFI 4
MAX690A
MAX692A
MAX802L
MAX802M
MAX805L
DIP/SO
( ) ARE FOR MAX805L ONLY.
8
VBATT
7
RESET (RESET)
6
WDI
5
PFO
MAX690A/MAX692A/
MAX802L/MAX802M/
MAX805L
Microprocessor Supervisory Circuits
Absolute Maximum Ratings
Terminal Voltage (with respect to GND)
VCC. ..................................................................-0.3V to +6.0V
VBATT................................................................-0.3V to +6.0V
All Other Inputs (Note 1)........................... -0.3V to (VCC + 0.3V)
Input Current
VCC. ..............................................................................200mA
VBATT..............................................................................50mA
GND.................................................................................20mA
Output Current
VOUT.............................. Short-Circuit Protected for up to 10s
All Other Outputs.............................................................20mA
Rate of Rise, VCC, VBATT...............................................100V/μs
Continuous Power Dissipation
Plastic DIP (derate 9.09mW/°C above +70°C).............727mW
SO (derate 5.88mW/°C above +70°C)........................ 471mW
CERDIP (derate 8.00mW/°C above +70°C).................640mW
Operating Temperature Ranges:
MAX69_AC_ _, MAX80_ _ C_ _.........................0°C to +70°C
MAX69_AE_ _, MAX80_ _ E_ _ .................... -40°C to +85°C
MAX69_AMJA, MAX805LMJA...................... -55°C to +125°C
Storage Temperature Range............................. -65°C to +160°C
Lead Temperature (soldering, 10s)................................. +300°C
Note 1: The input voltage limits on PFI and WDI may be exceeded if the current into these pins is limited to less than 10mA.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Electrical Characteristics
(VCC = 4.75V to 5.5V for MAX690A/MAX802L/MAX805L, VCC = 4.5V to 5.5V for MAX692A/MAX802M, VBATT = 2.8V, TA = TMIN to
TMAX, unless otherwise noted.)
PARAMETER
SYMBOL
Operating Voltage Range,
VCC, VBATT (Note 2)
Supply Current (Excluding IOUT)
ISUPPLY
CONDITIONS
MIN
TYP
MAX
MAX69_AC, MAX802_C
1.0
5.5
MAX805LC
1.1
5.5
MAX69_AE/M, MAX80_ _E
1.2
5.5
MAX69_AC, MAX802_C
200
350
MAX69_AE/M, MAX802_E, MAX805LE/M
200
500
0.05
1.0
ISUPPLY in Battery-Backup
Mode (Excluding IOUT)
VCC = 0V,
VBATT = 2.8V
TA = +25°C
VBATT Standby Current
(Note 3)
5.5V > VCC >
VBATT +0.2V
TA = +25°C
-0.1
0.02
TA = TMIN to TMAX
-1.0
0.02
TA = TMIN to TMAX
5.0
IOUT = 5mA
VCC
- 0.05
VCC
- 0.025
IOUT = 50mA
VCC
- 0. 5
VCC
- 0. 25
VOUT in Battery-Backup Mode
IOUT = 250μA, VCC < VBATT - 0.2V
VBATT
- 0.1
VBATT
- 0.02
Battery Switch Threshold, VCC
to VBATT
VCC < VRT
VOUT Output
Power-up
20
Power-down
-20
Battery Switchover Hysteresis
Reset Threshold
Reset Pulse Width
4.50
4.65
4.75
4.25
4.40
4.50
MAX802L, TA = +25°C, VCC falling
4.55
4.70
MAX802M, TA = +25°C, VCC falling
4.30
4.45
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200
µA
mV
MAX692A, MAX802M
140
µA
mV
40
tRS
µA
V
MAX690A, MAX802L, MAX805L
Reset Threshold Hysteresis
V
V
40
VRT
UNITS
V
mV
280
ms
Maxim Integrated │ 2
MAX690A/MAX692A/
MAX802L/MAX802M/
MAX805L
Microprocessor Supervisory Circuits
Electrical Characteristics (continued)
(VCC = 4.75V to 5.5V for MAX690A/MAX802L/MAX805L, VCC = 4.5V to 5.5V for MAX692A/MAX802M, VBATT = 2.8V, TA = TMIN to
TMAX, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
ISOURCE = 800μA
RESET Output Voltage
ISINK = 3.2mA
0.4
MAX69_AC, MAX802_C, VCC = 1.0V
ISINK = 50μA
0.3
MAX69_AE/M, MAX802_E,
VCC = 1.2V, ISINK = 100μA
0.3
MAX805LC, ISOURCE = 4μA, VCC = 1.1V
MAX805LE/M, ISOURCE = 4μA, VCC = 1.2V
RESET Output Voltage
MAX805L, ISOURCE = 800μA
0.8
0.9
V
VCC - 1.5
MAX805L, ISINK = 3.2mA
Watchdog Timeout
tWD
WDI Pulse Width
tWP
WDI Input Threshold (Note 4)
WDI Input Current
PFI Input Threshold
VCC = 5V
1.60
WDI = 0V
0.8
50
-150
150
-50
1.20
1.25
1.30
MAX802_C/E, VCC = 5V
1.225
1.250
1.275
-25
0.01
25
ISINK = 3.2mA
V
3.5
MAX69_A, MAX805L, VCC = 5V
ISOURCE = 800μA
s
ns
Logic low
Logic high
2.25
50
WDI = VCC
PFI Input Current
PFO Output Voltage
0.4
1.00
VIL = 0.4V, VIH = (0.8) (VCC)
V
µA
V
nA
VCC - 1.5
0.4
V
Note 2: Either VCC or VBATT can go to 0V, if the other is greater than 2.0V.
Note 3: “-” = battery-charging current, “+” = battery-discharging current.
Note 4: WDI is guaranteed to be in an intermediate, non-logic level state if WDI is floating and VCC is in the operating voltage
range. WDI is internally biased to 35% of VCC with an input impedance of 50kΩ.
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Maxim Integrated │ 3
MAX690A/MAX692A/
MAX802L/MAX802M/
MAX805L
Microprocessor Supervisory Circuits
Typical Operating Characteristics
OUTPUT VOLTAGE
vs. LOAD CURRENT
4.90
2.78
VOUT (V)
4.85
SLOPE = 80Ω
RESET
0
10
20
40
30
50
2.70
0
0.4
0.2
0.6
0.8
+5V
VCC
+4V
TA = +25°C
PFO
MAX690A-MAX805L toc06
+5V
PFI
1V/div
RESET
GND
+1.25V
10k
+1.30V
RESET
30pF
PFO
1k
30pF
+1.25V
1V/div
+3V
+1.20V
400ns/div
MAX805L
RESET RESPONSE TIME
MAX690A-MAX805L toc08
+5V
VCC
0V
+4V
VCC
RESET
GND
330pF 10k
+4V
330
pF
1V/div
RESET
1k
+1.3V
+5V
+5V
10k
VCC
VBATT
RESET
GND
30pF
0V
+1.2V
VCC
VCC = +5V
TA = +25°C
PFI
MAX805L RESET OUTPUT VOLTAGE
vs. SUPPLY VOLTAGE
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PFO
400ns/div
MAX690A-MAX805L toc07
+5V
PFO
VCC = +5V
TA = +25°C
PFI
2µs/div
0V
PFI
+0V
0V
0V
500ms/div
POWER-FAIL COMPARATOR
RESPONSE TIME
+5V
VCC
RESET
330pF
0V
1.0
POWER-FAIL COMPARATOR
RESPONSE TIME
MAX690A-MAX805L toc04
VCC
2k
IOUT (mA)
MAX690A
RESET RESPONSE TIME
+5V
VCC
RESET
GND
2.72
IOUT (mA)
RESET
VCC
1V/div
4.75
+5V
0V
2.74
SLOPE = 5Ω
4.80
VCC
+5V
2.76
MAX690A-MAX805L toc05
VOUT (V)
4.95
VCC = 0V
VBATT = +2.8V
TA = +25°C
VBATT = OV
TA = +25°C
1V/div
VCC = +5V
VBATT = +2.8V
TA = +25°C
MAX690A-MAX805L toc03
2.80
MAX690A-MAX805L toc01
5.00
MAX690A RESET OUTPUT VOLTAGE
vs. SUPPLY VOLTAGE
MAX690A-MAX805L toc02
OUTPUT VOLTAGE
vs. LOAD CURRENT
500ms/div
0V
2µs/div
Maxim Integrated │ 4
MAX690A/MAX692A/
MAX802L/MAX802M/
MAX805L
Microprocessor Supervisory Circuits
Pin Description
PIN
MAX690A/MAX692A
MAX802L/MAX802M
MAX805L
NAME
FUNCTION
1
1
VOUT
Supply Output for CMOS RAM. When VCC is above the reset threshold,
VOUT connects to VCC through a P-channel MOSFET switch. When
VCC is below the reset threshold, the higher of VCC or VBATT will be
connected to VOUT.
2
2
VCC
+5V Supply Input
3
3
GND
Ground
4
4
PFI
Power-Fail Comparator Input. When PFI is less than 1.25V, PFO goes
low. Connect PFI to GND or VCC when not used.
5
5
PFO
Power-Fail Output. When PFI is less than 1.25V, PFO goes low;
otherwise PFO stays high.
WDI
Watchdog Input. If WDI remains high or low for 1.6sec, the internal
watchdog timer runs out and reset is triggered. If WDI is left floating
or connected to a high-impedance three-state buffer, the watchdog
feature is disabled. The internal watchdog timer clears whenever reset is
asserted, WDI is three-stated, or WDI sees a rising or falling edge.
6
6
7
7
RESET
Reset Output. Whenever RESET is triggered, it pulses low for 200ms.
It stays low when VCC is below the reset threshold (4.65V in the
MAX690A/MAX802L and 4.4V in the MAX692A/MAX802M) and remains
low for 200ms after VCC rises above the reset threshold. A watchdog
timeout also triggers RESET.
—
—
RESET
Active-High Reset Output is the inverse of RESET. When RESET is
asserted, the RESET output voltage = VCC or VBATT, whichever is
higher.
VBATT
Backup-Battery Input. When VCC falls below the reset threshold, VBATT
will be switched to VOUT if VBATT is 20mV greater than VCC. When VCC
rises to 20mV above VBATT, VOUT will be reconnected to VCC. The
40mV hysteresis prevents repeated switching if VCC falls slowly.
8
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8
Maxim Integrated │ 5
MAX690A/MAX692A/
MAX802L/MAX802M/
MAX805L
Microprocessor Supervisory Circuits
BATTERY-SWITCHOVER
CIRCUITRY
VBATT
VOUT
+5V
VCC
VCC
0V
RESET
GENERATOR
RESET
(RESET)
1.25V
VOUT
0V
+5V
3.0V
tRS
RESET
3.5V
0V
+5V
(RESET)
WATCHDOG
TIMER
WDI
MAX690A
MAX692A
MAX802L
MAX802M
MAX805L
0.8V
PFI
0V
3.0V
+5V
PFO
PFO
0V
1.25V
( ) ARE FOR MAX805L ONLY.
( ) ARE FOR MAX805L ONLY.
VBATT = PFI = 3.0V
IOUT = 0mA
GND
Figure 1. Block Diagram
Figure 2. Timing Diagram
Detailed Description
watchdog timer remains clear. When RESET comes
high, the watchdog resumes timing and must be serviced
within 1.6sec. If WDI is tied high or low, a RESET pulse is
triggered every 1.8s (tWD plus tRS).
Reset Output
A microprocessor’s (μP’s) reset input starts the μP in
a known state. When the μP is in an unknown state,
it should be held in reset. The MAX690A/MAX692A/
MAX802L/MAX802M assert reset during power-up and
prevent code execution errors during power-down or
brownout conditions.
On power-up, once VCC reaches 1V, RESET is
guaranteed to be a logic low. As VCC rises, RESET
remains low. When VCC exceeds the reset threshold,
an internal timer keeps RESET low for a time equal to
the reset pulse width; after this interval, RESET goes
high (Figure 2). If a brownout condition occurs (if VCC
dips below the reset threshold), RESET is triggered.
Each time RESET is triggered, it stays low for the reset
pulse width interval. Any time VCC goes below the reset
threshold, the internal timer restarts the pulse. If a brownout
condition interrupts a previously initiated reset pulse,
the reset pulse continues for another 200ms. On powerdown, once VCC goes below the threshold, RESET is
guaranteed to be logic low until VCC droops below 1V.
RESET is also triggered by a watchdog timeout. If a high
or low is continuously applied to the WDI pin for 1.6sec,
RESET pulses low. As long as RESET is asserted, the
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The MAX805L active-high RESET output is the inverse
of the MAX690A/MAX692A/MAX802L/MAX802M RESET
output, and is guaranteed to be valid with VCC down to
1.1V. Some μPs, such as Intel’s 80C51, require an activehigh reset pulse.
Watchdog Input
The watchdog circuit monitors the μP’s activity. If the μP
does not toggle the watchdog input (WDI) within 1.6sec,
a reset pulse is triggered. The internal 1.6sec timer is
cleared by either a reset pulse or by open circuiting the
WDI input. As long as reset is asserted or the WDI input
is open circuited, the timer remains cleared and does not
count. As soon as reset is released or WDI is driven high
or low, the timer starts counting. It can detect pulses as
short as 50ns.
Power-Fail Comparator
The PFI input is compared to an internal 1.25V reference.
If PFI is less than 1.25V, PFO goes low. The powerfail comparator is intended for use as an undervoltage
detector to signal a failing power supply; it need not be
Maxim Integrated │ 6
MAX690A/MAX692A/
MAX802L/MAX802M/
MAX805L
Microprocessor Supervisory Circuits
VBATT
VCC
SW2
SW1
MAX690A
MAX692A
MAX802L
MAX802M
MAX805L
D2
D3
0.1F
+
RESET
(RESET)
VBATT
TO µP
GND
VOUT
SW1/SW2
SW3/SW4
VCC > Reset Threshold
Open
Closed
VCC < Reset Threshold and
VCC > VBATT
Open
Closed
VCC < Reset Threshold and
VCC < VBATT
Closed
Open
RESET THRESHOLD = 4.65V IN MAX690A/MAX802L/MAX805L.
RESET THRESHOLD = 4.4V IN MAX692A/MAX802M
Figure 3. Backup-Battery Switchover Block Diagram
dedicated to this function though, as it is completely
separate from the rest of the circuitry. The external voltage divider drives PFI to sense the unregulated DC input
to the +5V regulator (see Typical Operating Circuit). The
voltage-divider ratio can be chosen such that the voltage
at PFI falls below 1.25V just before the +5V regulator
drops out. PFO then triggers an interrupt which signals
the μP to prepare for power-down.
To conserve backup-battery power, the power-fail
detector comparator is turned off and PFO is forced low
when VBATT connects to VOUT.
Backup-Battery Switchover
In the event of a brownout or power failure, it may be
necessary to preserve the contents of RAM. With a backup battery installed at VBATT, the devices automatically
switch RAM to backup power when VCC fails.
As long as VCC exceeds the reset threshold, VOUT
connects to VCC through a 5Ω PMOS power switch.
Once VCC falls below the reset threshold, VCC or VBATT
(whichever is higher) switches to VOUT. Unlike the
MAX690/MAX692, the MAX690A/MAX692A/MAX802L/
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TO STATIC RAM
MAX690A
MAX802L
MAX805L
SUBSTRATE
CONDITION
VOUT
VCC
SW4
SW3
D1
+5V
( ) ARE FOR MAX805L ONLY.
Figure 4. Using a SuperCap as a Backup Power Source with a
MAX690A/MAX802L/MAX805L and a +5V ±5% Supply
Table 1. Wiper Position and Attenuation
SIGNAL
STATUS
VCC
Disconnected from VOUT
VOUT
Connected to VBATT through an internal
80Ω PMOS switch
VBATT
Connected to VOUT. Current drawn from
the battery is less than 1μA, as long as
VCC < VBATT - 1V.
PFI
Power-fail comparator is disabled.
PFO
Logic low
RESET
Logic low
RESET
Logic high (MAX805L only)
WDI
Watchdog timer is disabled
MAX802M/MAX805L don’t always connect VBATT to
VOUT when VBATT is greater than VCC. VBATT connects
to VOUT (through an 80Ω switch) only when VCC is below
the reset threshold and VBATT is greater than VCC.
When VCC exceeds the reset threshold, it is connected to
the MAX690A/MAX692A/MAX802L/MAX802M/MAX805L
substrate, regardless of the voltage applied to VBATT
(Figure 3). During this time, the diode (D1) between
VBATT and the substrate will conduct current from VBATT
to VCC if VBATT is 0.6V or greater than VCC.
Maxim Integrated │ 7
MAX690A/MAX692A/
MAX802L/MAX802M/
MAX805L
Microprocessor Supervisory Circuits
+5V
VIN
+5V
VCC
R1
VOUT
VCC
TO STATIC RAM
MAX692A
MAX802M
RESET
VBATT
100kΩ
0.1F
MAX690
MAX692A
MAX802L
MAX802M
MAX805L
PFI
R3
C1*
R2
PFO
TO µP
GND
TO µP
+
GND
*OPTIONAL
+5V
PFO
0V
Figure 5. Using a SuperCap as a Backup Power Source with
the MAX692A/MAX802M and a +5V ±10% Supply
When VBATT connects to VOUT, backup mode is
activated and the internal circuitry is powered from
the battery (Table 1). When VCC is just below VBATT,
the current drawn from VBATT is typically 30μA. When
VCC drops to more than 1V below VBATT, the internal
switchover comparator shuts off and the supply current
falls to less than 1μA.
Applications Information
Using a SuperCap as a Backup Power Source
SuperCaps are capacitors with extremely high
capacitance values, on the order of 0.1F. Figure 4 shows
a SuperCap used as a backup power source. Do not allow
the SuperCap’s voltage to exceed the maximum reset
threshold by more than 0.6V. In Figure 4’s circuit, the
SuperCap rapidly charges to within a diode drop of VCC.
However, after a long time, the diode leakage current
will pull the SuperCap voltage up to VCC. When using a
SuperCap with the MAX690A/MAX802L/MAX805L, VCC
may not exceed 4.75V + 0.6V = 5.35V.
Use the SuperCap circuit of Figure 5 with a MAX692A
or MAX802M and a ±10% supply. This circuit ensures
that the SuperCap only charges to VCC - 0.5V. At the
maximum VCC of 5.5V, the SuperCap charges up to 5.0V,
only 0.5V above the maximum reset threshold—well
within the requisite 0.6V.
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VL
0V
VTRIP = 1.25/
VIH = 1.25/
VL - 1.25
R1
+
(
(
VTRIP
VIN
R2
R2 + R2
VH
(
R2 || R3
R1 + R2 || R3
5 - 1.25
R3
=
(
1.25
R2
Figure 6. Adding Hysteresis to the Power-Fail Comparator
Table 2. Allowable Backup-Battery
Voltages
(see Using a SuperCap as a Backup Power Source
section for use with a SuperCap)
PART NO.
MAXIMUM BACKUP-BATTERY
VOLTAGE (V)
MAX690A/
MAX802L/MAX805L
4.80
MAX692A/
MAX802M
4.55
Allowable Backup Power-Source Batteries
Lithium batteries work very well as backup batteries
due to very low self-discharge rates and high energy
density. Single lithium batteries with open-circuit voltages of 3.0V to 3.6V are ideal. Any battery with an opencircuit voltage less than the minimum reset threshold
plus 0.3V can be connected directly to the VBATT input of
the MAX690A/MAX692A/MAX802L/MAX802M/MAX805L
with no additional circuitry (see the Typical Operating
Circuit). However, batteries with open-circuit voltages
that are greater cannot be used for backup, as current is
sourced into the substrate through the diode (D1 in Figure 3)
when VCC is close to the reset threshold.
Maxim Integrated │ 8
MAX690A/MAX692A/
MAX802L/MAX802M/
MAX805L
Microprocessor Supervisory Circuits
Operation Without a Backup Power Source
If a backup power source is not used, ground VBATT and
connect VOUT to VCC. Since there is no need to switch
over to any backup power source, VOUT does not need
to be switched. A direct connection to VCC eliminates any
voltage drops across the switch which may push VOUT
below VCC.
Replacing the Backup Battery
The backup battery can be removed while VCC remains
valid, without danger of triggering RESET/RESET. As
long as VCC stays above the reset threshold, batterybackup mode cannot be entered. In other switchover ICs
where battery-backup mode is entered whenever VBATT
gets close to VCC, an unconnected VBATT pin accumulates leakage charge and triggers RESET/RESET in error.
Adding Hysteresis to the Power-Fail
Comparator
Hysteresis adds a noise margin to the power-fail
comparator and prevents repeated triggering of PFO
when VIN is close to its trip point. Figure 6 shows how to
+5V
R1
VCC
PFI
R2
MAX690A
MAX692A PFO
MAX802L
MAX802M
MAX805L
add hysteresis to the power-fail comparator. Select the
ratio of R1 and R2 such that PFI sees 1.25V when VIN
falls to its trip point (VTRIP). R3 adds the hysteresis. It will
typically be an order of magnitude greater than R1 or R2
(about 10 times either R1 or R2). The current through R1
and R2 should be at least 1μA to ensure that the 25nA
(max) PFI input current does not shift the trip point. R3
should be larger than 10kΩ so it does not load down the
PFO pin. Capacitor C1 adds additional noise rejection.
Monitoring a Negative Voltage
The power-fail comparator can be used to monitor a
negative supply rail using the circuit of Figure 7. When
the negative rail is good (a negative voltage of large magnitude), PFO is low. When the negative rail is degraded
(a negative voltage of lesser magnitude), PFO goes high.
This circuit’s accuracy is affected by the PFI threshold
tolerance, the VCC line, and the resistors.
Interfacing to μPs with Bidirectional
Reset Pins
μPs with bidirectional reset pins, such as the Motorola
68HC11 series, can contend with the MAX690A/MAX692A/
MAX802L/MAX802M RESET output. If, for example, the
RESET output is driven high and the μP wants to pull it
low, indeterminate logic levels may result. To correct this,
connect a 4.7kΩ resistor between the RESET output and
the μP reset I/O, as in Figure 8. Buffer the RESET output
to other system components.
GND
V+5V
PFO
0V
VTRIP
V-
0V
NOTE: VTRIP IS NEGATIVE
VL - 1.25
R1
+
1.25 - VTRIP
R2
Figure 7. Monitoring a Negative Voltage
www.maximintegrated.com
Maxim Integrated │ 9
MAX690A/MAX692A/
MAX802L/MAX802M/
MAX805L
Microprocessor Supervisory Circuits
BUFFERED RESET TO OTHER SYSTEM COMPONENTS
VCC
MAX690A
MAX692A
MAX802L RESET
MAX802M
GND
VCC
4.7kΩ
RESET
GND
Figure 8. Interfacing to μPs with Bidirectional Reset I/O
www.maximintegrated.com
Maxim Integrated │ 10
MAX690A/MAX692A/
MAX802L/MAX802M/
MAX805L
Microprocessor Supervisory Circuits
μP Supervisory Circuits
Part
Number
MAX690A/692A
Nominal
Reset
Threshold
(V)
4.65/4.40
Minimum
Reset
Pulse
Width
(ms)
140
Nominal
Watchdog
Timeout
Period
(s)
1.6
BackupBattery
Switch
ü
CE Write
Protect
PowerFail
Comparator
ü
MAX691A/693A
4.65/4.40
140/adj.
1.6/adj.
ü
ü/10ns
MAX696
Adj.
35/adj.
1.6/adj.
ü
MAX697
Adj.
35/adj.
1.6/adj.
MAX700
4.65/adj.
200
–
MAX703/704
4.65/4.40
140
–
MAX705/706
4.65/4.40
140
2.63
140
MAX706R/S/T
2.63/2.93/
3.08
MAX707/708
MAX708R/S/T
ü
ManualReset
Input
Watchdog
Output
LowLine
Output
ActiveHigh
Reset
BatteryOn
Output
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
1.6
ü
ü
ü
1.6
ü
ü
ü
140
1.6
ü
ü
ü
4.65/4.40
140
–
ü
ü
ü
2.63/2.93/
3.08
140
–
ü
ü
ü
4.65/4.40/
2.63/2.93/3.08
140
–
4.65
140
1
ü/10ns
ü
ü
ü
ü
ü
MAX792L/M/
R/S/T
4.65/4.40/
2.63/2.93/3.08
140
1
ü/10ns
ü
ü
ü
ü
ü
MAX800L/M
4.60/4.40
140
1.6/adj.
ü
ü/10ns
ü/±2%
ü
ü
ü
MAX802L/M
4.60/4.40
140
1.6
ü
ü/±2%
MAX805L
4.65
140
1.6
ü
ü
MAX813L
4.65
140
1.6
4.65/4.40/
2.63/2.93/3.08
140
1
MAX1232
4.37/4.62
250
0.15/0.60/1.2
MAX1259
–
–
–
MAX706P
MAX709L/M/
R/S/T
MAX791
MAX820L/M/
R/S/T
www.maximintegrated.com
ü
ü
ü
ü/10ns
ü
ü
ü
ü
ü
ü
ü/±2%
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
Maxim Integrated │ 11
MAX690A/MAX692A/
MAX802L/MAX802M/
MAX805L
Microprocessor Supervisory Circuits
Ordering Information (continued)
PART
TEMP RANGE
MAX692ACPA
0°C to +70°C
8 Plastic DIP
MAX692ACSA
0°C to +70°C
8 SO
MAX692AC/D
0°C to +70°C
Dice*
MAX692AEPA
-40°C to +85°C
8 Plastic DIP
MAX692AESA
-40°C to +85°C
8 SO
MAX692AMJA
-55°C to +125°C
8 CERDIP**
MAX802LCPA
0°C to +70°C
8 Plastic DIP
MAX802LCSA
0°C to +70°C
8 SO
MAX802LEPA
-40°C to +85°C
8 Plastic DIP
MAX802LESA
-40°C to +85°C
8 SO
MAX802MCPA
0°C to +70°C
8 Plastic DIP
MAX802MCSA
0°C to +70°C
8 SO
MAX802MEPA
-40°C to +85°C
8 Plastic DIP
MAX802MESA
-40°C to +85°C
8 SO
MAX805LCPA
0°C to +70°C
8 Plastic DIP
MAX805LCSA
0°C to +70°C
8 SO
MAX805LC/D
0°C to +70°C
Dice*
MAX805LEPA
-40°C to +85°C
8 Plastic DIP
MAX805LESA
-40°C to +85°C
8 SO
MAX805LMJA
-55°C to +125°C
8 CERDIP**
PIN-PACKAGE
*Dice are specified at TA = +25°C
**Contact factory for availability and processing to MIL STD883. Devices in PDIP and SO packages are available in both
leaded and lead(Pb)-free packaging. Specify lead free by
adding the + symbol at the end of the part number when
ordering. Lead free not available for CERDIP package.
www.maximintegrated.com
Chip Topography
VCC
VOUT
VBATT
RESET (RESET)
WDI
0.061"
(1.55mm)
GND
PFI
PFO
0.078"
(1.98mm)
( ) ARE FOR MAX805L ONLY.
TRANSISTOR COUNT: 573;
SUBSTRATE MUST BE LEFT UNCONNECTED.
Package Information
For the latest package outline information and land patterns, go
to www.maximintegrated.com/packages. Note that a “+”, “#”,
or “-” in the package code indicates RoHS status only. Package
drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE e
CODE
OUTLINE
NO.
LAND
PATTERN NO.
8 PDIP
P8+1
21-0043
—
8 CDIP
J8+2
21-0045
—
8 SOIC
S8+2
21-0041
90-0096
Maxim Integrated │ 12
MAX690A/MAX692A/
MAX802L/MAX802M/
MAX805L
Microprocessor Supervisory Circuits
Revision History
REVISION
NUMBER
REVISION
DATE
DESCRIPTION
PAGES
CHANGED
5
4/15
No /V OPNs in Ordering Information; deleted Automotive Systems in Applications
Information section; added Package Information and Revision History tables
1, 12, 13
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
© 2015 Maxim Integrated Products, Inc. │ 13
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