OP07D

150 μV Maximum Offset Voltage Op Amp OP07D FEATURES Low offset voltage: 150 μV max Input offset drift: 1.5 μV/°C max Low noise: 0.25 μV p-p High gain CMRR and PSRR: 115 dB min Low supply current: 1.1 mA Wide supply voltage range: ±4 V to ±18 V operation PIN CONFIGURATIONS NULL 1 8 NULL V+ OUT 05867-001 –IN 2 +IN 3 V– 4 OP07D TOP VIEW (Not to Scale) 7 6 5 NC NC = NO CONNECT Figure 1. 8-Lead SOIC_N (R-8), 8-Lead DIP (N-8) APPLICATIONS Medical and industrial instrumentation Sensors and controls Thermocouple RTDs Strain bridges Shunt current measurements Precision filters GENERAL DESCRIPTION The OP07D is a precision, ultralow offset amplifier. It integrates low power (1.1 mA typical), low input bias current (±1 nA maximum), and high CMRR/PSRR (130 dB) in the small DIP package. Operation is fully specified from ±5 V to ±15 V supply. The OP07D provides higher accuracy than industry-standard OP07-type amplifiers due to Analog Devices’ iPolar™ process, which supports enhanced performance in a smaller footprint. These performance enhancements include wider output swing, lower power, and higher CMRR (common-mode rejection ratio) and PSRR (power supply rejection ratio). The OP07D maintains stability of offsets and gain virtually regardless of variations in time or temperature. Excellent linearity and gain accuracy can be maintained at high closed-loop gains. The OP07D is fully specified over the extended industrial temperature range of −40°C to +125°C. The OP07D amplifier is available in 8-lead DIP and the popular 8-lead, narrow SOIC lead-free packages. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved. OP07D TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Pin Configurations ........................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings ............................................................5 Thermal Resistance .......................................................................5 ESD Caution...................................................................................5 Typical Performance Characteristics ..............................................6 Outline Dimensions ....................................................................... 13 Ordering Guide .......................................................................... 14 REVISION HISTORY 12/05—Revision 0: Initial Version Rev. 0 | Page 2 of 16 OP07D SPECIFICATIONS VS = ±5.0 V, TA = 25°C, unless otherwise specified. Table 1. Parameter INPUT CHARACTERISTICS Offset Voltage Symbol VOS 0°C ≤ TA ≤ 70°C −40°C ≤ TA ≤ +125°C Input Bias Current Input Offset Current Input Voltage Range Common-Mode Rejection Ratio Open-Loop Gain Offset Voltage Drift OUTPUT CHARACTERISTICS Output Voltage Swing IB −40°C ≤ TA ≤ +125°C IOS −40°C ≤ TA ≤ +125°C CMRR AVO ΔVOS/ΔT VCM = ±3 V −40°C ≤ TA ≤ +125°C RL = 2 kΩ to ground, VO = ±3 V −40°C ≤ TA ≤ +125°C 0°C ≤ TA ≤ 70°C −40°C ≤ TA ≤ +125°C RL = 10 kΩ to ground −40°C ≤ TA ≤ +125°C RL = 2 kΩ to ground −40°C ≤ TA ≤ +125°C VO = 3.5 V VS = ±4.0 V to ±18.0 V 0°C ≤ TA ≤ 70°C −40°C ≤ TA ≤ +125°C VO = 0 V 0°C ≤ TA ≤ 70°C −40°C ≤ TA ≤ +125°C RL = 10 kΩ 115 115 110 −3.5 120 120 1000 1000 127 10,000 0.5 0.5 ±3.95 ±3.95 ±3.9 ±3.9 ±4.1 ±4 27 15 130 1.8 1.4 0.1 0.2 Test Conditions/Comments Min Typ 40 Max 150 250 350 1 1 1 1 +3.5 Unit μV μV μV nA nA nA nA V dB dB V/mV V/mV μV/°C μV/°C V V V V mA mA dB dB dB mA mA mA V/μs MHz Degrees μV p-p nV/√Hz pA/√Hz VOUT Short-Circuit Current Output Current POWER SUPPLY Power Supply Rejection Ratio ISC IO PSRR Supply Current/Amplifier ISY 1.1 1.25 1.45 1.75 DYNAMIC PERFORMANCE Slew Rate Gain Bandwidth Product Phase Margin NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density SR GBP 0.2 0.6 80 0.28 10 0.074 en p-p en in 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz Rev. 0 | Page 3 of 16 OP07D VS = ±15 V, TA = 25°C, unless otherwise specified. Table 2. Parameter INPUT CHARACTERISTICS Offset Voltage Symbol VOS 0°C ≤ TA ≤ 70°C −40°C ≤ TA ≤ +125°C Input Bias Current Input Offset Current Input Voltage Range Common-Mode Rejection Ratio Open-Loop Gain Offset Voltage Drift OUTPUT CHARACTERISTICS Output Voltage Swing IB −40°C ≤ TA ≤ +125°C IOS −40°C ≤ TA ≤ +125°C CMRR AVO ΔVOS/ΔT VCM = ±13.0 V −40°C ≤ TA ≤ +125°C RL = 2 kΩ to ground, VO = ±11 V −40°C ≤ TA ≤ +125°C 0°C ≤ TA ≤ 70°C −40°C ≤ TA ≤ +125°C RL = 10 kΩ to ground −40°C ≤ TA ≤ +125°C RL = 2 kΩ to ground −40°C ≤ TA ≤ +125°C VO = 13.5 V VS = ±4.0 V to ±18.0 V 0°C ≤ TA ≤ 70°C −40°C ≤ TA ≤ +125°C VO = 0 V 0°C ≤ TA ≤ 70°C −40°C ≤ TA ≤ +125°C RL = 10 kΩ 115 115 110 −13.5 120 120 1000 1000 140 10,000 0.5 0.5 ±13.95 ±13.9 ±13.75 ±13.7 +14 +13.8 30 15 130 2.5 1.5 0.2 0.2 Test Conditions/Comments Min Typ 45 Max 150 250 350 1 1 1 1 +13.5 Unit μV μV μV nA nA nA nA V dB dB V/mV V/mV μV/°C μV/°C V V V V mA mA dB dB dB mA mA mA V/μs MHz Degrees μV p-p nV/√Hz pA/√Hz VOUT Short-Circuit Current Output Current POWER SUPPLY Power Supply Rejection Ratio ISC IO PSRR Supply Current/Amplifier ISY 1.1 1.3 1.55 1.85 DYNAMIC PERFORMANCE Slew Rate Gain Bandwidth Product Phase Margin NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density SR GBP 0.2 0.6 80 0.25 10 0.074 en p-p en in 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz Rev. 0 | Page 4 of 16 OP07D ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Supply Voltage Input Voltage Differential Input Voltage Output Short-Circuit Duration to GND Storage Temperature Range Operating Temperature Range Junction Temperature Range Lead Temperature (Soldering, 10 sec) Rating ±18 V ±V supply ±0.7 V Indefinite −65°C to +150°C −40°C to +125°C −65°C to +150°C +300°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. THERMAL RESISTANCE θJA is specified for worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. Table 4. Package Type 8-Lead DIP (N-8) 8-Lead SOIC (R-8) θJA 103 158 θJC 43 43 Unit °C/W °C/W ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. 0 | Page 5 of 16 OP07D TYPICAL PERFORMANCE CHARACTERISTICS 50 45 40 VS = ±15V 45 40 35 30 25 20 15 10 5 0 –100 –80 –60 –40 –20 0 20 40 60 80 100 05867-003 VS = ±15V NUMBER OF AMPLIFIERS 35 30 25 20 15 10 5 0 NUMBER OF AMPLIFIERS 0 0.15 0.30 0.45 0.60 0.75 0.90 1.05 1.20 VOS (µV) TCVOS (µV/°C) Figure 2. Number of Amplifiers vs. Offset Voltage Figure 5. Number of Amplifiers vs. TCVOS 40 VS = ±5V 35 200 VS = ±15V 150 100 50 NUMBER OF AMPLIFIERS 30 25 20 15 10 5 0 VOS (µV) 0 –50 –100 –150 –200 –50 –100 –80 –60 –40 –20 0 VOS (µV) 20 40 60 80 100 0 50 TEMPERATURE (°C) 100 150 Figure 3. Number of Amplifiers vs. Offset Voltage Figure 6. Offset Voltage vs. Temperature 50 VS = ±5V 40 200 VS = ±5V 150 100 NUMBER OF AMPLIFIERS 30 50 VOS (µV) 0 –50 20 10 –100 –150 0 0.15 0.30 0.45 0.60 0.75 0.90 1.05 05867-047 0 TCVOS (µV/°C) 0 50 TEMPERATURE (°C) 100 150 Figure 4. Number of Amplifiers vs. TCVOS Rev. 0 | Page 6 of 16 Figure 7. Offset Voltage vs. Temperature 05867-006 –200 –50 05867-005 05867-004 05867-048 OP07D 1.6 –13.92 –13.94 1.4 VS = ±15V 1.2 –13.96 –13.98 VS = ±15V RL = 10kΩ ISY (mA) 1.0 VS = ±5V VOL (V) –14.00 –14.02 –14.04 –14.06 0.8 0.6 –14.08 05867-011 05867-013 05867-012 0 50 TEMPERATURE (°C) 100 150 05867-007 0.4 –50 –14.10 –50 0 50 TEMPERATURE (°C) 100 150 Figure 8. Supply Current vs. Temperature Figure 11. Negative Output Voltage Swing vs. Temperature 14.40 VS = ±15V RL = 10kΩ 14.35 –3.98 –4.00 –4.02 VS = ±5V RL = 10kΩ 14.30 –4.04 VOH (V) 14.25 VOL (V) 05867-009 –4.06 –4.08 –4.10 –4.12 14.20 14.15 –4.14 14.10 –50 –4.16 –50 0 50 TEMPERATURE (°C) 100 150 0 50 TEMPERATURE (°C) 100 150 Figure 9. Positive Output Voltage Swing vs. Temperature Figure 12. Negative Output Voltage Swing vs. Temperature 4.45 VS = ±5V RL = 10kΩ 4.40 0 VS = ±15V –0.1 4.35 –0.2 VOH (V) 4.30 IB (nA) –0.3 –0.4 05867-010 4.25 4.20 4.15 –50 0 50 TEMPERATURE (°C) 100 150 –0.5 –50 0 50 TEMPERATURE (°C) 100 150 Figure 10. Positive Output Voltage Swing vs. Temperature Figure 13. Input Bias Current vs. Temperature Rev. 0 | Page 7 of 16 OP07D 0 VS = ±5V –0.05 –0.10 –0.15 –0.20 –0.25 –0.30 –0.35 –0.40 –50 120 –50 140 150 VS = ±4V TO ±18V PSRR (dB) 130 05867-014 IB (nA) 0 50 TEMPERATURE (°C) 100 150 0 50 TEMPERATURE (°C) 100 150 Figure 14. Input Bias Current vs. Temperature Figure 17. PSRR vs. Temperature 146 144 142 140 138 VS = ±15V 40 VS = ±15V 30 CMRR (dB) 134 134 132 130 128 126 124 –50 0 VS = ±5V ISC (mA) VS = ±5V 20 05867-015 50 TEMPERATURE (°C) 100 150 0 50 TEMPERATURE (°C) 100 150 Figure 15. CMRR vs. Temperature Figure 18. Short-Circuit Current vs. Temperature 16000 RL = 2kΩ 14000 VS = ±15V 12000 SUPPLY CURRENT (mA) 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 AVO (V/mV) 10000 8000 VS = ±5V 6000 4000 2000 –50 05867-017 0 50 TEMPERATURE (°C) 100 150 0 10 20 SUPPLY VOLTAGE (V) 30 40 Figure 16. Open-Loop Gain vs. Temperature Figure 19. Supply Current vs. Supply Voltage Rev. 0 | Page 8 of 16 05867-022 05867-020 10 –50 05867-019 OP07D 10 VS = ±15V VOH = +VOUT 50 40 G = +100 CLOSED-LOOP GAIN (dB) VS = ±15V VIN = 28mV RL = ∞ CL = 20pF VSY – VOUT (V) 30 G = +10 1 VOL = –VOUT 20 10 G = +1 0 05867-023 0.1 1 ILOAD (mA) 10 100 1k 10k FREQUENCY (Hz) 100k 1M Figure 20. Output Voltage Swing vs. Load Current Figure 23. Closed-Loop Gain vs. Frequency 10 VS = ±5V 50 G = +100 40 CLOSED-LOOP GAIN (dB) VS = ±5V VIN = 28mV RL = ∞ CL = 20pF VSY – VOUT (V) 30 G = +10 VOL = –VOUT 1 VOH = +VOUT 20 10 G = +1 0 0.1 0.01 ILOAD (mA) 1k 10k FREQUENCY (Hz) 100k 1M Figure 21. Output Voltage Swing vs. Load Current Figure 24. Closed-Loop Gain vs. Frequency 100 80 PHASE 60 40 GAIN 100 30 80 PHASE MARGIN (Degrees) OVERSHOOT (%) 25 VS = ±15V VIN = ±50mV G = +1 –OS +OS 20 60 15 20 GAIN 0 –20 VS = ±15V RL = ∞ CL = 20pF ΦM = 80° 1k 10k 100k 1M FREQUENCY (Hz) 40 10 20 5 05867-025 0 2 4 6 CLOAD (nF) 8 10 12 Figure 22. Open-Loop Gain and Phase vs. Frequency Figure 25. Overshoot vs. Capacitive Load Rev. 0 | Page 9 of 16 05867-028 –40 100 0 10M 0 05867-027 0.1 1 10 100 05867-024 –10 100 05867-026 0.1 0.01 –10 100 OP07D 30 VS = ±5V VIN = ±50mV G = +1 100 –OS +OS VS = ±15V VIN = 28mV RL = ∞ CL = 20pF G = +100 10 25 OVERSHOOT (%) 20 15 ROUT (Ω) G = +10 1 G = +1 10 5 0 2 4 6 CLOAD (nF) 8 10 12 100 1k 10k 100k 1M FREQUENCY (Hz) Figure 26. Overshoot vs. Capacitive Load Figure 29. Output Impedance vs. Frequency 112 110 108 106 104 102 100 98 VS = ±15V 100 VS = ±5V VIN = 28mV RL = ∞ CL = 20pF G = +100 10 CMRR (dB) ROUT (Ω) G = +10 1 G = +1 05867-030 1k 10k FREQUENCY (Hz) 100k 1M 100 1k 10k 100k 1M FREQUENCY (Hz) Figure 27. CMRR vs. Frequency Figure 30. Output Impedance vs. Frequency 100 –PSRR 80 100 VS = ±15V PSRR (dB) 60 VOLTAGE NOISE DENSITY (nV/ Hz) 10 40 +PSRR 20 05867-031 100 1k 10k 100k 1M 1 10 FREQUENCY (Hz) 100 1k FREQUENCY (Hz) Figure 28. PSRR vs. Frequency Figure 31. Voltage Noise Density vs. Frequency Rev. 0 | Page 10 of 16 05867-034 0 10 1 0.1 05867-033 96 100 0.1 10 05867-032 05867-029 0 0.1 10 OP07D 10 VS = ±15V 1 OUTPUT VOLTAGE (1V/DIV) VS = ±5V CL = 1nF G = +1 VIN = 4V p-p in (pA/ Hz) 2 0.1 05867-035 1 10 FREQUENCY (Hz) 100 1k TIME (100µs/DIV) Figure 32. Current Noise Density vs. Frequency Figure 35. Large-Signal Transient 400mV VS = ±5V AND ±15V CL = 1nF G = +1 VIN = 100mV p-p 200mV VIN 0V –200mV OUTPUT VOLTAGE (100mV/DIV) VS = ±15V VIN = 200mV G = –100 RECOVERY = 1µs 2 0V –5V –10V –15V –20V TIME (10µs/DIV) 05867-040 05867-036 VOUT TIME (100µs/DIV) Figure 33. Small-Signal Transient Figure 36. Positive Overload Recovery 400mV 200mV VIN 0V –200mV 15V 2 OUTPUT VOLTAGE (1V/DIV) VS = ±15V CL = 1nF G = +1 VIN = 4V p-p VS = ±15V VIN = 200mV G = –100 RECOVERY = 5µs 10V 5V 0V –5V 05867-038 VOUT TIME (10µs/DIV) TIME (100µs/DIV) Figure 34. Large-Signal Transient Figure 37. Negative Overload Recovery Rev. 0 | Page 11 of 16 05867-041 05867-039 0.01 0.1 OP07D 1200m V 600mV VIN 0V –600mV 0V –2V –4V –6V 05867-045 VS = ±5V VIN = 600mV G = –10 RECOVERY = 2.4µs VS = ±15V VN p-p = 0.24µV VOLTAGE NOISE (0.2µV/DIV) 05867-042 1 VOUT –8V TIME (4µs/DIV) TIME (1s/DIV) Figure 38. Positive Overload Recovery Figure 41. Voltage Noise (0.1 Hz to 10 Hz) 1200m V 600mV 0V –600mV 4V 2V 0V –2V –4V TIME (4µs/DIV) VOUT VIN VS = ±5V VIN = 600mV G = –10 RECOVERY = 5.6µs 20kΩ 1 8 7 5 V+ – INPUT + 05867-043 2 – OP07D 3 OUTPUT + 4 VOS TRIM RANGE IS TYPICALLY ±3.5mV 05867-049 V– Figure 39. Negative Overload Recovery Figure 42. Optional Offset Nulling Circuit VS = ±5V VIN = ±5.7V VIN VOUT 2 TIME (400µs/DIV) Figure 40. No Phase Reversal 05867-044 Rev. 0 | Page 12 of 16 OP07D OUTLINE DIMENSIONS 5.00 (0.1968) 4.80 (0.1890) 8 5 4 4.00 (0.1574) 3.80 (0.1497) 1 6.20 (0.2440) 5.80 (0.2284) 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) 1.75 (0.0688) 1.35 (0.0532) 0.50 (0.0196) × 45° 0.25 (0.0099) 0.51 (0.0201) COPLANARITY SEATING 0.31 (0.0122) 0.10 PLANE 8° 0.25 (0.0098) 0° 1.27 (0.0500) 0.40 (0.0157) 0.17 (0.0067) COMPLIANT TO JEDEC STANDARDS MS-012-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 43. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) 0.400 (10.16) 0.365 (9.27) 0.355 (9.02) 8 1 5 4 0.280 (7.11) 0.250 (6.35) 0.240 (6.10) PIN 1 0.100 (2.54) BSC 0.210 (5.33) MAX 0.150 (3.81) 0.130 (3.30) 0.115 (2.92) 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) 0.070 (1.78) 0.060 (1.52) 0.045 (1.14) 0.060 (1.52) MAX 0.015 (0.38) MIN 0.015 (0.38) GAUGE PLANE SEATING PLANE 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.195 (4.95) 0.130 (3.30) 0.115 (2.92) 0.005 (0.13) MIN 0.430 (10.92) MAX 0.014 (0.36) 0.010 (0.25) 0.008 (0.20) COMPLIANT TO JEDEC STANDARDS MS-001-BA CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS. Figure 44. 8-Lead Plastic Dual In-Line Package [PDIP] (N-8) Dimensions shown in inches and (millimeters) Rev. 0 | Page 13 of 16 OP07D ORDERING GUIDE Model OP07DN OP07DNZ 1 OP07DR OP07DR-REEL OP07DR-REEL7 OP07DRZ1 OP07DRZ-REEL1 OP07DRZ-REEL71 1 Temperature Range −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C Package Description 8-Lead PDIP 8-Lead PDIP 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N Package Option N-8 N-8 R-8 R-8 R-8 R-8 R-8 R-8 Z = Pb-free part. Rev. 0 | Page 14 of 16 OP07D NOTES Rev. 0 | Page 15 of 16 OP07D NOTES Preliminary Technical Data © 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05867–0–12/05(0) Rev. 0 | Page 16 of 16