a
Low Noise, Low Drift
Single-Supply Operational Amplifiers
OP113/OP213/OP413
FEATURES
Single- or Dual-Supply Operation
Low Noise: 4.7 nV/÷Hz @ 1 kHz
Wide Bandwidth: 3.4 MHz
Low Offset Voltage: 100 V
Very Low Drift: 0.2 V/C
Unity Gain Stable
No Phase Reversal
APPLICATIONS
Digital Scales
Multimedia
Strain Gages
Battery-Powered Instrumentation
Temperature Transducer Amplifier
PIN CONNECTIONS
8-Lead Narrow-Body SO
1
NULL
–IN A
8
NC
V+
OP113
+IN A
8-Lead Plastic DIP
NULL
1
8
NC
–IN A
2
7
V+
+IN A
3
6
OUT A
V–
4
5
NULL
OUT A
V–
5
4
NULL
NC = NO CONNECT
OP113
NC = NO CONNECT
8-Lead Narrow-Body SO
8-Lead Plastic DIP
GENERAL DESCRIPTION
The OP113 family of single supply operational amplifiers
features both low noise and drift. It has been designed for
systems with internal calibration. Often these processor-based
systems are capable of calibrating corrections for offset and gain,
but they cannot correct for temperature drifts and noise. Optimized for these parameters, the OP113 family can be used to
take advantage of superior analog performance combined with
digital correction. Many systems using internal calibration operate from unipolar supplies, usually either 5 V or 12 V. The
OP113 family is designed to operate from single supplies from 4 V
to 36 V, and to maintain its low noise and precision performance.
The OP113 family is unity gain stable and has a typical gain
bandwidth product of 3.4 MHz. Slew rate is in excess of 1 V/ms.
Noise density is a very low 4.7 nV/÷Hz, and noise in the 0.1 Hz to
10 Hz band is 120 nV p-p. Input offset voltage is guaranteed
and offset drift is guaranteed to be less than 0.8 mV/∞C. Input
common-mode range includes the negative supply and to within
1 V of the positive supply over the full supply range. Phase reversal
protection is designed into the OP113 family for cases where
input voltage range is exceeded. Output voltage swings also include
the negative supply and go to within 1 V of the positive rail. The
output is capable of sinking and sourcing current throughout
its range and is specified with 600 W loads.
Digital scales and other strain gage applications benefit from the
very low noise and low drift of the OP113 family. Other applications include use as a buffer or amplifier for both A/D and D/A
sigma-delta converters. Often these converters have high resolutions requiring the lowest noise amplifier to utilize their full
potential. Many of these converters operate in either single supply
or low supply voltage systems, and attaining the greater signal
swing possible increases system performance.
OUT A
1
–IN A
8
OP213
+IN A
V+
OUT B
4
5
+IN B
14-Lead Plastic DIP
–IN A
+IN A
1
8
V+
–IN A
2
7
OUT B
+IN A
3
6
–IN B
V–
4
5
+IN B
–IN B
V–
OUT A
OUT A
1
14 OUT D
2
3
V+
4
+IN B
5
–IN B
6
OUT B
7
OP413
OP213
16-Lead Wide-Body SO
OUT A
1
16
OUT D
–IN A
–IN D
13 –IN D
+IN A
+IN D
12 +IN D
V+
11 V–
V–
OP413
+IN C
+IN B
–IN B
–IN C
10 +IN C
OUT B
OUT C
9
–IN C
NC
8
OUT C
8
9
NC
NC = NO CONNECT
The OP113 family is specified for single 5 V and dual ± 15 V
operation over the XIND—extended industrial (–40∞C to +85∞C)
temperature range. They are available in plastic and SOIC
surface mount packages.
REV. E
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002
OP113/OP213/OP413–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS (@ V = 15.0 V, T = 25C unless otherwise noted.
S
Parameter
Symbol
INPUT CHARACTERISTICS
Offset Voltage
VOS
Input Bias Current
IB
Input Offset Current
IOS
Input Voltage Range
Common-Mode Rejection
VCM
CMR
Large Signal Voltage Gain
Long-Term Offset Voltage1
Offset Voltage Drift2
VOH
Output Voltage Swing Low
VOL
Short Circuit Limit
ISC
POWER SUPPLY
Power Supply Rejection Ratio PSRR
Supply Voltage Range
ISY
VS
AUDIO PERFORMANCE
THD + Noise
Voltage Noise Density
en
Current Noise Density
Voltage Noise
in
en p-p
DYNAMIC PERFORMANCE
Slew Rate
SR
Gain Bandwidth Product
GBP
Channel Separation
Settling Time
Conditions
Min
OP113
–40∞C £ TA £ +85∞C
OP213
–40∞C £ TA £ +85∞C
OP413
–40∞C £ TA £ +85∞C
VCM = 0 V,
–40∞C £ TA £ +85∞C
VCM = 0 V
–40∞C £ TA £ +85∞C
–15 V £ VCM £ +14 V
–15 V £ VCM £ +14 V,
–40∞C £ TA £ +85∞C
AVO
OP113, OP213,
RL = 600 W,
–40∞C £ TA £ +85∞C
OP413, RL = 1 kW,
–40∞C £ TA £ +85∞C
RL = 2 kW,
–40∞C £ TA £ +85∞C
VOS
Note 1
DVOS/DT Note 2
OUTPUT
CHARACTERISTICS
Output Voltage Swing High
Supply Current/Amplifier
A
tS
RL = 2 kW
RL = 2 kW,
–40∞C £ TA £ +85∞C
RL = 2 kW
RL = 2 kW,
–40∞C £ TA £ +85∞C
VS = ± 2 V to ± 18 V
VS = ± 2 V to ± 18 V
–40∞C £ TA £ +85∞C
VOUT = 0 V, RL = •,
VS = ± 18 V
–40∞C £ TA £ +85∞C
240
F Grade
Typ Max
75
125
100
150
125
175
600
700
50
+14
Unit
150
225
250
325
275
350
600
700
mV
mV
mV
mV
mV
mV
nA
nA
50
+14
nA
V
dB
116
–15
96
97
116
94
dB
1
2.4
1
V/mV
1
2.4
1
V/mV
2
8
0.2
2
150
0.8
14
300
1.5
14
13.9
13.9
± 40
–14.5
V/mV
mV
mV/∞C
V
V
–14.5 V
–14.5
± 40
–14.5 V
mA
103
120
100
dB
100
120
97
dB
3
3.8
± 18
4
1.2
3.4
3
3.8
± 18
4
0.0009
9
4.7
0.4
120
0.8
VOUT = 10 V p-p
RL = 2 kW, f = 1 kHz
to 0.01%, 0 V to 10 V Step
Min
–15
100
VIN = 3 V rms, RL = 2 kW
f = 1 kHz,
f = 10 Hz
f = 1 kHz
f = 1 kHz
0.1 Hz to 10 Hz
RL = 2 kW
E Grade
Typ
Max
0.8
105
9
mA
mA
V
0.0009
9
4.7
0.4
120
%
nV/÷Hz
nV/÷Hz
pA/÷Hz
nV p-p
1.2
3.4
V/ms
MHz
105
9
dB
ms
NOTES
1
Long-term offset voltage is guaranteed by a 1000 hour life test performed on three independent lots at 125 ∞C, with an LTPD of 1.3.
2
Guaranteed specifications, based on characterization data.
Specifications subject to change without notice.
–2–
REV. E
OP113/OP213/OP413
ELECTRICAL CHARACTERISTICS (@ V = 5.0 V, T = 25C unless otherwise noted.)
S
Parameter
Symbol
INPUT CHARACTERISTICS
Offset Voltage
VOS
Input Bias Current
IB
Input Offset Current
IOS
Input Voltage Range
Common-Mode Rejection
VCM
CMR
Large Signal Voltage Gain
AVO
Long-Term Offset Voltage1
Offset Voltage Drift2
OUTPUT
CHARACTERISTICS
Output Voltage Swing High
Output Voltage Swing Low
Short Circuit Limit
POWER SUPPLY
Supply Current
AUDIO PERFORMANCE
THD + Noise
Voltage Noise Density
Current Noise Density
Voltage Noise
VOS
DVOS/DT
VOH
VOL
ISC
ISY
ISY
en
in
en p-p
DYNAMIC PERFORMANCE
Slew Rate
SR
Gain Bandwidth Product
GBP
Settling Time
tS
A
Conditions
Min
OP113
–40∞C £ TA £ +85∞C
OP213
–40∞C £ TA £ +85∞C
OP413
–40∞C £ TA £ +85∞C
VCM = 0 V, VOUT = 2
–40∞C £ TA £ +85∞C
VCM = 0 V, VOUT = 2
–40∞C £ TA £ +85∞C
0 V £ VCM £ 4 V
0 V £ VCM £ 4 V,
–40∞C £ TA £ +85∞C
OP113, OP213,
RL = 600 W, 2 kW
0.01 V £ VOUT £ 3.9 V
OP413, RL = 600, 2 kW,
0.01 V £ VOUT £ 3.9 V
Note 1
Note 2
RL = 600 kW
RL = 100 kW,
–40∞C £ TA £ +85∞C
RL = 600 W,
–40∞C £ TA £ +85∞C
RL = 600 W,
–40∞C £ TA £ +85∞C
RL = 100 kW,
–40∞C £ TA £ +85∞C
E Grade
Typ Max
mV
mV
mV
mV
mV
mV
nA
nA
50
+4
50
+4
90
nA
V
dB
90
87
dB
2
2
V/mV
300
0
93
106
1
1
0.2
200
1.0
350
1.5
4.0
4.1
V
V
3.9
3.9
V
8
–3–
mV
8
8
mV
± 30
± 30
mA
0.001
9
4.7
0.45
120
0.6
8
0.9
3.5
5.8
2.7
3.0
2.7
3.0
mA
mA
0.001
9
4.7
0.45
120
%
nV/÷Hz
nV/÷Hz
pA/÷Hz
nV p-p
3.5
5.8
V/ms
MHz
ms
0.6
NOTES
1
Long-term offset voltage is guaranteed by a 1000 hour life test performed on three independent lots at 125 ∞C, with an LTPD of 1.3.
2
Guaranteed specifications, based on characterization data.
REV. E
V/mV
mV
mV/∞C
4.0
4.1
VOUT = 0 dBu, f = 1 kHz
f = 10 Hz
f = 1 kHz
f = 1 kHz
0.1 Hz to 10 Hz
Specifications subject to change without notice.
Unit
175
250
300
375
325
400
650
750
1.6
to 0.01%, 2 V Step
F Grade
Typ Max
125
175
150
225
175
250
650
750
VOUT = 2.0 V, No Load
–40∞C £ TA £ +85∞C
RL = 2 kW
Min
OP113/OP213/OP413
ABSOLUTE MAXIMUM RATINGS 1
ORDERING GUIDE
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . ± 10 V
Output Short-Circuit Duration to GND . . . . . . . . . Indefinite
Storage Temperature Range
P, S Packages . . . . . . . . . . . . . . . . . . . . . . –65∞C to +150∞C
Operating Temperature Range
OP113/OP213/OP413E, F . . . . . . . . . . . . . –40∞C to +85∞C
Junction Temperature Range
P, S Packages . . . . . . . . . . . . . . . . . . . . . . –65∞C to +150∞C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . 300∞C
Package Type
JA2
JC
Unit
8-Lead Plastic DIP (P)
8-Lead SOIC (S)
14-Lead Plastic DIP (P)
16-Lead SOIC (S)
103
158
83
92
43
43
39
27
∞C/W
∞C/W
∞C/W
∞C/W
Model
Temperature
Range
Package
Description
Package
Options
OP113ES
OP113FP*
OP113FS
OP213EP*
OP213ES
OP213FP
OP213FS
OP413ES
OP413FP*
OP413FS
–40∞C to +85∞C
–40∞C to +85∞C
–40∞C to +85∞C
–40∞C to +85∞C
–40∞C to +85∞C
–40∞C to +85∞C
–40∞C to +85∞C
–40∞C to +85∞C
–40∞C to +85∞C
–40∞C to +85∞C
8-Lead SOIC
8-Lead Plastic DIP
8-Lead SOIC
8-Lead Plastic DIP
8-Lead SOIC
8-Lead Plastic DIP
8-Lead SOIC
16-Lead Wide SOIC
14-Lead Plastic DIP
16-Lead Wide SOIC
SO-8
N-8
SO-8
N-8
SO-8
N-8
SO-8
R-16
N-14
R-16
*Not for new designs; obsolete April 2002.
NOTES
1
Absolute maximum ratings apply to both DICE and packaged parts, unless
otherwise noted.
2
qJA is specified for the worst-case conditions, i.e., qJA is specified for device in
socket for cerdip, P-DIP, and LCC packages; qJA is specified for device soldered in circuit board for SOIC package.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the OP113/OP213/OP413 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions
are recommended to avoid performance degradation or loss of functionality.
–4–
WARNING!
ESD SENSITIVE DEVICE
REV. E
Typical Performance Characteristics–OP113/OP213/OP413
100
80
150
VS = 15V
TA = 25C
400 OP AMPS
PLASTIC PKG
VS = 15V
–40C TA +85C
400 OP AMPS
PLASTIC PKG
120
60
UNITS
UNITS
90
40
60
20
30
0
–50
–40
–30 –20 –10
0
10
20
30
INPUT OFFSET VOLTAGE, VOS – V
40
0
50
TPC 1a. OP113 Input Offset (VOS) Distribution
@ ± 15 V
0
0.1
0.2
0.3
0.4
0.5
0.6
TCVOS – V
0.7
0.8
0.9
1.0
TPC 2a. OP113 Temperature Drift (TCVOS)
Distribution @ ± 15 V
500
500
VS = 15V
TA = 25C
896 (PLASTIC) OP AMPS
400
VS = 15V
–40C TA +85C
896 (PLASTIC) OP AMPS
400
300
UNITS
UNITS
300
200
200
100
100
0
–100
–80
–60
–40
–20
0
20
40
60
80
0
100
0
0.1
0.2
0.3
INPUT OFFSET VOLTAGE, VOS – V
TPC 1b. OP213 Input Offset (VOS) Distribution
@ ± 15 V
0.7
0.8
0.9
1.0
TPC 2b. OP213 Temperature Drift (TCVOS)
Distribution @ ± 15 V
500
400
0.4
0.5
0.6
TCVOS – V
600
VS = 15V
TA = 25C
1220 OP AMPS
PLASTIC PKG
VS = 15V
–40C TA +85C
1220 OP AMPS
PLASTIC PKG
500
400
UNITS
UNITS
300
300
200
200
100
0
–60
100
0
–40
–20
0
20
40
60
80
100
INPUT OFFSET VOLTAGE, VOS – V
120
0
140
TPC 1c. OP413 Input Offset (VOS) Distribution
@ ± 15 V
REV. E
0.1
0.2
0.3
0.4
0.5
0.6
TCVOS – V
0.7
0.8
0.9
TPC 2c. OP413 Temperature Drift (TCVOS)
Distribution @ ± 15 V
–5–
1.0
OP113/OP213/OP413
800
400
INPUT BIAS CURRENT – nA
500
INPUT BIAS CURRENT – nA
1000
VCM = 0V
600
VS = 5.0V
VCM = 2.5V
400
VS = 15V
VCM = 0V
200
0
–75
–50
–25
0
25
50
TEMPERATURE – C
75
100
0
–75
15.0
3.5
0.5
–SWING
RL = 600
–50
–25
0
25
50
TEMPERATURE – C
75
POSITIVE OUTPUT SWING – Volts
1.0
NEGATIVE OUTPUT SWING – mV
POSITIVE OUTPUT SWING – Volts
+SWING
RL = 2k
–SWING
RL = 2k
125
VS = 15V
+SWING
RL = 2k
13.5
+SWING
RL = 600
13.0
12.5
–SWING
RL = 2k
–13.5
–SWING
RL = 600
–14.0
100
–15.0
–75
–50
–25
0
25
50
TEMPERATURE – C
75
100
125
TPC 7. Output Swing vs. Temperature and RL @ ±15 V
20
VS = 15V
TA = 25C
VS = 5.0V
VO = 3.9V
18
20
16
OPEN-LOOP GAIN – V/V
CHANNEL SEPARATION – dB
100
14.0
60
0
–20
–40
–60
–80
–100
RL = 2k
14
12
10
8
RL = 600
6
4
105
–120
10
75
–14.5
0
125
TPC 4. Output Swing vs. Temperature and RL @ 5 V
40
25
50
0
TEMPERATURE – C
–25
14.5
1.5
4.5
–50
TPC 6. OP213 Input Bias Current vs. Temperature
VS = 5.0V
3.0
–75
200
125
2.0
5.0
+SWING
RL = 600
VS = 15V
100
TPC 3. OP113 Input Bias Current vs. Temperature
4.0
VS = 5.0V
300
2
100
1k
10k
100k
FREQUENCY – Hz
1M
0
–75
10M
TPC 5. Channel Separation
–50
–25
25
50
0
TEMPERATURE – C
75
100
125
TPC 8. Open-Loop Gain vs. Temperature @ 5 V
–6–
REV. E
OP113/OP213/OP413
12.5
10
VS = 15V
VD = 10V
RL = 2k
10.0
8
OPEN LOOP GAIN – V/V
OPEN-LOOP GAIN – V/V
VS = 15V
VO = 10V
9
7.5
RL = 1k
5.0
RL = 600
2.5
RL = 2k
7
6
5
4
3
RL = 600
2
1
–25
–50
0
25
50
TEMPERATURE – C
75
100
0
–75
125
TPC 9. OP413 Open-Loop Gain vs. Temperature
90
PHASE
m = 57
20
0
–20
1k
10k
100k
FREQUENCY – Hz
1M
135
OPEN-LOOP GAIN – dB
45
PHASE – Degrees
OPEN-LOOP GAIN – dB
100
125
0
80
0
40
60
45
GAIN
90
40
PHASE
m = 72
20
180
0
225
–20
135
180
225
1k
10M
10k
100k
FREQUENCY – Hz
1M
10M
TPC 13. Open-Loop Gain, Phase vs. Frequency @ ± 15 V
TPC 10. Open-Loop Gain, Phase vs. Frequency @ 5 V
50
50
V+ = 5V
V– = 0V
TA = 25C
40
AV = 100
TA= 25C
VS = 15V
40
AV = 100
CLOSED-LOOP GAIN – dB
CLOSED-LOOP GAIN – dB
75
TA= 25C
VS = 15V
GAIN
30
20
AV = 10
10
0
AV = 1
–10
30
20
AV = 10
10
0
AV = 1
–10
10k
100k
FREQUENCY – Hz
1M
–20
1k
10M
10k
100k
FREQUENCY – Hz
1M
10M
TPC 14. Closed-Loop Gain vs. Frequency @ ± 15 V
TPC 11. Closed-Loop Gain vs. Frequency @ 5 V
REV. E
25
50
0
TEMPERATURE – C
100
V+ = 5V
V– = 0V
TA = 25C
60
–20
1k
–25
TPC 12. OP213 Open-Loop Gain vs. Temperature
100
80
–50
PHASE – Degrees
0
–75
–7–
OP113/OP213/OP413
70
5
60
3
m
55
2
–50
–25
0
25
50
TEMPERATURE – C
75
100
1
125
GBW
m
60
3
55
2
–50
–25
0
25
50
TEMPERATURE – C
75
100
1
125
3.0
TA = 25C
VS = 15V
CURRENT NOISE DENSITY – pA/ Hz
TA = 25C
VS = 15V
25
20
15
10
5
0
4
TPC 18. Gain Bandwidth Product and Phase Margin vs.
Temperature @ ± 15 V
30
VOLTAGE NOISE DENSITY – nV/ Hz
65
50
–75
TPC 15. Gain Bandwidth Product and Phase Margin vs.
Temperature @ 5 V
1
10
100
FREQUENCY – Hz
2.0
1.5
1.0
0.5
1
10
100
FREQUENCY – Hz
1k
TPC 19. Current Noise Density vs. Frequency
140
140
TA= 25C
VS = 15V
COMMON-MODE REJECTION – dB
V+ = 5V
V– = 0V
TA = 25C
120
100
80
60
40
20
0
100
2.5
0
1k
TPC 16. Voltage Noise Density vs. Frequency
COMMON-MODE REJECTION – dB
5
GAIN-BANDWIDTH PRODUCT – MHz
GBW
PHASE MARGIN – Degrees
4
GAIN-BANDWIDTH PRODUCT – MHz
PHASE MARGIN – Degrees
65
50
–75
70
VS = 15V
V+ = 5V
V– = 0V
1k
10k
FREQUENCY – Hz
100k
120
100
80
60
40
20
0
100
1M
1k
10k
FREQUENCY – Hz
100k
1M
TPC 20. Common-Mode Rejection vs. Frequency @ ± 15 V
TPC 17. Common-Mode Rejection vs. Frequency @ 5 V
–8–
REV. E
OP113/OP213/OP413
40
TA = 25C
VS = 15V
120
TA = 25C
VS = 15V
30
100
+PSRR
IMPEDANCE –
POWER SUPPLY REJECTION – dB
140
80
60
–PSRR
AV = 100
40
10
AV = 10
20
AV = 1
0
100
1k
10k
FREQUENCY – Hz
100k
0
100
1M
100k
1M
30
VS = 5V
RL = 2k
TA = 25C
AVCL = 1
5
MAXIMUM OUTPUT SWING – Volts
MAXIMUM OUTPUT SWING – Volts
10k
TPC 24. Closed-Loop Output Impedance vs. Frequency
@ ± 15 V
6
4
3
2
1
0
1k
10k
100k
FREQUENCY – Hz
1M
VS = 15V
RL = 2k
TA = 25C
AVOL = 1
25
20
15
10
5
0
1k
10M
TPC 22. Maximum Output Swing vs. Frequency @ 5 V
10k
100k
FREQUENCY – Hz
1M
10M
TPC 25. Maximum Output Swing vs. Frequency @ ± 15 V
50
20
VS = 5V
RL = 2k
VIN = 100mV p-p
TA = 25C
AVCL = 1
40
35
16
14
30
NEGATIVE
EDGE
25
20
POSITIVE
EDGE
15
8
6
4
2
100
200
300
LOAD CAPACITANCE – pF
400
NEGATIVE
EDGE
10
5
0
POSITIVE
EDGE
12
10
0
VS = 15V
RL = 2k
VIN = 100mV p-p
TA = 25C
AVCL = 1
18
OVERSHOOT – %
45
OVERSHOOT – %
1k
FREQUENCY – Hz
TPC 21. Power Supply Rejection vs. Frequency @ ± 15 V
0
500
0
TPC 23. Small Signal Overshoot vs. Load
Capacitance @ 5 V
REV. E
20
100
200
300
LOAD CAPACITANCE – pF
400
TPC 26. Small Signal Overshoot vs. Load
Capacitance @ ± 15 V
–9–
500
OP113/OP213/OP413
2.0
2.0
VS = 5, 0
0.5V VOUT
VS = 15V
VOUT = 10V
4.0V
1.5
SLEW RATE – V/s
SLEW RATE – V/s
1.5
+SLEW RATE
+SLEW RATE
1.0
–SLEW RATE
0.5
–SLEW RATE
1.0
0.5
0
–75
–50
–25
0
25
50
TEMPERATURE – C
75
100
0
–75
125
–50
–25
0
25
50
TEMPERATURE – C
75
100
125
TPC 30. Slew Rate vs. Temperature @ ± 15 V
(–10 V £ VOUT £ +10.0 V)
TPC 27. Slew Rate vs. Temperature @ 5 V
(0.5 V VOUT 4.0 V)
1s
1s
100
100
90
90
10
10
0%
0%
20mV
20mV
TPC 28. Input Voltage Noise @ ± 15 V (20 nV/div)
TPC 31. Input Voltage Noise @ 5 V (20 nV/div)
5
SUPPLY CURRENT – mA
4
909
100
0.1Hz–10Hz
AV = 1000
AV = 100
tOUT
VS = 18V
VS = 15V
3
VS = 5.0V
2
1
0
–75
–50
–25
25
50
0
TEMPERATURE – C
75
100
125
TPC 32. Supply Current vs. Temperature
TPC 29. Noise Test Diagram
–10–
REV. E
OP113/OP213/OP413
APPLICATIONS
The OP113, OP213, and OP413 form a new family of high
performance amplifiers that feature precision performance in
standard dual supply configurations and, more importantly,
maintain precision performance when a single power supply is
used. In addition to accurate dc specifications, it is the lowest
noise single supply amplifier available with only 4.7 nV/÷Hz
typical noise density.
range may be somewhat excessive. Reducing the trimming
potentiometer to a 2 kW value will give a more reasonable range
of ± 400 mV.
+15V
2N2219A
The OP113 family has a new patented output stage that allows
the output to swing closer to ground, or the negative supply,
than previous bipolar output stages. Previous op amps had
outputs that could swing to within about ten millivolts of the
negative supply in single supply applications. However, the
OP113 family combines both a bipolar and a CMOS device in
the output stage, enabling it to swing to within a few hundred
microvolts of ground.
When operating with reduced supply voltages, the input range is
also reduced. This reduction in signal range results in reduced
signal-to-noise ratio, for any given amplifier. There are only two
ways to improve this: increase the signal range or reduce the
noise. The OP113 family addresses both of these parameters.
Input signal range is from the negative supply to within one
volt of the positive supply over the full supply range. Competitive parts have input ranges that are a half a volt to five
volts less than this. Noise has also been optimized in the OP113
family. At 4.7 nV/÷Hz, it is less than one fourth that of competitive devices.
Phase Reversal
The OP113 family is protected against phase reversal as long
as both of the inputs are within the supply ranges. However, if
there is a possibility of either input going below the negative
supply (or ground in the single supply case), the inputs should
be protected with a series resistor to limit input current to 2 mA.
100mV
F.S.
14
15
3
2
AD588BD
8
9
10
4
6
11 12
13
7
10F
R3
17.2k
0.1%
350
LOAD
CELL
16
1
+10.000V
R4
500
CMRR TRIM
10-TURN
T.C. LESS THAN 50ppm/C
6
A1
5
7
1/2
4
OP213
OUTPUT
0
10V
FS
–15V
R2
R1
17.2k 301
0.1%
0.1%
Figure 1. Precision Load Cell Scale Amplifier
APPLICATION CIRCUITS
A High Precision Industrial Load-Cell Scale Amplifier
The OP113 family makes an excellent amplifier for conditioning
a load-cell bridge. Its low noise greatly improves the signal resolution, allowing the load cell to operate with a smaller output
range, thus reducing its nonlinearity. Figure 1 shows one half of
the OP113 family used to generate a very stable 10.000 V bridge
excitation voltage while the second amplifier provides a differential
gain. R4 should be trimmed for maximum common-mode rejection.
A Low Voltage Single Supply, Strain-Gage Amplifier
The true zero swing capability of the OP113 family allows the
amplifier in Figure 2 to amplify the strain-gage bridge accurately
even with no signal input while being powered by a single 5 V
supply. A stable 4.000 V bridge voltage is made possible by the
rail-to-rail OP295 amplifier, whose output can swing to within a
millivolt of either rail. This high voltage swing greatly increases
the bridge output signal without a corresponding increase in
bridge input.
5V
2
8
2N2222A
1
1/2
OP295
4
2.500V
3
IN
REF43
6 OUT
GND
2
4
4.000V
350
35mV
FS
R8
12.0k
5V
R7
20.0k
6
2
R1
100k
It is therefore not generally recommended that this trim be
used to compensate for system errors originating outside of the
OP113. The initial offset of the OP113 is low enough that external
trimming is almost never required but, if necessary, the 2 mV trim
1/2
OP295
7
4
R3
20k
3
1/2
OP213
OUTPUT
0V 3.5V
8
5
Adjusting the offset to zero has minimal effect on offset drift
(assuming the potentiometer has a tempco of less than 1000 ppm/
∞C). Adjustment away from zero, however, (like all bipolar
amplifiers) will result in a TCVOS of approximately 3.3 mV/∞C
for every millivolt of induced offset.
REV. E
+10.000V
3
A2
OP213
OP113 Offset Adjust
The OP113 has the facility for external offset adjustment,
using the industry standard arrangement. Pins 1 and 5 are used
in conjunction with a potentiometer of 10 kW total resistance,
connected with the wiper to V– (or ground in single supply
applications). The total adjustment range is about ± 2 mV using
this configuration.
8
1
1/2
Single supply applications have special requirements due to the
generally reduced dynamic range of the output signal. Single
supply applications are often operated at voltages of 5 V or 12 V,
compared to dual supply applications with supplies of ± 12 V or
± 15 V. This results in reduced output swings. Where a dual
supply application may often have 20 V of signal output swing,
single supply applications are limited to, at most, the supply range
and, more commonly, several volts below the supply. In order to
attain the greatest swing, the single supply output stage must
swing closer to the supply rails than in dual supply applications.
–15V
2
R5
1k
1
R2
20k
R4
100k
R5
R6
2.10k 27.4
RG = 2,127.4
Figure 2. Single Supply Strain-Gage Amplifier
–11–
OP113/OP213/OP413
A High Accuracy Linearized RTD Thermometer Amplifier
A High Accuracy Thermocouple Amplifier
Zero suppressing the bridge facilitates simple linearization of the
RTD by feeding back a small amount of the output signal to the
RTD (Resistor Temperature Device). In Figure 3, the left leg of
the bridge is servoed to a virtual ground voltage by amplifier
A1, while the right leg of the bridge is also servoed to zero volt
by amplifier A2. This eliminates any error resulting from commonmode voltage change in the amplifier. A 3-wire RTD is used to
balance the wire resistance on both legs of the bridge, thereby
reducing temperature mismatch errors. The 5.000 V bridge
excitation is derived from the extremely stable AD588 reference
device with 1.5 ppm/∞C drift performance.
Figure 4 shows a popular K-type thermocouple amplifier with
cold-junction compensation. Operating from a single 12 V supply,
the OP113 family’s low noise allows temperature measurement
to better than 0.02∞C resolution from 0∞C to 1000∞C range.
The cold-junction error is corrected by using an inexpensive silicon
diode as a temperature measuring device. It should be placed as
close to the two terminating junctions as physically possible. An
aluminum block might serve well as an isothermal system.
0.1F
Linearization of the RTD is done by feeding a fraction of the
output voltage back to the RTD in the form of a current. With
just the right amount of positive feedback, the amplifier output
will be linearly proportional to the temperature of the RTD.
4
R1
10.7k
K-TYPE
THERMOCOUPLE
40.7V/C
2
–
–
+
+
14
12
AD588BD
4
1
3
7
9
8
R3
50
10
RG FULL SCALE ADJUST
R2
8.25k
0.1F
R2
2.74k
+15V
RW1
6
100
RTD
R4
100
8
A2
5
RW2
7
1/2
4
OP213
–15V
RW3
R8
49.9k
2
A1
3
R8
453
8
2
1/2
R6
200
R3
53.6
OP213
3
4
1
0V TO 10.00V
(0C TO 1000C)
Figure 4. Accurate K-Type Thermocouple Amplifier
R5
R7
4.02k 100
R1
8.25k
10F
12V
10F
+
R4
5.62k
15
6
R9
124k
D1
11
13
R5
40.2k
1N4148
–15V +15V
16
5.000V
REF02EZ 6
2
12V
VOUT (10mV/C)
–1.50V = –150C
+5.00V = +500C
R9
5k
LINEARITY
ADJUST
@1/2 FS
1
1/2
OP213
R6 should be adjusted for a zero-volt output with the thermocouple measuring tip immersed in a zero-degree ice bath. When
calibrating, be sure to adjust R6 initially to cause the output to
swing in the positive direction first. Then back off in the negative direction until the output just stops changing.
An Ultralow Noise, Single Supply Instrumentation Amplifier
Extremely low noise instrumentation amplifiers can be built
using the OP113 family. Such an amplifier that operates off a
single supply is shown in Figure 5. Resistors R1–R5 should be
of high precision and low drift type to maximize CMRR performance. Although the two inputs are capable of operating to zero
volt, the gain of –100 configuration will limit the amplifier input
common mode to not less than 0.33 V.
Figure 3. Ultraprecision RTD Amplifier
5V TO 36V
To calibrate the circuit, first immerse the RTD in a zero-degree
ice bath or substitute an exact 100 W resistor in place of the
RTD. Adjust the ZERO ADJUST potentiometer for a 0.000 V
output, then set R9 LINEARITY ADJUST potentiometer to
the middle of its adjustment range. Substitute a 280.9 W resistor
(equivalent to 500∞C) in place of the RTD, and adjust the
FULL-SCALE ADJUST potentiometer for a full-scale voltage
of 5.000 V.
+
1/2
VIN
OP213
–
VOUT
1/2
OP213
*R1
10k
*R2
10k
*R3
10k
*RG
(200 + 12.7)
To calibrate out the nonlinearity, substitute a 194.07 W resistor
(equivalent to 250∞C) in place of the RTD, then adjust the
LINEARITY ADJUST potentiometer for a 2.500 V output.
Check and readjust the full-scale and half-scale as needed.
*R4
10k
GAIN =
20k
+6
RG
*ALL RESISTORS 0.1%, 25ppm/C
Figure 5. Ultralow Noise, Single Supply Instrumentation
Amplifier
Once calibrated, the amplifier outputs a 10 mV/∞C temperature
coefficient with an accuracy better than ± 0.5∞C over an RTD
measurement range of –150∞C to +500∞C. Indeed the amplifier
can be calibrated to a higher temperature range, up to 850∞C.
–12–
REV. E
OP113/OP213/OP413
Supply Splitter Circuit
Low Noise Voltage Reference
The OP113 family has excellent frequency response characteristic that makes it an ideal pseudo-ground reference generator as
shown in Figure 6. The OP113 family serves as a voltage follower
buffer. In addition, it drives a large capacitor that serves as a charge
reservoir to minimize transient load changes, as well as a low
impedance output device at high frequencies. The circuit easily
supplies 25 mA load current with good settling characteristics.
Few reference devices combine low noise and high output drive
capabilities. Figure 7 shows the OP113 family used as a two-pole
active filter that band limits the noise of the 2.500 V reference.
Total noise measures 3 mV p-p.
VS+ = 5V
5V
–
10F
+
5V
12V
1/2
IN
OUT 6
GND
4
2
8
1/2
3
R4
100
1
OP213
R2
5k
+
C2
10F
REF43
R1
5k
VS+
+
2
C2
1F
4
OP213
10k
10k
C1
0.1F
8
2
2
R3
2.5k
3
4
AD1868
2
3
The OP113 family’s low noise and single supply capability are
ideally suited for stereo DAC audio reproduction or sound
synthesis applications such as multimedia systems. Figure 8
shows an 18-bit stereo DAC output setup that is powered from a
single 5 V supply. The low noise preserves the 18-bit dynamic
range of the AD1868. For DACs that operate on dual supplies,
the OP113 family can also be powered from the same supplies.
4
5
6
VBL
18-BIT
LL DAC
CK
8
VOL
220F
1/2
7.68k
1
OP213
9.76k
14
LEFT
CHANNEL
OUTPUT
47k
100pF
13
AGND 12
7.68k
11
7.68k
VREF
VOR
7 DGND
18-BIT
DAC
8
VBR
10
100pF
7.68k
VS
9.76k
6
9
1/2
330pF
OP213
5
Figure 8. 5 V Only 18-Bit Stereo DAC
SoundPort is a registered trademark of Analog Devices, Inc.
REV. E
+ –
330pF
VREF
DR
18-BIT
LR SERIAL
REG.
16
15
18-BIT
DL SERIAL
REG.
3V p-p NOISE
5 V Only Stereo DAC for Multimedia
5V SUPPLY
VL
OUTPUT
2.500V
Figure 7. Low Noise Voltage Reference
OUTPUT
Figure 6. False Ground Generator
1
1
–13–
220F
7
+ –
47k
RIGHT
CHANNEL
OUTPUT
OP113/OP213/OP413
Low Voltage Headphone Amplifiers
Precision Voltage Comparator
Figure 9 shows a stereo headphone output amplifier for the
AD1849 16-bit SoundPort® Stereo Codec device. The pseudoreference voltage is derived from the common-mode voltage
generated internally by the AD1849, thus providing a convenient bias for the headphone output amplifiers.
With its PNP inputs and zero volt common-mode capability, the
OP113 family can make useful voltage comparators. There is
only a slight penalty in speed in comparison to IC comparators.
However, the significant advantage is its voltage accuracy. For
example, VOS can be a few hundred microvolts or less, combined
with CMRR and PSRR exceeding 100 dB, while operating on 5 V
supply. Standard comparators like the 111/311 family operate
on 5 V, but not with common-mode at ground, nor with offset
below 3 mV. Indeed, no commercially available single supply
comparator has a VOS less than 200 mV.
OPTIONAL
GAIN
1k
5k
VREF
5V
10F
LOUT1L 31
1/2
L VOLUME
CONTROL
OP213
220F
16 +
HEADPHONE
LEFT
10k
47k
5V
AD1849
Figure 11 shows the OP113 family response to a 10 mV overdrive signal when operating in open loop. The top trace shows
the output rising edge has a 15 ms propagation delay, while the
bottom trace shows a 7 ms delay on the output falling edge. This
ac response is quite acceptable in many applications.
10mV OVERDRIVE
1/2
VREF
OP213
5V
+2.5V
25k
0V
1/2
–2.5V
CMOUT 19
10k
1/2
OP213
220F
16 +
100
OP113
tr = tf = 5ms
HEADPHONE
RIGHT
LOUT1R 29
47k
10F
R VOLUME
CONTROL
2V
5k
1k
5s
100
OPTIONAL
GAIN
VREF
90
Figure 9. Headphone Output Amplifier for Multimedia
Sound Codec
Low Noise Microphone Amplifier for Multimedia
10
The OP113 family is ideally suited as a low noise microphone
preamp for low voltage audio applications. Figure 10 shows a
gain of 100 stereo preamp for the AD1849 16-bit SoundPort
Stereo Codec chip. The common-mode output buffer serves as
a “phantom power” driver for the microphones.
10k
5V
0%
2V
Figure 11. Precision Comparator
The low noise and 250 mV (maximum) offset voltage enhance the
overall dc accuracy of this type of comparator. Note that zero
crossing detectors and similar ground referred comparisons can be
implemented even if the input swings to –0.3 V below ground.
1/2
10F
LEFT
ELECTRET
CONDENSER
MIC
INPUT
OP213
50
20
10k
17
100
MINL
AD1849
5V
19
CMOUT
15
MINR
1/2
OP213
100
20
10F
10k
50
1/2
RIGHT
ELECTRET
CONDENSER
MIC
INPUT
OP213
10k
Figure 10. Low Noise Stereo Microphone Amplifier for
Multimedia Sound Codec
SoundPort is a registered trademark of Analog Devices, Inc.
–14–
REV. E
OP113/OP213/OP413
+IN
9V 9V
OUT
–IN
Figure 12. OP213 Simplified Schematic
*OP113 Family SPICE Macro-Model
*
*Copyright 1992 by Analog Devices, Inc.
*
*Node Assignments
*
*
Noninverting Input
*
*
*
Inverting Input
Positive Supply
Negative Supply
*
Output
*
.SUBCKT OP113 Family
3 2 7 4 6
*
* INPUT STAGE
R3
4 19 1.5E3
R4
4 20 1.5E3
C1
19 20 5.31E–12
I1
7 18 106E–6
IOS
2 3
25E–09
EOS
12 5
POLY(1)
51
4
25E–06 1
Q1
19 3
18
PNP1
Q2
20 12 18
PNP1
CIN
3 2
3E–12
D1
3 1
DY
D2
2 1
DY
EN
5 2
22
0
1
GN1
0 2
25
0
1E–5
GN2
0 3
28
0
1E–5
*
* VOLTAGE NOISE SOURCE WITH FLICKER NOISE
DN1
21 22 DEN
DN2
22 23 DEN
VN1
21 0
DC 2
VN2
0 23 DC 2
*
* CURRENT NOISE SOURCE WITH FLICKER NOISE
DN3
24 25 DIN
DN4
25 26 DIN
VN3
24 0
DC 2
VN4
0 26 DC 2
*
REV. E
* SECOND CURRENT NOISE SOURCE
DN5 27 28 DIN
DN6 28 29 DIN
VN5 27 0
DC 2
VN6 0
29 DC 2
*
* GAIN STAGE & DOMINANT POLE AT .2000E+01 HZ
G2
34 36 19 20 2.65E–04
R7
34 36 39E+06
V3
35 4
DC 6
D4
36 35 DX
VB2 34 4
1.6
*
* SUPPLY/2 GENERATOR
ISY 7
4
0.2E–3
R10 7
60 40E+3
R11 60 4
40E+3
C3
60 0
1E–9
*
* CMRR STAGE & POLE AT 6 kHZ
ECM 50 4
POLY(2) 3 BŒ 60 2
60 0
1.6 0
1.6
CCM 50 51 26.5E–12
RCM1 50 51 1E6
RCM2 51 4
1
*
*
OUTPUT STAGE
R12 37 36 1E3
R13 38 36 500
C4
37 6
20E–12
C5
38 39 20E–12
M1
39 36 4 4 MN L=9E–6 W=1000E–6 AD=15E–9 AS=15E–9
M2
45 36 4 4 MN L=9E–6 W=1000E–6 AD=15E–9 AS=15E–9
D5
39 47 DX
D6
47 45 DX
Q3
39 40 41 QPA 8
VB
7
40 DC 0.861
R14 7
41 375
Q4
41 7
43 QNA 1
R17 7
43 15
Q5
43 39 6
QNA 20
Q6
46 45 6
QPA 20
R18 46 4
15
Q7
36 46 4
QNA 1
M3
6
36 4 4 MN L = 9E–6 W=2000E–6 AD=30E–9 AS=30E–9
*
* NONLINEAR MODELS USED
*
.MODEL DX D (IS=1E–15)
.MODEL DY D (IS=1E–15 BV=7)
.MODEL PNP1 PNP (BF=220)
.MODEL DEN D(IS=1E–12 RS=1016 KF=3.278E–15 AF=1)
.MODEL DIN D(IS=1E–12 RS=100019 KF=4.173E–15 AF=1)
.MODEL QNA NPN(IS=1.19E–16 BF=253 VAF=193 VAR=15 RB=2.0E3
+ IRB=7.73E–6 RBM=132.8 RE=4 RC=209 CJE=2.1E–13 VJE=0.573
+ MJE=0.364 CJC=1.64E–13 VJC=0.534 MJC=0.5 CJS=1.37E–12
+ VJS=0.59 MJS=0.5 TF=0.43E–9 PTF=30)
.MODEL QPA PNP(IS=5.21E–17 BF=131 VAF=62 VAR= 15 RB=1.52E3
+ IRB=1.67E–5 RBM=368.5 RE=6.31 RC=354.4 CJE=1.1E–13
+ VJE=0.745 MJE=0.33 CJC=2.37E–13 VJC=0.762 MJC=0.4
+ CJS=7.11E–13 VJS=0.45 MJS=0.412 TF=1.0E–9 PTF=30)
.MODEL MN NMOS(LEVEL=3 VTO=1.3 RS=0.3 RD=0.3 TOX=8.5E–8
+ LD=1.48E–6 WD=1E–6 NSUB=1.53E16 UO=650 DELTA=10 VMAX=2E5
+ XJ=1.75E–6 KAPPA=0.8 ETA=0.066 THETA=0.01 TPG=1 CJ=2.9E–4
+ PB=0.837 MJ=0.407 CJSW=0.5E–9 MJSW=0.33)
*
.ENDS OP113 Family
–15–
OP113/OP213/OP413
OUTLINE DIMENSIONS
14-Lead Plastic Dual-in-Line [PDIP]
(N-14)
Dimensions shown in inches and (millimeters)
Dimensions shown in inches and (millimeters)
0.375 (9.53)
0.365 (9.27)
0.355 (9.02)
8
0.685 (17.40)
0.665 (16.89)
0.645 (16.38)
5
0.295 (7.49)
0.285 (7.24)
0.275 (6.98)
4
1
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.100 (2.54)
BSC
0.015
(0.38)
MIN
0.180
(4.57)
MAX
0.150 (3.81)
0.130 (3.30)
0.110 (2.79)
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
14
8
1
7
0.295 (7.49)
0.285 (7.24)
0.275 (6.99)
0.100 (2.54)
BSC
0.150 (3.81)
0.135 (3.43)
0.120 (3.05)
C00286–0–9/02(E)
8-Lead Plastic Dual-in-Line [PDIP]
(N-8)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.015 (0.38)
MIN
0.180 (4.57)
MAX
0.015 (0.38)
0.010 (0.25)
0.008 (0.20)
SEATING
PLANE
0.060 (1.52)
0.050 (1.27)
0.045 (1.14)
0.150 (3.81)
0.130 (3.30)
0.110 (2.79)
0.022 (0.56) 0.060 (1.52)
0.018 (0.46) 0.050 (1.27)
0.014 (0.36) 0.045 (1.14)
SEATING
PLANE
0.150 (3.81)
0.135 (3.43)
0.120 (3.05)
0.015 (0.38)
0.010 (0.25)
0.008 (0.20)
COMPLIANT TO JEDEC STANDARDS MO-095-AB
CONTROLLING DIMENSIONS ARE IN INCH; MILLIMETERS DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
COMPLIANT TO JEDEC STANDARDS MO-095AA
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETERS DIMENSIONS
(IN PARENTHESES)
8-Lead Standard Small Outline Package [SOIC]
Narrow Body
(R-8)
16-Lead Standard Small Outline Package [SOIC]
Wide Body
(R-16)
Dimensions shown in millimeters and (inches)
Dimensions shown in millimeters and (inches)
10.50 (0.4134)
10.10 (0.3976)
5.00 (0.1968)
4.80 (0.1890)
9
16
1
5
4
7.60 (0.2992)
7.40 (0.2913)
6.20 (0.2440)
5.80 (0.2284)
8
1
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0040)
COPLANARITY
SEATING
0.10
PLANE
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.33 (0.0130)
10.65 (0.4193)
10.00 (0.3937)
0.50 (0.0196)
ⴛ 45ⴗ
0.25 (0.0099)
8ⴗ
0.25 (0.0098) 0ⴗ 1.27 (0.0500)
0.41 (0.0160)
0.19 (0.0075)
1.27 (0.0500)
BSC
2.65 (0.1043)
2.35 (0.0925)
0.75 (0.0295)
ⴛ 45ⴗ
0.25 (0.0098)
0.30 (0.0118)
0.10 (0.0039)
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MS-012AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
0.51 (0.0201)
0.33 (0.0130)
SEATING
PLANE
0.32 (0.0126)
0.23 (0.0091)
8ⴗ
0ⴗ
1.27 (0.0500)
0.40 (0.0157)
PRINTED IN U.S.A.
8
4.00 (0.1574)
3.80 (0.1497)
COMPLIANT TO JEDEC STANDARDS MS-013AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Revision History
Location
Page
8/02—Data Sheet changed from REV. D to REV. E.
Edits to Figure 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Edits to Figure 7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Edits to OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
9/01—Data Sheet changed from REV. C to REV. D.
Edits to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
–16–
REV. E