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OP27GJZ

OP27GJZ

  • 厂商:

    AD(亚德诺)

  • 封装:

    TO99-8

  • 描述:

    IC OPAMP GP 1 CIRCUIT TO99-8

  • 数据手册
  • 价格&库存
OP27GJZ 数据手册
Data Sheet Low Noise, Precision Operational Amplifier OP27 FEATURES PIN CONFIGURATIONS Low noise: 80 nV p-p (0.1 Hz to 10 Hz), 3 nV/√Hz Low drift: 0.2 µV/°C High speed: 2.8 V/µs slew rate, 8 MHz gain bandwidth Low VOS: 10 µV CMRR: 126 dB at VCM of ±11 V High open-loop gain: 1.8 million Available in die form BAL BAL 1 OP27 V+ OUT –IN 2 00317-001 NC +IN 3 4V– (CASE) NC = NO CONNECT GENERAL DESCRIPTION Figure 1. 8-Lead TO-99 (J-Suffix) VOS TRIM 1 OP27 8 VOS TRIM –IN 2 7 V+ +IN 3 6 OUT V– 4 5 NC 00317-002 The OP27 precision operational amplifier combines the low offset and drift of the OP07 with both high speed and low noise. Offsets down to 25 µV and maximum drift of 0.6 µV/°C make the OP27 ideal for precision instrumentation applications. Low noise, en = 3.5 nV/√Hz, at 10 Hz, a low 1/f noise corner frequency of 2.7 Hz, and high gain (1.8 million), allow accurate high-gain amplification of low-level signals. A gain bandwidth product of 8 MHz and a 2.8 V/µs slew rate provide excellent dynamic accuracy in high speed, data-acquisition systems. NC = NO CONNECT Figure 2. 8-Lead CERDIP – Glass Hermetic Seal (Z-Suffix), 8-Lead PDIP (P-Suffix), and 8-Lead SOIC (S-Suffix) A low input bias current of ±10 nA is achieved by use of a bias current cancellation circuit. Over the military temperature range, this circuit typically holds IB and IOS to ±20 nA and 15 nA, respectively. The output stage has good load driving capability. A guaranteed swing of ±10 V into 600 Ω and low output distortion make the OP27 an excellent choice for professional audio applications. (Continued on Page 3) FUNCTIONAL BLOCK DIAGRAM V+ R3 Q6 R11 1 8 VOS ADJ.. C2 R4 Q22 R21 R23 Q21 Q24 Q23 Q46 C1 R24 R9 Q20 Q1A Q1B Q2B Q19 OUTPUT R12 Q2A NONINVERTING INPUT (+) C3 R5 C4 Q3 INVERTING INPUT (–) Q11 Q26 Q12 Q27 Q45 Q28 ADJUSTED AT WAFER TEST FOR MINIMUM OFFSET VOLTAGE V– 00317-003 1 R1 AND R2 ARE PERMANENTLY Figure 3. Rev. H Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©1981–2015 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com OP27 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Typical Performance Characteristics ..............................................8 General Description ......................................................................... 1 Applications Information .............................................................. 14 Pin Configurations ........................................................................... 1 Offset Voltage Adjustment ........................................................ 14 Functional Block Diagram .............................................................. 1 Noise Measurements .................................................................. 14 Revision History ............................................................................... 2 Unity-Gain Buffer Applications ............................................... 14 Specifications..................................................................................... 4 Comments On Noise ................................................................. 15 Electrical Characteristics ............................................................. 4 Audio Applications .................................................................... 16 Typical Electrical Characteristics ............................................... 6 References.................................................................................... 18 Absolute Maximum Ratings ............................................................ 7 Outline Dimensions ....................................................................... 19 Thermal Resistance ...................................................................... 7 Ordering Guide .......................................................................... 21 ESD Caution .................................................................................. 7 REVISION HISTORY 10/15—Rev. G to Rev. H Changes to Features Section and General Description Section..... 1 Changes to Note 1, Ordering Guide ................................................. 21 3/15—Rev. F to Rev. G Changes to General Description Section ...................................... 3 Changes to Figure 31 ...................................................................... 12 Changes to Applications Information Section and Output Voltage Adjustment Section .......................................................... 14 Updated Outline Dimensions ....................................................... 19 Changes to Ordering Guide .......................................................... 21 5/06—Rev. E to Rev. F Removed References to 745 .............................................. Universal Updated 741 to AD741 ...................................................... Universal Changes to Ordering Guide .......................................................... 20 12/05—Rev. D to Rev. E Edits to Figure 2 ................................................................................ 1 1/03—Rev. B to Rev. C Edits to Pin Connections ..................................................................1 Edits to General Description ...........................................................1 Edits to Die Characteristics ..............................................................5 Edits to Absolute Maximum Ratings ..............................................7 Updated Outline Dimensions ....................................................... 16 Edits to Figure 8 .............................................................................. 14 Edits to Outline Dimensions......................................................... 16 9/01—Rev. 0 to Rev. A Edits to Ordering Information ........................................................1 Edits to Pin Connections ..................................................................1 Edits to Absolute Maximum Ratings ..............................................2 Edits to Package Type .......................................................................2 Edits to Electrical Characteristics .............................................. 2, 3 Edits to Wafer Test Limits ................................................................4 Deleted Typical Electrical Characteristics......................................4 Edits to Burn-In Circuit Figure .......................................................7 Edits to Application Information ....................................................8 9/05—Rev. C to Rev. D Updated Format .................................................................. Universal Changes to Table 1 ............................................................................ 4 Removed Die Characteristics Figure ............................................. 5 Removed Wafer Test Limits Table .................................................. 5 Changes to Table 5 ............................................................................ 7 Changes to Comments on Noise Section .................................... 15 Changes to Ordering Guide .......................................................... 24 Rev. H | Page 2 of 21 Data Sheet OP27 GENERAL DESCRIPTION (Continued from Page 1) PSRR and CMRR exceed 120 dB. These characteristics, coupled with long-term drift of 0.2 µV/month, allow the circuit designer to achieve performance levels previously attained only by discrete designs. Low cost, high volume production of OP27 is achieved by using an on-chip Zener zap-trimming network. This reliable and stable offset trimming scheme has proven its effectiveness over many years of production history. The OP27 provides excellent performance in low noise, high accuracy amplification of low level signals. Applications include stable integrators, precision summing amplifiers, precision voltage threshold detectors, comparators, and professional audio circuits such as tape heads and microphone preamplifiers. Rev. H | Page 3 of 21 OP27 Data Sheet SPECIFICATIONS ELECTRICAL CHARACTERISTICS VS = ±15 V, TA = 25°C, unless otherwise noted. Table 1. Parameter INPUT OFFSET VOLTAGE1 LONG-TERM VOS STABILITY2, 3 INPUT OFFSET CURRENT INPUT BIAS CURRENT INPUT NOISE VOLTAGE3, 4 INPUT NOISE Voltage Density3 Symbol VOS VOS/Time IOS IB en p-p en INPUT NOISE Current Density3 in INPUT RESISTANCE Differential Mode5 Common Mode INPUT VOLTAGE RANGE COMMON-MODE REJECTION RATIO POWER SUPPLY REJECTION RATIO LARGE SIGNAL VOLTAGE GAIN RIN RINCM IVR CMRR PSRR AVO OUTPUT VOLTAGE SWING VO SLEW RATE6 GAIN BANDWIDTH PRODUCT6 OPEN-LOOP OUTPUT RESISTANCE POWER CONSUMPTION OFFSET ADJUSTMENT RANGE SR GBW RO Pd Test Conditions 0.1 Hz to 10 Hz fO = 10 Hz fO = 30 Hz fO = 1000 Hz fO = 10 Hz fO = 30 Hz fO = 1000 Hz OP27A/OP27E Min Typ Max 10 25 0.2 1.0 7 35 ±10 ±40 0.08 0.18 3.5 5.5 3.1 4.5 3.0 3.8 1.7 4.0 1.0 2.3 0.4 0.6 1.3 VCM = ±11 V VS = ±4 V to ±18 V RL ≥ 2 kΩ, VO = ±10 V RL ≥ 600 Ω, VO = ±10 V RL ≥ 2 kΩ RL ≥ 600 Ω RL ≥ 2 kΩ VO = 0, IO = 0 VO RP = 10 kΩ 1 ±11.0 114 1000 800 ±12.0 ±10.0 1.7 5.0 6 3 ±12.3 126 1 1800 1500 ±13.8 ±11.5 2.8 8.0 70 90 ±4.0 Min 0.7 ±11.0 100 10 700 600 ±11.5 ±10.0 1.7 5.0 140 OP27G Typ 30 0.4 12 ±15 0.09 3.8 3.3 3.2 1.7 1.0 0.4 4 2 ±12.3 120 2 1500 1500 ±13.5 ±11.5 2.8 8.0 70 100 ±4.0 Max 100 2.0 75 ±80 0.25 8.0 5.6 4.5 0.6 20 170 Unit µV µV/MO nA nA µV p-p nV/√Hz nV/√Hz nV/√Hz pA/√Hz pA/√Hz pA/√Hz MΩ GΩ V dB µV/V V/mV V/mV V V V/µs MHz Ω mW mV Input offset voltage measurements are performed approximately 0.5 seconds after application of power. A/E grades guaranteed fully warmed up. Long-term input offset voltage stability refers to the average trend line of VOS vs. time over extended periods after the first 30 days of operation. Excluding the initial hour of operation, changes in VOS during the first 30 days are typically 2.5 µV. Refer to the Typical Performance Characteristics section. 3 Sample tested. 4 See voltage noise test circuit (Figure 31). 5 Guaranteed by input bias current. 6 Guaranteed by design. 2 Rev. H | Page 4 of 21 Data Sheet OP27 VS = ±15 V, −55°C ≤ TA ≤ 125°C, unless otherwise noted. Table 2. Parameter INPUT OFFSET VOLTAGE1 AVERAGE INPUT OFFSET DRIFT Symbol VOS TCVOS2 TCVOSn3 IOS IB IVR CMRR PSRR AVO VO INPUT OFFSET CURRENT INPUT BIAS CURRENT INPUT VOLTAGE RANGE COMMON-MODE REJECTION RATIO POWER SUPPLY REJECTION RATIO LARGE SIGNAL VOLTAGE GAIN OUTPUT VOLTAGE SWING Test Conditions VCM = ±10 V VS = ±4.5 V to ±18 V RL ≥ 2 kΩ, VO = ±10 V RL ≥ 2 kΩ Min OP27A Typ 30 ±10.3 108 0.2 15 ±20 ±11.5 122 2 1200 ±13.5 600 ±11.5 Max 60 Unit µV 0.6 50 ±60 µV/°C nA nA V dB µV/V V/mV V 16 1 Input offset voltage measurements are performed by automated test equipment approximately 0.5 seconds after application of power. A/E grades guaranteed fully warmed up. 2 The TCVOS performance is within the specifications unnulled or when nulled with RP = 8 kΩ to 20 kΩ. TCVOS is 100% tested for A/E grades, sample tested for G grades. 3 Guaranteed by design. VS = ±15 V, −25°C ≤ TA ≤ 85°C for OP27J and OP27Z and −40°C ≤ TA ≤ 85°C for OP27GS, unless otherwise noted. Table 3. Parameter INPUT ONSET VOLTAGE AVERAGE INPUT OFFSET DRIFT INPUT OFFSET CURRENT INPUT BIAS CURRENT INPUT VOLTAGE RANGE COMMON-MODE REJECTION RATIO POWER SUPPLY REJECTION RATIO LARGE SIGNAL VOLTAGE GAIN OUTPUT VOLTAGE SWING 1 2 Symbol VOS TCVOS1 TCVOSn2 IOS IB IVR CMRR PSRR AVO VO Test Conditions VCM = ±10 V VS = ±4.5 V to ±18 V RL ≥ 2 kΩ, VO = ±10 V RL ≥ 2 kΩ Min ±10.5 110 750 ±11.7 OP27E Typ 20 0.2 0.2 10 ±14 ±11.8 124 2 1500 ±13.6 Max 50 0.6 0.6 50 ±60 Min ±10.5 96 15 450 ±11.0 OP27G Typ 55 04 04 20 ±25 ±11.8 118 2 1000 ±13.3 Max 220 1.8 1.8 135 ±150 32 Unit µV µV/°C µV/°C nA nA V dB µV/V V/mV V The TCVOS performance is within the specifications unnulled or when nulled with RP = 8 kΩ to 20 kΩ. TCVOS is 100% tested for A/E grades, sample tested for C/G grades. Guaranteed by design. Rev. H | Page 5 of 21 OP27 Data Sheet TYPICAL ELECTRICAL CHARACTERISTICS VS = ±15 V, TA = 25°C unless otherwise noted. Table 4. Parameter AVERAGE INPUT OFFSET VOLTAGE DRIFT1 AVERAGE INPUT OFFSET CURRENT DRIFT AVERAGE INPUT BIAS CURRENT DRIFT INPUT NOISE VOLTAGE DENSITY Symbol TCVOS or TCVOSn TCIOS TCIB en Test Conditions Nulled or unnulled, RP = 8 kΩ to 20 kΩ INPUT NOISE CURRENT DENSITY in INPUT NOISE VOLTAGE SLEW RATE enp-p SR GBW fO = 10 Hz fO = 30 Hz fO = 1000 Hz 0.1 Hz to 10 Hz RL ≥ 2 kΩ GAIN BANDWIDTH PRODUCT 1 fO = 10 Hz fO = 30 Hz fO = 1000 Hz OP27N Typical 0.2 80 100 3.5 3.1 3.0 Unit µV/°C pA/°C pA/°C nV/√Hz nV/√Hz nV/√Hz 1.7 1.0 0.4 0.08 2.8 8 pA/√Hz pA/√Hz pA/√Hz µV p-p V/µs MHz Input offset voltage measurements are performed by automated test equipment approximately 0.5 seconds after application of power. Rev. H | Page 6 of 21 Data Sheet OP27 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 5. Parameter Supply Voltage Input Voltage1 Output Short-Circuit Duration Differential Input Voltage2 Differential Input Current2 Storage Temperature Range Operating Temperature Range OP27A (J, Z) OP27E (Z) OP27E (P) OP27G (P, S, J, Z) Lead Temperature Range (Soldering, 60 sec) Junction Temperature Rating ±22 V ±22 V Indefinite ±0.7 V ±25 mA −65°C to +150°C θJA is specified for the worst-case conditions, that is, θJA is specified for device in socket for TO-99, CERDIP, and PDIP packages; θJA is specified for device soldered to printed circuit board for SOIC package. −55°C to +125°C −25°C to +85°C 0°C to 70°C −40°C to +85°C 300°C −65°C to +150°C Package Type 8-Lead Metal Can (TO-99) (J) 8-Lead CERDIP (Z) 8-Lead PDIP (P) 8-Lead SOIC_N (S) Absolute maximum ratings apply to both dice and packaged parts, unless otherwise noted. Table 6. 1 For supply voltages less than ±22 V, the absolute maximum input voltage is equal to the supply voltage. 2 The inputs of the OP27 are protected by back-to-back diodes. Current limiting resistors are not used in order to achieve low noise. If differential input voltage exceeds ±0.7 V, the input current should be limited to 25 mA. ESD CAUTION Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. H | Page 7 of 21 θJA 150 148 103 158 θJC 18 16 43 43 Unit °C/W °C/W °C/W °C/W OP27 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS 100 10 TA = 25qC VS = r15V RMS VOLTAGE NOISE (PV) 90 70 60 50 1 0.1 TEST TIME OF 10sec FURTHER LIMITS LOW FREQUENCY (1 V), the output waveform looks as shown in the pulsed operation diagram (see Figure 37). During the fast feedthrough-like portion of the output, the input protection diodes effectively short the output to the input, and a current, limited only by the output short-circuit protection, is drawn by the signal generator. With Rf ≥ 500 Ω, the output is capable of handling the current requirements (IL ≤ 20 mA at 10 V); the amplifier stays in its active mode and a smooth transition occurs. When Rf > 2 kΩ, a pole is created with Rf and the amplifier’s input capacitance (8 pF) that creates additional phase shift and reduces phase margin. A small capacitor (20 pF to 50 pF) in parallel with Rf eliminates this problem. Rf – OP27 + Figure 37. Pulsed Operation Rev. H | Page 14 of 21 2.8V/Ps 00317-037 10k: RP NOISE MEASUREMENTS Data Sheet OP27 1k OP08/108 500 OP07 Voltage noise is inversely proportional to the square root of bias current, but current noise is proportional to the square root of bias current. The noise advantage of the OP27 disappears when high source resistors are used. Figure 38, Figure 39, Figure 40 compare the observed total noise of the OP27 with the noise performance of other devices in different circuit applications. ª(Voltage Noise)  « Total Noise «(Current Noise u RS )2 « 2 ¬«(Resistor Noise) 2 º » » » ¼» 5534 1 2 100 OP27/37 1 RS e.g. RS 2 RS e.g. RS 50 UNMATCHED = R S1 = 10k:, R S2 = 0 MATCHED = 10k:, R S1 = R S2 = 5k: RS1 RS2 REGISTER NOISE ONLY 10 50 1/ 2 10k 5k 500 1k RS—SOURCE RESISTANCE (:) 100 50k 00317-039 The OP27 is a very low noise, monolithic op amp. The outstanding input voltage noise characteristics of the OP27 are achieved mainly by operating the input stage at a high quiescent current. The input bias and offset currents, which would normally increase, are held to reasonable values by the input bias current cancellation circuit. The OP27A/OP27E has IB and IOS of only ±40 nA and 35 nA at 25°C respectively. This is particularly important when the input has a high source resistance. In addition, many audio amplifier designers prefer to use direct coupling. The high IB, VOS, and TCVOS of previous designs have made direct coupling difficult, if not impossible, to use. Figure 39 shows the 0.1 Hz to 10 Hz p-p noise. Here the picture is less favorable; resistor noise is negligible and current noise becomes important because it is inversely proportional to the square root of frequency. The crossover with the OP07 occurs in the 3 kΩ to 5 kΩ range depending on whether balanced or unbalanced source resistors are used (at 3 kΩ the IB and IOS error also can be 3× the VOS spec). p-p NOISE (nV) COMMENTS ON NOISE Figure 39. Peak-to-Peak Noise (0.1 Hz to 10 Hz) as Source Resistance (Includes Resistor Noise) Figure 38 shows noise vs. source resistance at 1000 Hz. The same plot applies to wideband noise. To use this plot, multiply the vertical scale by the square root of the bandwidth. 100 For low frequency applications, the OP07 is better than the OP27/OP37 when RS > 3 kΩ. The only exception is when gain error is important. Figure 40 illustrates the 10 Hz noise. As expected, the results are between the previous two figures. 100 50 1 1 2 TOTAL NOISE (nV/—Hz) 2 OP07 10 1 RS e.g. RS 2 RS e.g. RS 5534 OP27/37 REGISTER NOISE ONLY 1 50 100 UNMATCHED = R S1 = 10k:, R S2 = 0 MATCHED = 10k:, R S1 = R S2 = 5k: RS1 OP08/108 10 5534 1 RS e.g. RS 2 RS e.g. RS 5 OP27/37 RS2 500 1k 5k 10k RS—SOURCE RESISTANCE (:) OP07 UNMATCHED = R S1 = 10k:, R S2 = 0 MATCHED = 10k:, R S1 = R S2 = 5k: RS1 50k REGISTER NOISE ONLY 1 50 Figure 38. Noise vs. Source Resistance (Including Resistor Noise) at 1000 Hz At RS < 1 kΩ, the low voltage noise of the OP27 is maintained. With RS < 1 kΩ, total noise increases but is dominated by the resistor noise rather than current or voltage noise. lt is only beyond RS of 20 kΩ that current noise starts to dominate. The argument can be made that current noise is not important for applications with low-to-moderate source resistances. The crossover between the OP27 and OP07 noise occurs in the 15 kΩ to 40 kΩ region. 100 RS2 500 1k 5k 10k RS—SOURCE RESISTANCE (:) 50k 00317-040 5 00317-038 TOTAL NOISE (nV/—Hz) 50 OP08/108 Figure 40. 10 Hz Noise vs. Source Resistance (Includes Resistor Noise) Audio Applications Rev. H | Page 15 of 21 OP27 Data Sheet For reference, typical source resistances of some signal sources are listed in Table 7. MOVING MAGNET CARTRIDGE INPUT Magnetic Tape Head Source Impedance
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