Low Power, High Precision Operational Amplifier OP97
FEATURES
Low supply current: 600 μA maximum OP07 type performance Offset voltage: 20 μV maximum Offset voltage drift: 0.6 μV/°C maximum Very low bias current 25°C: 100 pA maximum −55°C to +125°C: 250 pA maximum High common-mode rejection: 114 dB minimum Extended industrial temperature range: −40°C to +85°C
PIN CONNECTIONS
NULL 1 –IN 2 +IN 3 V– 4
OP97
8 7 6 5
NULL V+
00299-001
OUT OVER COMP
Figure 1. 8-Lead PDIP (P Suffix) 8-Lead SOIC (S Suffix)
GENERAL DESCRIPTION
The OP97 is a low power alternative to the industry-standard OP07 precision amplifier. The OP97 maintains the standards of performance set by the OP07 while utilizing only 600 μA supply current, less than 1/6 that of an OP07. Offset voltage is an ultralow 25 μV, and drift over temperature is below 0.6 μV/°C. External offset trimming is not required in the majority of circuits. Improvements have been made over OP07 specifications in several areas. Notable is bias current, which remains below 250 pA over the full military temperature range. The OP97 is ideal for use in precision long-term integrators or sample-andhold circuits that must operate at elevated temperatures. Common-mode rejection and power supply rejection are also improved with the OP97, at 114 dB minimum over wider ranges of common-mode or supply voltage. Outstanding PSR, a supply range specified from ±2.25 V to ±20 V, and the minimal power requirements of the OP97 combine to make the OP97 a preferred device for portable and battery-powered instruments. The OP97 conforms to the OP07 pinout, with the null potentiometer connected between Pin 1 and Pin 8 with the wiper to V+. The OP97 upgrades circuit designs using AD725, OP05, OP07, OP12, and PM1012 type amplifiers. It may replace 741type amplifiers in circuits without nulling or where the nulling circuitry has been removed.
Rev. F
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©1997–2007 Analog Devices, Inc. All rights reserved.
OP97 TABLE OF CONTENTS
Features .............................................................................................. 1 Pin Connections ............................................................................... 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Electrical Characteristics ............................................................. 3 Absolute Maximum Ratings............................................................ 5 Thermal Resistance ...................................................................... 5 ESD Caution...................................................................................5 Typical Performance Characteristics ..............................................6 Application Information ................................................................ 11 AC Performance ............................................................................. 12 Guarding and Shielding ................................................................. 13 Outline Dimensions ....................................................................... 15 Ordering Guide .......................................................................... 16
REVISION HISTORY
11/07—Rev. E to Rev. F Updated Format .................................................................. Universal Changes to Ordering Guide .......................................................... 16 07/03—Rev. D to Rev. E Deleted H-08A .................................................................... Universal Deleted Q-8 ......................................................................... Universal Deleted E-20A ..................................................................... Universal Deleted Die Characteristics ............................................................. 4 Deleted Wafer Test Limits ............................................................... 4 Updated TPC 14 ............................................................................... 5 Updated Outline Dimensions ....................................................... 10 01/02—Rev. C to Rev. D Edits to Absolute Maximum Ratings ..............................................3 Edits to Ordering Guide ...................................................................3 Deleted DICE Characteristics ..........................................................3 Deleted Wafer Test Limits ................................................................3 Edits to Applications Information...................................................7
Rev. F | Page 2 of 16
OP97 SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
VS = ±15 V, VCM = 0 V, TA = 25°C, unless otherwise noted. Table 1.
Parameter INPUT CHARACTERISTICS Input Offset Voltage Long-Term Offset Voltage Stability Input Offset Current Input Bias Current Input Noise Voltage Input Noise Voltage Density Input Noise Current Density Large Signal Voltage Gain Common-Mode Rejection Input Voltage Range 3 OUTPUT CHARACTERISTICS Output Voltage Swing Differential Input Resistance 4 POWER SUPPLY Power Supply Rejection Supply Current Supply Voltage DYNAMIC PERFORMANCE Slew Rate Closed-Loop Bandwidth
1 2
Symbol VOS ΔVOS/Time IOS IB en p-p en in AVO CMR IVR VO RIN PSR ISY VS SR BW
Conditions
Min
OP97E Typ 10 0.3 30 ±30 0.5 17 14 20 2000 132 ±14.0 ±14
Max 25
Min
OP97F Typ 30 0.3 30 ±30 0.5 17 14 20 2000 132 ±14.0 ±14
Max 75
Unit μV μV/month pA pA μV p-p nV/√Hz nV/√Hz fA/√Hz V/mV dB V V MΩ dB μA V V/μs MHz
100 ±100 30 22 200 110 ±13.5 ±13 30 110 600 ±20 ±2 0.1 0.4
150 ±150 30 22
0.1 Hz to 10 Hz fO = 10 Hz 1 fO = 1000 Hz 2 fO = 10 Hz VO = ±10 V; RL = 2 kΩ VCM = ±13.5 V
300 114 ±13.5 ±13 30 114 ±2 0.1 0.4
RL = 10 kΩ
VS = ±2 V to ±20 V Operating range
132 380 ±15 0.2 0.9
132 380 ±15 0.2 0.9
600 ±20
AVCL = 1
10 Hz noise voltage density is sample tested. Devices 100% tested for noise are available on request. Sample tested. 3 Guaranteed by CMR test. 4 Guaranteed by design.
Rev. F | Page 3 of 16
OP97
VS = ±15 V, VCM = 0 V, −40°C ≤ TA ≤ +85°C for the OP97E/OP97F, unless otherwise noted. Table 2.
Parameter Input Offset Voltage Average Temperature Coefficient of VOS Input Offset Current Average Temperature Coefficient of IOS Input Bias Current Average Temperature Coefficient of IB Large Signal Voltage Gain Common-Mode Rejection Power Supply Rejection Input Voltage Range 1 Output Voltage Swing Slew Rate Supply Current Supply Voltage
1
Symbol VOS TCVOS IOS TCIOS IB TCIB AVO CMR PSR IVR VO SR ISY VS
Conditions S suffix
Min
OP97E Typ 25 0.2 60 0.4 ±60 0.4 1000 128 126 ±14.0 ±14 0.15 400 ±15
Max 60 0.6 250 2.5 ±250 2.5
Min
OP97F Typ 60 0.3 0.3 80 0.6 ±80 0.6 1000 128 128 ±14.0 ±14 0.15 400 ±15
Max 200 2.0 750 7.5 ±750 7.5
Unit μV μV/°C pA pA/°C pA pA/°C V/mV dB dB V V V/μs μA V
VO = 10 V; RL = 2 kΩ VCM = ±13.5 V VS = ±2.5 V to ±20 V RL = 10 kΩ
200 108 108 ±13.5 ±13 0.05 ±2.5
150 108 108 ±13.5 ±13 0.05 800 ±20 ±2.5
Operating range
800 ±20
Guaranteed by CMR test.
Rev. F | Page 4 of 16
OP97 ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings apply to both DICE and packaged parts, unless otherwise noted. Table 3.
Parameter Supply Voltage Input Voltage1 Differential Input Voltage2 Differential Input Current2 Output Short-Circuit Duration Operating Temperature Range OP97E, OP97F (P, S) Storage Temperature Range Junction Temperature Range Lead Temperature (Soldering, 60 sec)
1
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. Table 4. Package Type 8-Lead PDIP (P Suffix) 8-Lead SOIC (S Suffix)
1
Rating ±20 V ±20 V ±1 V ±10 mA Indefinite −40°C to +85°C −65°C to +150°C −65°C to +150°C 300°C
θJA1 103 158
θJC 43 43
Unit °C/W °C/W
θJA is specified for worst-case mounting conditions, that is, θJA is specified for device in socket for PDIP package; θJA is specified for device soldered to printed circuit board for SOIC package.
ESD CAUTION
For supply voltages less than ±20 V, the absolute maximum input voltage is equal to the supply voltage. 2 The inputs of the OP97 are protected by back-to-back diodes. Currentlimiting resistors are not used in order to achieve low noise. Differential input voltages greater than 1 V cause excessive current to flow through the input protection diodes unless limiting resistance is used.
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Rev. F | Page 5 of 16
OP97 TYPICAL PERFORMANCE CHARACTERISTICS
400 1894 UNITS VS = ±15V TA = 25°C VCM = 0V
INPUT CURRENT (pA)
60 TA = 25°C VCM = 0V 40 IB– 20 IB+
300
NUMBER OF UNITS
200
0
–20 IOS –40
100
00299-002
–20 0 20 INPUT OFFSET VOLTAGE (µV)
40
–50
–25
0 25 50 TEMPERATURE (°C)
75
100
125
Figure 2. Typical Distribution of Input Offset Voltage
Figure 5. Input Bias, Offset Current vs. Temperature
400 1920 UNITS VS = ±15V TA = 25°C VCM = 0V
INPUT CURRENT (pA)
60 TA = 25°C VS = ±15V 40 IB–
300
NUMBER OF UNITS
20 IB+
200
0 IOS –20
100
–40
00299-003
–50
0 50 INPUT BIAS CURRENT (pA)
100
–10
–5 0 5 COMMON-MODE VOLTAGE (V)
10
15
Figure 3. Typical Distribution of Input Bias Current
Figure 6. Input Bias, Offset Current vs. Common-Mode Voltage
500 1894 UNITS 400
NUMBER OF UNITS
±5
DEVIATION FROM FINAL VALUE (µV)
VS = ±15V TA = 25°C VCM = 0V
TA = 25°C VS = ±15V VCM = 0V
±4
300
±3
200
±2 J PACKAGES ±1 Z, P PACKAGES
100
00299-004
–40
–20 0 20 INPUT OFFSET CURRENT (pA)
40
60
0
1 2 3 4 TIME AFTER POWER APPLIED (Minutes)
5
Figure 4. Typical Distribution of Input Offset Current
Figure 7. Input Offset Voltage Warmup Drift
Rev. F | Page 6 of 16
00299-007
0 –60
0
00299-006
0 –100
–60 –15
00299-005
0 –40
–60 –75
OP97
1000
EFFECTIVE OFFSET VOLTAGE (µV)
BALANCED OR UNBALANCED VS = ±15V VCM = 0V
SUPPLY CURRENT (µA)
450 NO LOAD 425
100 –55°C ≤ TA ≤ +125°C TA = 25°C
400 TA = +125°C 375 TA = +25°C
10
350
TA = –55°C
325
00299-008
3k
10k
30k 100k 300k 1M SOURCE RESISTANCE (Ω)
3M
10M
0
5
10 SUPPLY VOLTAGE (±V)
15
20
Figure 8. Effective Offset Voltage vs. Source Resistance
Figure 11. Supply Current vs. Supply Voltage
100
EFFECTIVE OFFSET VOLTAGE DRIFT (µV/°C)
COMMON-MODE REJECTION (dB)
BALANCED OR UNBALANCED VS = ±15V VCM = 0V
140 120 100 80 60 40 20 0 TA = 25°C VS = ±15V VCM = ±10V
10
1
00299-009
10k
100k 1M SOURCE RESISTANCE (Ω)
10M
100M
1
10
100 1k 10k FREQUENCY (Hz)
100k
1M
Figure 9. Effective TCVOS vs. Source Resistance
Figure 12. Common-Mode Rejection vs. Frequency
20 15
SHORT-CIRCUIT CURRENT (mA)
140
TA = –55°C TA = +25°C
POWER SUPPLY REJECTION (dB)
120
TA = 25°C VS = ±15V ΔVS = 10V p-p
10 5 0 –5 –10 –15 –20 TA = +125°C VS = ±15V OUTPUT SHORTED TO GROUND TA = +125°C TA = +25°C TA = –55°C
00299-010
100 –PSR 80 +PSR 60
40
0
1 2 TIME FROM OUTPUT SHORT (Minutes)
3
1
10
100 1k FREQUENCY (Hz)
10k
100k
1M
Figure 10. Short-Circuit Current vs. Time, Temperature
Figure 13. Power Supply Rejection vs. Frequency
Rev. F | Page 7 of 16
00299-013
20 0.1
00299-012
0.1 1k
00299-011
1 1k
300
OP97
10k
DIFFERENTIAL INPUT VOLTAGE (10µV/DIV)
VS = ±15V VO = ±10V TA = –55°C
TA = +125°C
RL = 10kΩ VS = ±15V VCM = 0V
OPEN-LOOP GAIN (V/mV)
TA = +25°C 1k TA = +125°C
TA = +25°C
TA = –55°C
00299-014
100
1
2
5 LOAD RESISTANCE (kΩ)
10
20
–15
–10
–5 0 5 OUTPUT VOLTAGE (V)
10
15
Figure 14. Open-Loop Gain vs. Load Resistance
Figure 17. Open-Loop Gain Linearity
1k
VOLTAGE NOISE DENSITY (nV/ Hz)
TA = 25°C VS = ±2V TO ±20V
1k
35 30 TA = 25°C VS = ±15V AVCL = +1 1% THD fO = 1kHz
CURRENT NOISE DENSITY (fA/ Hz)
OUTPUT SWING (V p-p)
25 20 15 10 5
100 CURRENT NOISE
100
VOLTAGE NOISE 10 1/1 CORNER 2.5Hz 1/1 CORNER 120Hz 10
00299-015
1
1
10
100 FREQUENCY (Hz)
1 1k
100 1k LOAD RESISTANCE (Ω)
10k
Figure 15. Noise Density vs. Frequency
Figure 18. Maximum Output Swing vs. Load Resistance
10 TA = 25°C VS = ±2V TO ±20V
35 30 TA = 25°C VS = ±15V AVCL = +1 1% THD RL = 10kΩ
TOTAL NOISE DENSITY (µV/ Hz)
OUTPUT SWING (V p-p)
25 20 15 10 5
1 R R RS = 2R 0.1 10Hz 1kHz RESISTOR NOISE
00299-016
0.01 100
1k
10k 100k 1M SOURCE RESISTANCE (Ω)
10M
100M
1k
10k FREQUENCY (Hz)
100k
Figure 16. Total Noise Density vs. Source Resistance
Figure 19. Maximum Output Swing vs. Frequency
Rev. F | Page 8 of 16
00299-019
0 100
00299-018
0 10
00299-017
OP97
80 GAIN 60
OPEN-LOOP GAIN (dB)
80 TA = –55°C TA = +125°C PHASE TA = +125°C PHASE 60
PHASE SHIFT (Degrees)
TA = –55°C 90 135 TA = +125°C TA = –55°C 180 225 VS = ±15V CL = 20pF RL = 1MΩ 100pF OVERCOMPENSATION 1k 10k 100k FREQUENCY (Hz) 1M 10M
00299-023 00299-025
40 20 0
90 135 180
40 GAIN 20 0 –20 –40
TA = +125°C
TA = –55°C –20 –40 VS = ±15V CL = 20pF RL = 1MΩ 100pF OVERCOMPENSATION 1k 10k 100k FREQUENCY (Hz) 1M 10M 225
Figure 20. Open-Loop Gain, Phase vs. Frequency (COC = 0 pF)
00299-020
–60 100
–60 100
Figure 23. Open-Loop Gain, Phase vs. Frequency (COC = 100 pF)
10 TA = 25°C VS = ±15V RL = 10kΩ 1% THD VOUT = 3V rms SLEW RATE (V/µs)
1 RL = 10kΩ VS = ±15V CL = 100pF
1
TA = +125°C
0.1
TA = –55°C
THD + N (%)
0.1 AVCL = 100 0.01 AVCL = 10 0.001 AVCL = 1
00299-021
0.01
100 FREQUENCY (Ω)
1k
10k
1
10 100 1k OVERCOMPENSATION CAPACITOR (pF)
10k
Figure 21. Total Harmonic Distortion Plus Noise vs. Frequency
Figure 24. Slew Rate vs. Overcompensation
70 60 50
OVERSHOOT (%)
1000 TA = 25°C VS = ±15V AVCL = +1 VOUT = 100mV p-p COC = 0pF
TA = +125°C
GAIN BANDWIDTH (kHz)
+EDGE
TA = –55°C 100
40 30 20 10
–EDGE
10 VS = ±15V CL = 20pF RL = 1MΩ AV = 100
100 1k LOAD CAPACITANCE (pF)
10k
00299-022
0 10
1
1
10 100 1k OVERCOMPENSATION CAPACITOR (pF)
10k
Figure 22. Small Signal Overshoot vs. Capacitive Load
Figure 25. Gain Bandwidth Product vs. Overcompensation
Rev. F | Page 9 of 16
00299-024
0.0001 10
0.001
PHASE SHIFT (Degrees)
OPEN-LOOP GAIN (dB)
OP97
80 TA = –55°C 60
OPEN-LOOP GAIN (dB)
1k
TA = +25°C
TA = 25°C VS = ±15V 100
90 135 180
40 20 0
PHASE TA = –55°C GAIN TA = +125°C TA = +125°C
OUTPUT IMPEDANCE (Ω)
PHASE SHIFT (Degrees)
10 AVCL = 1000 1
0.1 AVCL = 1 0.01
–20 –40 –60 100 VS = ±15V CL = 20pF RL = 1MΩ 100pF OVERCOMPENSATION
225
00299-026
1k
10k 100k FREQUENCY (Hz)
1M
10M
1
10
100 1k FREQUENCY (Hz)
10k
100k
Figure 26. Open-Loop Gain, Phase vs. Frequency (COC = 1000 pF)
Figure 28. Closed-Loop Output Resistance vs. Frequency
80 60 PHASE 40 20 0 –20 –40 –60 100 GAIN
OPEN-LOOP GAIN (dB)
TA = –55°C TA = +25°C 90 TA = +125°C 135 180 TA = +125°C VS = ±15V CL = 20pF RL = 1MΩ 100pF OVERCOMPENSATION 1k 10k 100k FREQUENCY (Hz) TA = –55°C 225
PHASE SHIFT (Degrees)
1M
10M
Figure 27. Open-Loop Gain, Phase vs. Frequency (COC = 10,000 pF)
Rev. F | Page 10 of 16
00299-027
00299-028
0.001
OP97 APPLICATION INFORMATION
The OP97 is a low power alternative to the industry-standard precision op amp, the OP07. The OP97 can be substituted directly into OP07, OP77, AD725, and PM1012 sockets with improved performance and/or less power dissipation and can be inserted into sockets conforming to the 741 pinout if nulling circuitry is not used. Generally, nulling circuitry used with earlier generation amplifiers is rendered superfluous by the extremely low offset voltage of the OP97 and can be removed without compromising circuit performance. Extremely low bias current over the full military temperature range makes the OP97 attractive for use in sample-and-hold amplifiers, peak detectors, and log amplifiers that must operate over a wide temperature range. Balancing input resistances is not necessary with the OP97. Offset voltage and TCVOS are degraded only minimally by high source resistance, even when unbalanced. The input pins of the OP97 are protected against large differential voltage by back-to-back diodes. Current-limiting resistors are not used to maintain low noise performance. If differential voltages above ±1 V are expected at the inputs, series resistors must be used to limit the current flow to a maximum of 10 mA. Common-mode voltages at the inputs are not restricted and may vary over the full range of the supply voltages used. The OP97 requires very little operating headroom about the supply rails and is specified for operation with supplies as low as ±2 V. Typically, the common-mode range extends to within 1 V of either rail. The output typically swings to within 1 V of the rails when using a 10 kΩ load. Offset nulling is achieved utilizing the same circuitry as an OP07. A potentiometer between 5 kΩ and 100 kΩ is connected between Pin 1 and Pin 8 with the wiper connected to the positive supply. The trim range is between 300 μV and 850 μV, depending upon the internal trimming of the device.
+V
1 2 8 7 6 5 4
RPOT = 5kΩ TO 100kΩ
OP97
3
–V
Figure 29. Optional Input Offset Voltage Nulling and Overcompensation Circuit
Rev. F | Page 11 of 16
00299-029
COC
OP97 AC PERFORMANCE
The ac characteristics of the OP97 are highly stable over its full operating temperature range. Unity-gain small-signal response is shown in Figure 30. Extremely tolerant of capacitive loading on the output, the OP97 displays excellent response even with 1000 pF loads (see Figure 31). In large signal applications, the input protection diodes effectively short the input to the output during the transients if the amplifier is connected in the usual unity-gain configuration. The output enters short-circuit current limit, with the flow going through the protection diodes. Improved large signal transient response is obtained by using a feedback resistor between the output and the inverting input. Figure 32 shows the large-signal response of the OP97 in unitygain with a 10 kΩ feedback resistor. The unity-gain follower circuit is shown in Figure 33. The overcompensation pin (Pin 5) can be used to increase the phase margin of the OP97 or to decrease gain bandwidth product at gains greater than 10.
VIN
100 90
10 0%
2V
20µs
Figure 32. Large Signal Transient Response (AVCL = 1)
10kΩ 2
00299-033
3
OP97
6
VOUT
Figure 33. Unity-Gain Follower
100 90
100 90
10 0% 00299-030
20mV
5µs
Figure 30. Small Signal Transient Response (CLOAD = 100 pF, AVCL = 1)
10 0%
20mV
5µs
Figure 34. Small Signal Transient Response with Overcompensation (CLOAD = 1000 pF, AVCL = 1, COC = 220 pF)
100 90
10 0% 00299-031
20mV
5µs
Figure 31. Small-Signal Transient Response (CLOAD = 1000 pF, AVCL = 1)
Rev. F | Page 12 of 16
00299-034
00299-032
OP97 GUARDING AND SHIELDING
To maintain the extremely high input impedances of the OP97, care must be taken in circuit board layout and manufacturing. Board surfaces must be kept scrupulously clean and free of moisture. Conformal coating is recommended to provide a humidity barrier. Even a clean PCB can have 100 pA of leakage currents between adjacent traces; therefore, use guard rings around the inputs. Guard traces are operated at a voltage close to that on the inputs, so that leakage currents are minimal. In noninverting applications, connect the guard ring to the commonmode voltage at the inverting input (Pin 2). In inverting applications, both inputs remain at ground, so that the guard trace should be grounded. Make guard traces on both sides of the circuit board. High impedance circuitry is extremely susceptible to RF pickup, line frequency hum, and radiated noise from switching power supplies. Enclosing sensitive analog sections within grounded shields is generally necessary to prevent excessive noise pickup. Twisted-pair cable aid in rejection of line frequency hum. The OP97 is an excellent choice as an output amplifier for higher resolution CMOS DACs. Its tightly trimmed offset voltage and minimal bias current result in virtually no degradation of linearity, even over wide temperature ranges. Figure 36 shows a versatile monitor circuit that can typically sense current at any point between the ±15 V supplies. This makes it ideal for sensing current in applications such as full bridge drivers where bidirectional current is associated with large common-mode voltage changes. The 114 dB CMRR of the OP97 makes the contribution of the amplifier to commonmode error negligible, leaving only the error due to the resistor ratio inequality. Ideally, R2/R4 = R3/R5.
R1 10kΩ R5 10kΩ +15V 2 7 IL RL
V1 R2 10kΩ
R3 10kΩ
3
OP97
4 –15V
6
VOUT
00299-036
RFB
30pF IO 2
R4 10kΩ
AD7548
IO DIGITAL INPUTS
3
OP97
6
VOUT
Figure 36. Current Monitor
Figure 35. DAC Output Amplifier
UNITY-GAIN FOLLOWER 2
00299-035
NONINVERTING AMPLIFIER 2
3
OP97
6 3
OP97
6
INVERTING AMPLIFIER 8 2 6
PDIP BOTTOM VIEW 1
3
OP97
Figure 37. Guard Ring Layout and Connections
Rev. F | Page 13 of 16
00299-037
OP97
The digitally programmable gain amplifier shown in Figure 38 has 12-bit gain resolution with 10-bit gain linearity over the range of −1 to −1024. The low bias current of the OP97 maintains this linearity, while C1 limits the noise voltage bandwidth, allowing accurate measurement down to microvolt levels. Table 5.
DIGITAL IN 4095 2048 1024 512 256 128 64 32 16 8 4 2 1 0 GAIN (Av) −1.00024 −2 −4 −8 −16 −32 −64 −128 −256 −512 −1024 −2048 −4096 Open Loop
+15V VIN ±2.5mV TO ±10V RANGE DEPENDING ON GAIN SETTING 1 2 3 IOUT1 IOUT2 18 RFB VREF 17 16 0.1µF
AD7541A
C1 220pF
+15V
2
0.1µF
3
OP97
6
VOUT
0.1µF –15V
Figure 38. Precision Programmable Gain Amplifier
R2 20kΩ 5pF R1 2kΩ 10kΩ 2 1µF 10kΩ 3 6
VIN
2
AD8610
6
VOUT
Many high speed amplifiers suffer from less-than-perfect low frequency performance. A combination amplifier consisting of a high precision, slow device like the OP97 and a faster device such as the AD8610 results in uniformly accurate performance from dc to the high frequency limit of the AD8610, which has a gainbandwidth product of 25 MHz. The circuit shown in Figure 39 accomplishes this, with the AD8610 providing high frequency amplification and the OP97 operating on low frequency signals and providing offset correction. Offset voltage and drift of the circuit are controlled by the OP97.
100 90
3 0.1µF
OP97
5
AV = –
R2 R1
0.1µF
00299-039
Figure 39. Combination High Speed, Precision Amplifier
5V
10 0% 00299-040
1V
2µs
Figure 40. Combination Amplifier Transient Response
Rev. F | Page 14 of 16
00299-038
OP97 OUTLINE DIMENSIONS
0.400 (10.16) 0.365 (9.27) 0.355 (9.02)
8 1 5
4
0.280 (7.11) 0.250 (6.35) 0.240 (6.10)
0.100 (2.54) BSC 0.210 (5.33) MAX 0.150 (3.81) 0.130 (3.30) 0.115 (2.92) 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) 0.070 (1.78) 0.060 (1.52) 0.045 (1.14)
0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.060 (1.52) MAX 0.195 (4.95) 0.130 (3.30) 0.115 (2.92)
0.015 (0.38) MIN SEATING PLANE 0.005 (0.13) MIN
0.015 (0.38) GAUGE PLANE 0.430 (10.92) MAX
0.014 (0.36) 0.010 (0.25) 0.008 (0.20)
COMPLIANT TO JEDEC STANDARDS MS-001 CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 41. 8-Lead Plastic Dual In-Line Package [PDIP] P-Suffix (N-8) Dimensions shown in inches and (millimeters)
5.00 (0.1968) 4.80 (0.1890)
4.00 (0.1574) 3.80 (0.1497)
8 1
5 4
6.20 (0.2441) 5.80 (0.2284)
1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) COPLANARITY 0.10 SEATING PLANE
1.75 (0.0688) 1.35 (0.0532)
0.50 (0.0196) 0.25 (0.0099) 8° 0° 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157)
45°
0.51 (0.0201) 0.31 (0.0122)
COMPLIANT TO JEDEC STANDARDS MS-012-A A CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 42. 8-Lead Standard Small Outline Package [SOIC] Narrow Body S-Suffix (R-8) Dimensions shown in millimeters and (inches)
Rev. F | Page 15 of 16
012407-A
070606-A
OP97
ORDERING GUIDE
Model OP97EP OP97EPZ 1 OP97FP OP97FPZ1 OP97FS OP97FS-REEL OP97FS-REEL7 OP97FSZ1 OP97FSZ-REEL1 OP97FSZ-REEL71
1
Temperature Range –40°C to +85°C –40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C
Package Description 8-Lead PDIP 8-Lead PDIP 8-Lead PDIP 8-Lead PDIP 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC
Package Option N-8 N-8 N-8 N-8 R-8 R-8 R-8 R-8 R-8 R-8
Z = RoHS Compliant Part.
©1997–2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D00299-0-11/07(F)
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