a
FEATURES
High Common-Mode Rejection
DC: 90 dB typ
60 Hz: 90 dB typ
20 kHz: 85 dB typ
Ultralow THD: 0.0006% typ @ 1 kHz
Fast Slew Rate: 10 V/ms typ
Wide Bandwidth: 7 MHz typ (G = 1/2)
Two Gain Levels Available: G = 1/2 or 2
Low Cost
–6 dB Differential
Line Receiver
SSM2143
FUNCTIONAL BLOCK DIAGRAM
12k Ω
6k Ω
SENSE
–IN
V+
VOUT
V–
12k Ω
6kΩ
REFERENCE
+IN
SSM2143
PIN CONNECTIONS
GENERAL DESCRIPTION
The SSM2143 is an integrated differential amplifier intended to
receive balanced line inputs in audio applications requiring a
high level of immunity from common-mode noise. The device
provides a typical 90 dB of common-mode rejection (CMR),
which is achieved by laser trimming of resistances to better than
0.005%.
Additional features of the device include a slew rate of 10 V/µs
and wide bandwidth. Total harmonic distortion (THD) is less
than 0.004% over the full audio band, even while driving low
impedance loads. The SSM2143 input stage is designed to
handle input signals as large as +28 dBu at G = 1/2. Although
primarily intended for G = 1/2 applications, a gain of 2 can be
realized by reversing the +IN/–IN and SENSE/REFERENCE
connections.
Epoxy Mini-DIP (P Suffix)
and
SOIC (S Suffix)
REF
1
–IN
2
SSM2143
+IN
3
TOP VIEW
(NOT TO SCALE)
V–
4
8 NC
OP-482
7 V+
6 VOUT
5 SENSE
NC = NO CONNECT
When configured for a gain of 1/2, the SSM2143 and SSM2142
Balanced Line Driver provide a fully integrated, unity gain
solution to driving audio signals over long cable runs. For
similar performance with G = 1, see SSM2141.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 781/461-3113
= 615 V, –408C ≤ T ≤ +858C, G = 1/2, unless otherwise noted.
SSM2143–SPECIFICATIONS (VTypical
specifications apply at T = +258C)
S
A
A
Parameter
Symbol
Conditions
AUDIO PERFORMANCE
Total Harmonic Distortion Plus Noise
Signal-to-Noise Ratio
Headroom
THD+N
SNR
HR
VIN = 10 V rms, RL = 10 kΩ, f = 1 kHz
0 dBu = 0.775 V rms, 20 kHz BW, RTI
Clip Point = 1% THD+N
DYNAMIC RESPONSE
Slew Rate
Small Signal Bandwidth
SR
BW–3 dB
RL = 2 kΩ, CL = 200 pF
RL = 2 kΩ, CL = 200 pF
G = 1/2
G=2
6
VCM = 0 V, RTI, G = 2
VCM = ± 10 V, RTO
f = dc
f = 60 Hz
f = 20 kHz
f = 400 kHz
VS = ± 6 V to ± 18 V
Common Mode
Differential
–1.2
0.05
70
90
90
85
60
110
± 15
± 28
dB
dB
dB
dB
dB
V
V
± 13
± 14
2
300
+45, –20
V
kΩ
pF
mA
–0.1
0.03
INPUT
Input Offset Voltage
Common-Mode Rejection
Power Supply Rejection
Input Voltage Range
OUTPUT
Output Voltage Swing
Minimum Resistive Load Drive
Maximum Capacitive Load Drive
Short Circuit Current Limit
VIOS
CMR
PSR
IVR
VO
RL = 2 kΩ
Min
90
ISC
GAIN
Gain Accuracy
REFERENCE INPUT
Input Resistance
Voltage Range
POWER SUPPLY
Supply Voltage Range
Supply Current
Typ
Max
0.0006
–107.3
+28.0
%
dBu
dBu
10
V/µs
7
3.5
MHz
MHz
+1.2
0.1
18
± 10
VS
ISY
VCM = 0 V, RL = ∞
±6
Units
± 2.7
mV
%
kΩ
V
± 18
± 4.0
V
mA
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V
Common-Mode Input Voltage . . . . . . . . . . . . . . . . . . . . ± 22 V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . ± 44 V
Output Short Circuit Duration . . . . . . . . . . . . . . .Continuous
Operating Temperature Range . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . +150°C
Lead Temperature (Soldering, 60 sec) . . . . . . . . . . . . +300°C
Thermal Resistance
8-Pin Plastic DIP (P): θJA = 103, θJC = 43 . . . . . . . . . °C/W
8-Pin SOIC (S): θJA = 150, θJC = 43. . . . . . . . . . . . . . °C/W
–2–
REV. A
SSM2143
1µs
100
100
90
90
10
10
0%
0%
5V
50mV
5µs
Figure 1. Small-Signal Transient Response (VIN = ±200 mV,
G = 1/2, RL = 2 kΩ, VS = ± 15 V, TA = +25 °C)
Figure 2. Large Signal Transient Response (VIN = +24 dBu,
G = 1/2, RL = 2 kΩ VS = ± 15 V, TA = +25 °C)
Figure 3. THD+N vs. Frequency (VS = ± 15 V,
VIN = 10 V rms, with 80 kHz Filter)
Figure 4. Headroom (VS = ± 15 V, RL = 10 kΩ,
with 80 kHz Filter)
1.0
THD+N – %
0.1
0.01
0.001
0.0001
100
1k
10k
100k
LOAD RESISTANCE – Ω
Figure 6. THD+N vs. Load (VS = ± 15 V, VIN = 10 V rms, with
1 kHz Sine, 80 kHz Filter)
Figure 5. Dynamic Intermodulation Distortion, DIM-100
(VS = ± 15 V, RL = 100 kΩ)
REV. A
–3–
SSM2143
40
VS = ±15V
TA = +25°C
CLOSED-LOOP GAIN – dB
30
VS = ±15V
TA = +25°C
20
10
0
–10
–20
–30
100
1k
10k
100k
1M
10M
FREQUENCY – Hz
Figure 7. Closed-Loop Gain vs. Frequency, 20 Hz to 20 kHz
(Gain of 1/2 Normalized to 0 dB)
Figure 8. Closed-Loop Gain vs. Frequency, 100 Hz to
10 MHz
180
120
135
COMMON-MODE REJECTION – dB
TA = +25°C
VS = ±15V
RL = 2kΩ
PHASE – Degrees
90
45
0
–45
–90
VS = ±15V
TA = +25°C
100
80
60
40
20
–135
–180
100
1k
10k
100k
FREQUENCY – Hz
1M
0
100
10M
10k
100k
1M
FREQUENCY – Hz
Figure 9. Closed-Loop Phase vs. Frequency
Figure 10. Common-Mode Rejection vs. Frequency
140
10
VS = ±15V
TA = +25°C
VS = ±15V
TA = +25°C
120
8
OUTPUT IMPEDANCE – Ω
POWER SUPPLY REJECTION – dB
1k
100
80
–PSRR
60
+PSRR
40
6
4
2
20
0
10
100
1k
10k
FREQUENCY – Hz
100k
0
100
1M
1k
10k
100k
1M
FREQUENCY – Hz
Figure 11. Power Supply Rejection vs. Frequency
Figure 12. Closed-Loop Output Impedance vs. Frequency
–4–
REV. A
SSM2143
12.5V
TA = +25°C
VS = ±15V
G = 1/2
RL = 2kΩ
5
OUTPUT VOLTAGE SWING – V rms
OUTPUT VOLTAGE SWING – V rms
6
4
3
2
1
TA = +25°C
VS = ±15V
10.0V
7.5V
5.0V
2.5V
0
10k
1k
100k
1M
0V
10
10M
100
FREQUENCY – Hz
1k
Figure 13. Output Voltage Swing vs. Frequency
Figure 14. Output Voltage Swing vs. Load Resistance
40
120
VOLTAGE NOISE DENSITY – nV/ Hz
TA = +25°C
OUTPUT VOLTAGE SWING – V p–p
10k
LOAD RESISTANCE – Ω
30
20
10
0
0
±5
±10
±15
VS = ±15V
100
TA = +25°C
80
60
40
20
0
±20
1
SUPPLY VOLTAGE
Figure 15. Output Voltage Swing vs. Supply Voltage
10
100
FREQUENCY – Hz
1k
Figure 16. Voltage Noise Density vs. Frequency
1s
10ms
100
100
90
90
0.5µV
5µV
0V
0V
–0.5µV
–5µV
10
10
0%
0%
5mV
5mV
Figure 17. Low Frequency Voltage Noise from 0.1 Hz
to 10 Hz*
Figure 18. Voltage Noise from 0 kHz to 1 kHz*
*The photographs in Figure 17 through Figure 19 were taken at V S = ± 15 V and T A = +25°C, using an external amplifier with a gain of 1000.
REV. A
10k
–5–
SSM2143
16
VS = ±15V
R L = 2kΩ
1ms
14
SLEW RATE – V/µs
100
90
5µV
0V
–5µV
12
10
8
10
6
0%
5mV
4
–50
Figure 19. Voltage Noise from 0 kHz to 10 kHz*
–25
0
50
25
TEMPERATURE – °C
400
VS = ±15V
0.08
INPUT OFFSET VOLTAGE – µV
VS = ±15V
VIN = ±10V
R S = 0Ω
0.06
0.04
0.02
0
–50
–25
25
50
0
TEMPERATURE – °C
75
300
200
100
0
–50
100
–25
0
25
50
75
100
TEMPERATURE – °C
Figure 21. Gain Error vs. Temperature
Figure 22. Input Offset Voltage vs. Temperature
5
4.0
VS = ±15V
TA = +25°C
3.5
SUPPLY CURRENT– mA
4
SUPPLY CURRENT – mA
100
Figure 20. Slew Rate vs. Temperature
0.10
GAIN ERROR – %
75
3
2
3.0
2.5
2.0
1
1.5
0
–50
–25
0
50
25
TEMPERATURE – °C
1.0
75
100
0
Figure 23. Supply Current vs. Temperature
±5
±10
±15
SUPPLY VOLTAGE – V
±20
Figure 24. Supply Current vs. Supply Voltage
*The photographs in Figure 17 through Figure 19 were taken at V S = ± 15 V and T A = +25°C, using an external amplifier with a gain of 1000.
–6–
REV. A
SSM2143
Setting ∆R to 5 Ω results in the CMRR of 71 dB, as stated
above. To achieve the SSM2143’s CMRR of 90 dB, the resistor
mismatch can be at most 0.57 Ω. In other words, to build this
circuit discretely, the resistors would have to be matched to
better than 0.005%!
APPLICATIONS INFORMATION
The SSM2143 is designed as a balanced differential line receiver. It uses a high speed, low noise audio amplifier with four
precision thin-film resistors to maintain excellent common-mode
rejection and ultralow THD. Figure 25 shows the basic differential receiver application where the SSM2143 yields a gain of 1/2.
The placement of the input and feedback resistors can be
switched to achieve a gain of +2, as shown in Figure 26. For
either circuit configuration, the SSM2143 can also be used unbalanced by grounding one of the inputs. In applications requiring a gain of +1, use the SSM2141.
+15V
7
12k
–IN
2
7
A V =1
2
6k
6k
6
+
SSM2143
6k
+IN 1
1
3
CMRR
5%
1%
0.1%
0.005%
30 dB
44 dB
64 dB
90 dB
The reference node of the SSM2143 is normally connected to
ground. However, it can be used to null out any dc offsets in
the system or to introduce a dc reference level other than
ground. As shown in Figure 28, the reference node needs to be
6
VOUT
12k
% Mismatch
DC OUTPUT LEVEL ADJUST
AV = 2
12k
2
VOUT
6k
12k
0.1µF
–IN 5
5
SSM2143
+IN
+15V
0.1µF
The following table shows typical resistor accuracies and the
resulting CMRR for a differential amplifier.
3
+15V
4
4
0.1µF
0.1µF
+10V
0.1µF
OP27
–15V
–15V
12k
7
6k
–IN 2
5
–10V
Figure 26. Reversing the
Resistors Results in a
Gain of 2
Figure 25. Standard Configuration for Gain of 1/2
12k
VOUT
6
SSM2143
6k
+IN 3
REFERENCE
1
CMRR
4
0.1µF
The internal thin-film resistors are precisely trimmed to achieve
a CMRR of 90 dB. Any imbalances introduced by the external
circuitry will cause a significant reduction in the overall CMRR
performance. For example, a 5 Ω source imbalance will result in
a CMRR of 71 dB at dc. This is also true for any reactive source
impedances that may affect the CMRR over the audio frequency
range. These error sources need to be minimized to maintain
the excellent CMRR.
–15V
Figure 28. A Low Impedance Buffer Is Required to Adjust
the Reference Voltage.
buffered with an op amp to maintain very low impedance to
achieve high CMRR. The same reasoning as above applies such
that the 6 kΩ resistor has to be matched to better than 0.005%
or 0.3 Ω. The op amp maintains very low output impedance
over the entire audio frequency range, as long as its bandwidth
is well above 20 kHz. The reference input can be adjusted over
a ± 10 V range. The gain from the reference to the output is
unity so the resulting dc output adjustment range is also ± 10 V.
To quantify the required accuracy of the thin film resistor
matching, the source of CMRR error can be analyzed. A resistor
mismatch can be modelled as shown in Figure 27. By assuming
a tolerance on one of the 12 kΩ resistors of ∆R, the equation for
the common-mode gain becomes:
VOUT
6k
6k
6k
=
+1 –
V IN
6k +12k 12k + ∆R 12k + ∆R
INPUT ERRORS
The main dc input offset error specified for the SSM2143 is the
Input Offset Voltage. The Input Bias Current and Input Offset
Current are not specified as for a normal operational amplifier.
Because the SSM2143 has built-in resistors, any bias current
related errors are converted into offset voltage errors. Thus, the
offset voltage specification is a combination of the amplifier’s
offset voltage plus its offset current times the input impedance.
which reduces to:
VOUT
1/3 ∆R
=
VIN
12k + ∆R
This gain error leads to a common-mode rejection ratio of:
CMRR =
+18V
|ADM| 18k
≅
|ACM| ∆R
+18V
ALL CABLE MEASUREMENTS USE
BELDEN CABLE (500').
0.1µF
6
6k
VIN
4
12k + ∆R
7
SSM2142
–IN
2
2
1
8
12k
VOUT
7
5
+IN
6k
3
CMRR =
18k
∆R
3
5
SSM2143
4
1
6
0.1µF
–18V
–18V
Figure 27. A Small Mismatch in Resistance Results in a
Large Common-Mode Error
REV. A
Figure 29. SSM2142/SSM2143 Balanced Line Driver/
Receiver System
–7–
VOUT
SSM2143
LINE DRIVER/RECEIVER SYSTEM
The SSM2143 and SSM2142 provide a fully integrated line driver/
receiver system. The SSM2142 is a high performance balanced
line driver IC that converts an unbalanced input into a balanced
output signal. It can drive large capacitive loads on long cables
making it ideal for transmitting balanced audio signals. When combined with an SSM2143 on the receiving end of the cable, the system maintains high common-mode rejection and ultralow THD.
The SSM2142 is designed with a gain of +2 and the SSM2143
with a gain of 1/2, providing an overall system gain of unity.
The following data demonstrates the typical performance of the
two parts together, measured on an Audio Precision at the
SSM2143’s output. This configuration was tested with 500 feet
of cable between the ICs as well as no cable. The combination
of the two parts results in excellent THD+N and SNR and a noise
floor of typically –105 dB over a 20 Hz to 20 kHz bandwidth.
A comment on SSM2142/SSM2143 system headroom is necessary. Figure 31 shows a maximum signal handling of approximately
±22 dBu, but it must be kept in mind that this is measured between the SSM2142’s input and SSM2143’s output, which has
been attenuated by one half. Normally, the system would be shown
as actually used in a piece of equipment, whereby the SSM2143 is
at the input and SSM2142 at the output. In this case, the system
could handle differential signals in excess of +24 dBu at the input
and output, which is consistent with headroom requirements of
most professional audio equipment.
500' CABLE
NO CABLE
Figure 30. THD+N vs. Frequency of SSM2142/SSM2143
System (VS = ± 18 V, VIN = 5 V rms, with 80 kHz Filter)
Figure 33. SSM2142/SSM2143 System Frequency
Response (VS = ± 18 V, VIN = 0 dBV, 500' Cable)
5V
100
90
10
0%
Figure 34. SSM2142/SSM2143 System Large Signal Pulse
Response (VS = ± 18 V, RL = 10 kΩ, No Cable)
500' CABLE
NO CABLE
Figure 32. SSM2142/SSM2143 System
DIM-100 Dynamic Intermodulation
Distortion (VS = ± 18 V, RL = 10 kΩ)
–8–
REV. A
PRINTED IN U.S.A.
10µs
Figure 31. SSM2142/SSM2143 System Headroom–
See Text—(VS = ± 18 V, RL = 10 kΩ, 500' Cable)
SSM2143
OUTLINE DIMENSIONS
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
8
5
1
4
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.100 (2.54)
BSC
0.060 (1.52)
MAX
0.210 (5.33)
MAX
0.015
(0.38)
MIN
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
SEATING
PLANE
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.015 (0.38)
GAUGE
PLANE
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
0.430 (10.92)
MAX
0.005 (0.13)
MIN
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
070606-A
COMPLIANT TO JEDEC STANDARDS MS-001
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 35. 8-Lead Plastic Dual In-Line Package [PDIP]
Narrow Body
(N-8)
Dimensions shown in inches and (millimeters)
5.00 (0.1968)
4.80 (0.1890)
1
5
4
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0040)
COPLANARITY
0.10
SEATING
PLANE
6.20 (0.2441)
5.80 (0.2284)
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.31 (0.0122)
0.50 (0.0196)
0.25 (0.0099)
8°
0°
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 36. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
REV. A
–9–
45°
012407-A
8
4.00 (0.1574)
3.80 (0.1497)
SSM2143
ORDERING GUIDE
Model1
SSM2143PZ
SSM2143SZ
SSM2143SZ-REEL
1
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
Package Description
8-Lead PDIP
8-Lead SOIC_N
8-Lead SOIC_N
Package Option
N-8
R-8
R-8
Z = RoHS Compliant Part
REVISION HISTORY
6/11—Rev. 0 to Rev. A
Updated Outline Dimensions ......................................................... 9
Changes to Ordering Guide .......................................................... 10
11/91—Revision 0: Initial Version
©1991–2011 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D10010-0-6/11(A)
–10–
REV. A
工商网监
湘ICP备2023018690号
