SSM2335CBZ-REEL

Filterless, High Efficiency, Mono 3 W Class-D Audio Amplifier SSM2335 FEATURES Filterless Class-D amplifier with Σ-Δ modulation No sync necessary when using multiple Class-D amplifiers from Analog Devices, Inc. 3 W into 3 Ω load and 1.4 W into 8 Ω load at 5.0 V supply with 96 dB signal-to-noise ratio (SNR) Single-supply operation from 2.5 V to 5.5 V 20 nA ultralow shutdown current Short-circuit and thermal protection Available in 9-ball, 1.5 mm × 1.5 mm WLCSP Pop-and-click suppression Built-in resistors reduce board component count Default fixed 18 dB or user-adjustable gain setting The SSM2335 features a high efficiency, low noise modulation scheme that requires no external LC output filters. The modulation continues to provide high efficiency even at low output power. It operates with 93% efficiency at 1.4 W into 8 Ω or 85% efficiency at 3 W into 3 Ω from a 5.0 V supply and has an SNR of >96 dB. Spread-spectrum pulse density modulation is used to provide lower EMI-radiated emissions compared with other Class-D architectures. The SSM2335 has a micropower shutdown mode with a typical shutdown current of 20 nA. Shutdown is enabled by applying a logic low to the SD pin. The device also includes pop-and-click suppression circuitry. This suppression circuitry minimizes voltage glitches at the output during turn-on and turn-off, reducing audible noise on activation and deactivation. The fully differential input of the SSM2335 provides excellent rejection of common-mode noise on the input. Input coupling capacitors can be omitted if the input dc common-mode voltage is approximately VDD/2. The default gain of the SSM2335 is 18 dB, but users can reduce the gain by using a pair of external resistors (see the Gain section). The SSM2335 is specified over the industrial temperature range of −40°C to +85°C. It has built-in thermal shutdown and output short-circuit protection. It is available in a 9-ball, 1.5 mm × 1.5 mm wafer level chip scale package (WLCSP). APPLICATIONS Mobile phones MP3 players Portable gaming Portable electronics Educational toys GENERAL DESCRIPTION The SSM2335 is a fully integrated, high efficiency, Class-D audio amplifier. It is designed to maximize performance for mobile phone applications. The application circuit requires a minimum of external components and operates from a single 2.5 V to 5.5 V supply. It is capable of delivering 3 W of continuous output power with 100 44 96 Min Typ Max Unit Efficiency Total Harmonic Distortion + Noise Input Common-Mode Voltage Range Common-Mode Rejection Ratio Average Switching Frequency Differential Output Offset Voltage POWER SUPPLY Supply Voltage Range Power Supply Rejection Ratio Supply Current η THD + N VCM CMRRGSM fSW VOOS VDD PSRRDC PSRRGSM ISY 1.48 0.75 1.84 0.94 2.72 1.38 3.40 2 1.72 3.432 1.72 4.282 2.14 93 0.01 0.01 VDD − 1.0 W W W W W W W W W W W W % % % V dB kHz mV V dB dB mA mA mA mA mA mA nA dB kΩ V V ms μs kΩ μV rms dB Shutdown Current GAIN CONTROL Closed-Loop Gain Differential Input Impedance SHUTDOWN CONTROL Input Voltage High Input Voltage Low Turn-On Time Turn-Off Time Output Impedance NOISE PERFORMANCE Output Voltage Noise Signal-to-Noise Ratio 1 2 ISD Gain ZIN VIH VIL tWU tSD ZOUT en SNR SD = VDD ISY ≥ 1 mA ISY ≤ 300 nA SD rising edge from GND to VDD SD falling edge from VDD to GND SD = GND VDD = 3.6 V, f = 20 Hz to 20 kHz, inputs are ac-grounded, gain = 18 dB, A-weighted PO = 1.4 W, RL = 8 Ω Although the SSM2335 has good audio quality above 3 W, continuous output power beyond 3 W must be avoided due to device packaging limitations. This value represents measured performance; packaging limitations must not be exceeded. Rev. 0 | Page 3 of 16 SSM2335 ABSOLUTE MAXIMUM RATINGS Absolute maximum ratings apply at 25°C, unless otherwise noted. Table 2. Parameter Supply Voltage Input Voltage Common-Mode Input Voltage Continuous Output Power Storage Temperature Range Operating Temperature Range Junction Temperature Range Lead Temperature (Soldering, 60 sec) ESD Susceptibility Rating 6V VDD VDD 3W −65°C to +150°C −40°C to +85°C −65°C to +165°C 300°C 2.5 kV THERMAL RESISTANCE θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. Table 3. Thermal Resistance Package Type 9-Ball, 1.5 mm × 1.5 mm WLCSP PCB 1S0P 2S0P θJA 162 76 θJB 39 21 Unit °C/W °C/W ESD CAUTION Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. 0 | Page 4 of 16 SSM2335 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS BALL A1 CORNER 1 A 2 3 B C SSM2335 07551-002 TOP VIEW BALL SIDE DOWN (Not to Scale) Figure 2. Pin Configuration Table 4. Pin Function Descriptions Pin No. 1A 1B 1C 2A 2B 2C 3A 3B 3C Mnemonic IN+ VDD IN− GND PVDD SD OUT− GND OUT+ Description Noninverting Input. Power Supply. Inverting Input. Ground. Power Supply. Shutdown Input. Active low digital input. Inverting Output. Ground. Noninverting Output. Rev. 0 | Page 5 of 16 SSM2335 TYPICAL PERFORMANCE CHARACTERISTICS 100 RL= 8Ω, 33µH GAIN = 18dB fIN = 1kHz 100 VDD = 2.5V 10 RL = 8Ω, 33µH GAIN = 18dB VDD = 5V 10 VDD = 3.6V THD + N (%) THD + N (%) 1 1 0.5W 0.1 1W 0.01 0.25W 0.1 VDD = 5V 0.01 07551-003 0.001 0.01 0.1 1 10 10 100 1k FREQUENCY (Hz) 10k 100k OUTPUT POWER (W) Figure 3. THD + N vs. Output Power into 8 Ω + 33 μH, Gain = 18 dB 100 Figure 6. THD + N vs. Frequency, VDD = 5 V, RL = 8 Ω + 33 μH, Gain = 18 dB 100 RL= 4Ω, 33µH GAIN = 18dB fIN = 1kHz VDD = 2.5V 10 RL = 4Ω, 33µH GAIN = 18dB VDD = 5V 10 VDD = 3.6V THD + N (%) 0.1 THD + N (%) 1 1 0.1 2W 0.5W 0.01 VDD = 5V 0.01 1W 07551-004 0.001 0.01 0.1 1 10 10 100 1k FREQUENCY (Hz) 10k 100k OUTPUT POWER (W) Figure 4. THD + N vs. Output Power into 4 Ω + 33 μH, Gain = 18 dB 100 Figure 7. THD + N vs. Frequency, VDD = 5 V, RL = 4 Ω + 33 μH, Gain = 18 dB 100 RL = 3Ω, 33µH GAIN = 18dB fIN = 1kHz VDD = 2.5V RL = 3Ω, 33µH GAIN = 18dB VDD = 5V 10 VDD = 3.6V 10 THD + N (%) THD + N (%) 1 1 3W 0.1 0.1 1.5W 0.01 VDD = 5V 0.01 0.75W 07551-005 0.001 0.01 0.1 1 10 10 100 1k FREQUENCY (Hz) 10k 100k OUTPUT POWER (W) Figure 5. THD + N vs. Output Power into 3 Ω + 33 μH, Gain = 18 dB Figure 8. THD + N vs. Frequency, VDD = 5 V, RL = 3 Ω + 33 μH, Gain = 18 dB Rev. 0 | Page 6 of 16 07551-008 0.001 0.0001 0.001 07551-007 0.001 0.0001 0.001 07551-006 0.001 0.0001 0.001 SSM2335 100 RL = 8Ω, 33µH GAIN = 18dB VDD = 3.6V 100 RL = 8Ω, 33µH GAIN = 18dB VDD = 2.5V 10 10 THD + N (%) 0.1 0.5W 0.01 0.125W THD + N (%) 1 1 0.1 0.25W 0.0625W 0.01 10 100 1k FREQUENCY (Hz) 10k 100k 10 100 1k FREQUENCY (Hz) 10k 100k Figure 9. THD + N vs. Frequency, VDD = 3.6 V, RL = 8 Ω + 33 μH, Gain = 18 dB 100 Figure 12. THD + N vs. Frequency, VDD = 2.5 V, RL = 8 Ω + 33 μH, Gain = 18 dB 100 RL = 4Ω, 33µH GAIN = 18dB VDD = 3.6V RL = 4Ω, 33µH GAIN = 18dB VDD = 2.5V 10 10 THD + N (%) 0.1 THD + N (%) 1 1 1W 0.5W 0.1 0.5W 0.01 0.01 0.125W 07551-010 100 1k FREQUENCY (Hz) 10k 100k 10 100 1k FREQUENCY (Hz) 10k 100k Figure 10. THD + N vs. Frequency, VDD = 3.6 V, RL = 4 Ω + 33 μH, Gain = 18 dB 100 Figure 13. THD + N vs. Frequency, VDD = 2.5 V, RL = 4 Ω + 33 μH, Gain = 18 dB 100 RL = 3Ω, 33µH GAIN = 18dB VDD = 3.6V RL = 3Ω, 33µH GAIN = 18dB VDD = 2.5V 10 10 THD + N (%) THD + N (%) 1 1.5W 1 0.75W 0.1 0.375W 0.01 0.1 0.75W 0.01 0.375W 0.188W 0.001 10 07551-011 10 100 1k FREQUENCY (Hz) 10k 100k 100 1k FREQUENCY (Hz) 10k 100k Figure 11. THD + N vs. Frequency, VDD = 3.6 V, RL = 3 Ω + 33 μH, Gain = 18 dB Figure 14. THD + N vs. Frequency, VDD = 2.5 V, RL = 3 Ω + 33 μH, Gain = 18 dB Rev. 0 | Page 7 of 16 07551-014 0.001 07551-013 0.001 10 0.25W 0.001 0.25W 07551-012 07551-009 0.001 0.25W 0.001 0.125W SSM2335 3.8 3.6 RL = 4Ω, 33µH 3.4 4.5 4.0 3.5 RL = 3Ω, 33µH GAIN = 18dB f = 1kHz SUPPLY CURRENT (mA) OUTPUT POWER (W) 3.0 2.5 2.0 1% 1.5 1.0 0.5 10% 3.2 3.0 RL = 8Ω, 33µH RL = 3Ω, 33µH 2.8 2.6 2.4 NO LOAD 07551-015 3.0 3.5 4.0 4.5 5.0 5.5 6.0 3.0 3.5 4.0 4.5 5.0 SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) Figure 15. Supply Current vs. Supply Voltage 2.0 1.8 1.6 RL = 8Ω, 33µH GAIN = 18dB f = 1kHz Figure 18. Maximum Output Power vs. Supply Voltage, RL = 3 Ω + 33 μH, Gain = 18 dB 100 90 80 70 VDD = 3.6V VDD = 5V VDD = 2.5V OUTPUT POWER (W) 1.4 1.2 1.0 10% 0.8 0.6 0.4 0.2 07551-016 EFFICIENCY (%) 60 50 40 30 20 10 RL = 8Ω, 33µH 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 07551-019 07551-020 1% 0 2.5 3.0 3.5 4.0 4.5 5.0 0 SUPPLY VOLTAGE (V) OUTPUT POWER (W) Figure 16. Maximum Output Power vs. Supply Voltage, RL = 8 Ω + 33 μH, Gain = 18 dB 4.0 3.5 3.0 RL = 4Ω, 33µH GAIN = 18dB f = 1kHz 100 90 80 70 2.5 2.0 1.5 1.0 0.5 07551-017 Figure 19. Efficiency vs. Output Power into 8 Ω + 33 μH VDD = 3.6V VDD = 2.5V VDD = 5V OUTPUT POWER (W) EFFICIENCY (%) 60 50 40 30 20 10 RL = 4Ω, 33µH 0 0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 10% 1% 0 2.5 3.0 3.5 4.0 4.5 5.0 0 SUPPLY VOLTAGE (V) OUTPUT POWER (W) Figure 17. Maximum Output Power vs. Supply Voltage, RL = 4 Ω + 33 μH, Gain = 18 dB Figure 20. Efficiency vs. Output Power into 4 Ω + 33 μH Rev. 0 | Page 8 of 16 07551-018 2.2 2.5 0 2.5 SSM2335 0.12 RL = 8Ω, 33µH VDD = 5V 0.18 0.16 0.14 0.12 0.10 0.08 0.06 0.04 0.02 07551-021 RL = 4Ω, 33µH VDD = 3.6V 0.10 POWER DISSIPATION (W) 0.08 0.06 0.04 0.02 POWER DISSIPATION (W) 0 0.3 0.6 0.9 1.2 1.5 1.8 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 OUTPUT POWER (W) OUTPUT POWER (W) Figure 21. Power Dissipation vs. Output Power into 8 Ω + 33 μH, VDD = 5 V 0.30 Figure 24. Power Dissipation vs. Output Power into 4 Ω + 33 μH, VDD = 3.6 V 450 RL = 4Ω, 33µH VDD = 5V RL = 8Ω, 33µH 400 350 VDD = 5.0V 0.25 POWER DISSIPATION (W) SUPPLY CURRENT (mA) 0.20 300 250 VDD = 2.5V 200 150 100 VDD = 3.6V 0.15 0.10 0.05 50 07551-022 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 OUTPUT POWER (W) OUTPUT POWER (W) Figure 22. Power Dissipation vs. Output Power into 4 Ω + 33 μH, VDD = 5 V 0.08 Figure 25. Supply Current vs. Output Power into 8 Ω + 33 μH 800 RL = 8Ω, 33µH VDD = 3.6V RL = 4Ω, 33µH VDD = 5.0V VDD = 3.6V 700 600 500 400 300 200 100 07551-023 07551-026 POWER DISSIPATION (W) SUPPLY CURRENT (mA) 0.06 0.04 VDD = 2.5V 0.02 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 OUTPUT POWER (W) 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 OUTPUT POWER (W) Figure 23. Power Dissipation vs. Output Power into 8 Ω + 33 μH, VDD = 3.6 V Figure 26. Supply Current vs. Output Power into 4 Ω + 33 μH Rev. 0 | Page 9 of 16 07551-025 0 0 07551-024 0 0 SSM2335 0 –10 –20 4 –30 6 5 SD INPUT PSRR (dB) –40 –50 –60 –70 VOLTAGE (V) 3 2 1 0 OUTPUT –80 –90 10 100 1k FREQUENCY (Hz) 10k 100k 07551-027 –1 07551-029 07551-030 –100 –2 –2 0 2 4 6 8 TIME (ms) 10 12 14 16 18 Figure 27. Power Supply Rejection Ratio (PSRR) vs. Frequency 0 –10 –20 –30 7 6 OUTPUT 5 4 Figure 29. Turn-On Response CMRR (dB) –40 –50 –60 –70 –80 –90 10 100 1k FREQUENCY (Hz) 10k 100k 07551-028 VOLTAGE (V) 3 2 1 0 –1 –2 –90 SD INPUT –100 –70 –50 –30 –10 10 30 50 70 90 TIME (µs) Figure 28. Common-Mode Rejection Ratio (CMRR) vs. Frequency Figure 30. Turn-Off Response Rev. 0 | Page 10 of 16 SSM2335 TYPICAL APPLICATION CIRCUITS EXTERNAL GAIN SETTINGS = 160kΩ/(20kΩ + REXT ) 10µF 0.1µF VBATT 2.5V TO 5.5V VDD OUT– MODULATOR (Σ-Δ) FET DRIVER OUT+ SSM2335 47nF* AUDIO IN+ AUDIO IN– 47nF* REXT REXT IN+ IN– 20kΩ 20kΩ 160kΩ 160kΩ SD BIAS INTERNAL OSCILLATOR POP-AND-CLICK SUPPRESSION SHUTDOWN GND *INPUT CAPACITORS ARE OPTIONAL IF INPUT DC COMMON-MODE VOLTAGE IS APPROXIMATELY VDD/2. Figure 31. Differential Input Configuration, User-Adjustable Gain EXTERNAL GAIN SETTINGS = 160kΩ/(20kΩ + REXT ) 10µF 0.1µF VBATT 2.5V TO 5.5V VDD OUT– MODULATOR (Σ-Δ) FET DRIVER OUT+ SSM2335 47nF AUDIO IN+ REXT REXT 47nF IN+ IN– 20kΩ 20kΩ 160kΩ 160kΩ SD INTERNAL OSCILLATOR POP-AND-CLICK SUPPRESSION SHUTDOWN BIAS Figure 32. Single-Ended Input Configuration, User-Adjustable Gain Rev. 0 | Page 11 of 16 07551-032 GND 07551-031 SSM2335 THEORY OF OPERATION OVERVIEW The SSM2335 mono Class-D audio amplifier features a filterless modulation scheme that greatly reduces the external component count, conserving board space and, thus, reducing systems cost. The SSM2335 does not require an output filter but, instead, relies on the inherent inductance of the speaker coil and the natural filtering of the speaker and human ear to fully recover the audio component of the square wave output. Most Class-D amplifiers use some variation of pulse-width modulation (PWM), but the SSM2335 uses Σ-Δ modulation to determine the switching pattern of the output devices, resulting in a number of important benefits. Σ-Δ modulators do not produce a sharp peak with many harmonics in the AM frequency band, as pulse-width modulators often do. Σ-Δ modulation provides the benefits of reducing the amplitude of spectral components at high frequencies, that is, reducing EMI emission that might otherwise be radiated by speakers and long cable traces. The SSM2335 does not require external EMI filtering for twisted speaker cable lengths shorter than 10 cm. Due to the inherent spread-spectrum nature of Σ-Δ modulation, the need for oscillator synchronization is eliminated for designs incorporating multiple SSM2335 amplifiers. The SSM2335 also offers protection circuits for overcurrent and temperature protection. OUTPUT MODULATION DESCRIPTION The SSM2335 uses three-level, Σ-Δ output modulation. Each output can swing from GND to VDD and vice versa. Ideally, when no input signal is present, the output differential voltage is 0 V because there is no need to generate a pulse. In a real-world situation, there are always noise sources present. Due to this constant presence of noise, a differential pulse is generated, when required, in response to this stimulus. A small amount of current flows into the inductive load when the differential pulse is generated. Most of the time, however, output differential voltage is 0 V, due to the Analog Devices patent pending, three-level, Σ-Δ output modulation. This feature ensures that the current flowing through the inductive load is small. When the user wants to send an input signal, an output pulse is generated to follow the input voltage. The differential pulse density is increased by raising the input signal level. Figure 33 depicts three-level, Σ-Δ output modulation with and without input stimulus. OUTPUT = 0V OUT+ OUT– +5V 0V +5V 0V +5V 0V –5V GAIN The SSM2335 has a default gain of 18 dB that can be reduced by using a pair of external resistors with a value calculated as follows: External Gain Settings = 160 kΩ/(20 kΩ + REXT) VOUT OUTPUT > 0V OUT+ OUT– VOUT OUTPUT < 0V OUT+ OUT– VOUT +5V 0V +5V 0V +5V 0V +5V 0V +5V 0V 0V –5V 07551-033 POP-AND-CLICK SUPPRESSION Voltage transients at the output of audio amplifiers can occur when shutdown is activated or deactivated. Voltage transients as low as 10 mV can be heard as an audio pop in the speaker. Clicks and pops can also be classified as undesirable audible transients generated by the amplifier system and, therefore, as not coming from the system input signal. Such transients may be generated when the amplifier system changes its operating mode. For example, the following may be sources of audible transients: system power-up and power-down, mute and unmute, input source change, and sample rate change. The SSM2335 has a pop-and-click suppression architecture that reduces these output transients, resulting in noiseless activation and deactivation. Figure 33. Three-Level, Σ-Δ Output Modulation With and Without Input Stimulus Rev. 0 | Page 12 of 16 SSM2335 LAYOUT As output power continues to increase, care must be taken to lay out PCB traces and wires properly among the amplifier, load, and power supply. A good practice is to use short, wide PCB tracks to decrease voltage drops and minimize inductance. Ensure that track widths are at least 200 mil for every inch of track length for lowest DCR, and use 1 oz or 2 oz of copper PCB traces to further reduce IR drops and inductance. A poor layout increases voltage drops, consequently affecting efficiency. Use large traces for the power supply inputs and amplifier outputs to minimize losses due to parasitic trace resistance. Proper grounding guidelines help to improve audio performance, minimize crosstalk between channels, and prevent switching noise from coupling into the audio signal. To maintain high output swing and high peak output power, the PCB traces that connect the output pins to the load, as well as the PCB traces to the supply pins, should be as wide as possible to maintain the minimum trace resistances. It is also recommended that a large ground plane be used for minimum impedances. In addition, good PCB layout isolates critical analog paths from sources of high interference. High frequency circuits (analog and digital) should be separated from low frequency circuits. Properly designed multilayer PCBs can reduce EMI emission and increase immunity to the RF field by a factor of 10 or more, compared with double-sided boards. A multilayer board allows a complete layer to be used for the ground plane, whereas the ground plane side of a double-sided board is often disrupted by signal crossover. If the system has separate analog and digital ground and power planes, the analog ground plane should be directly beneath the analog power plane, and, similarly, the digital ground plane should be directly beneath the digital power plane. There should be no overlap between analog and digital ground planes or between analog and digital power planes. INPUT CAPACITOR SELECTION The SSM2335 does not require input coupling capacitors if the input signal is biased from 1.0 V to VDD − 1.0 V. Input capacitors are required if the input signal is not biased within this recommended input dc common-mode voltage range, if high-pass filtering is needed, or if a single-ended source is used. If highpass filtering is needed at the input, the input capacitor and the input resistor of the SSM2335 form a high-pass filter whose corner frequency is determined by the following equation: fC = 1/(2π × RIN × CIN) The input capacitor can significantly affect the performance of the circuit. Not using input capacitors degrades both the output offset of the amplifier and the dc PSRR performance. POWER SUPPLY DECOUPLING To ensure high efficiency, low total harmonic distortion (THD), and high PSRR, proper power supply decoupling is necessary. Noise transients on the power supply lines are short-duration voltage spikes. Although the actual switching frequency can range from 10 kHz to 100 kHz, these spikes can contain frequency components that extend into the hundreds of megahertz. The power supply input needs to be decoupled with a good quality, low ESL, low ESR capacitor, with a minimum value of 4.7 μF. This capacitor bypasses low frequency noises to the ground plane. For high frequency transient noises, use a 0.1 μF capacitor as close as possible to the VDD pin of the device. Placing the decoupling capacitor as close as possible to the SSM2335 helps to maintain efficient performance. Rev. 0 | Page 13 of 16 SSM2335 OUTLINE DIMENSIONS A1 BALL CORNER 1.490 1.460 SQ 1.430 0.655 0.600 0.545 SEATING PLANE 0.350 0.320 0.290 3 2 1 A B 0.50 BALL PITCH TOP VIEW (BALL SIDE DOWN) C 0.385 0.360 0.335 BOTTOM VIEW 0.270 0.240 0.210 (BALL SIDE UP) Figure 34. 9-Ball Wafer Level Chip Scale Package [WLCSP] (CB-9-2) Dimensions shown in millimeters ORDERING GUIDE Model SSM2335CBZ-R2 1 SSM2335CBZ-REEL1 SSM2335CBZ-REEL71 EVAL-SSM2335Z1 1 Temperature Range −40°C to +85°C −40°C to +85°C −40°C to +85°C Package Description 9-Ball Wafer Level Chip Scale Package [WLCSP] 9-Ball Wafer Level Chip Scale Package [WLCSP] 9-Ball Wafer Level Chip Scale Package [WLCSP] Evaluation Board Package Option CB-9-2 CB-9-2 CB-9-2 101507-C Branding Y1L Y1L Y1L Z = RoHS Compliant Part. Rev. 0 | Page 14 of 16 SSM2335 NOTES Rev. 0 | Page 15 of 16 SSM2335 NOTES ©2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07551-0-10/08(0) Rev. 0 | Page 16 of 16