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SSM2356CBZ-RL

SSM2356CBZ-RL

  • 厂商:

    AD(亚德诺)

  • 封装:

    16-WFBGA,WLCSP

  • 描述:

    IC AMP AUD 2X2W STER D 16WLCSP

  • 数据手册
  • 价格&库存
SSM2356CBZ-RL 数据手册
2 × 2W Filterless Class-D Stereo Audio Amplifier SSM2356 Data Sheet FEATURES The SSM2356 features a high efficiency, low noise modulation scheme that requires no external LC output filters. The modulation continues to provide high efficiency even at low output power. It operates with 92% efficiency at 1.4 W into 8 Ω or 85% efficiency at 2.0 W into 4 Ω from a 5.0 V supply and has an SNR of >103 dB. Filterless stereo Class-D amplifier with Σ-Δ modulation No sync necessary when using multiple Class-D amplifiers from Analog Devices, Inc. 2 × 2W into 4 Ω load and 2x1.4 W into 8 Ω load at 5.0 V supply with 103 dB signal-to-noise ratio (SNR) Single-supply operation from 2.5 V to 5.5 V 20 nA shutdown current; left/right channel control Short-circuit and thermal protection Available in a 16-ball, 1.66 mm × 1.66 mm WLCSP Pop-and-click suppression Built-in resistors that reduce board component count User-selectable 6 dB or 18 dB gain setting User-selectable ultralow EMI emission mode TE Spread-spectrum pulse density modulation is used to provide lower EMI-radiated emissions compared with other Class-D architectures. The SSM2356 includes an optional modulation select pin (ultralow EMI emission mode) that significantly reduces the radiated emissions at the Class-D outputs, particularly above 100 MHz. LE The SSM2356 has a micropower shutdown mode with a typical shutdown current of 20 nA. Shutdown is enabled by applying a logic low to the SDNR and SDNL pins. The device also includes pop-and-click suppression circuitry that minimizes voltage glitches at the output during turn-on and turn-off, reducing audible noise on activation and deactivation. APPLICATIONS Mobile phones MP3 players Portable gaming Portable electronics B SO GENERAL DESCRIPTION The fully differential input of the SSM2356 provides excellent rejection of common-mode noise on the input. Input coupling capacitors can be omitted if the dc input common-mode voltage is approximately VDD/2. The preset gain of SSM2356 can be selected between 6 dB and 18 dB with no external components and no change to the input impedance. Gain can be further reduced to a user-defined setting by inserting series external resistors at the inputs. The SSM2356 is a fully integrated, high efficiency, stereo Class-D audio amplifier. It is designed to maximize performance for mobile phone applications. The application circuit requires a minimum of external components and operates from a single 2.5 V to 5.5 V supply. It is capable of delivering 2 × 2W of continuous output power with 100 V V ms µs kΩ 29 µVrms 100 dB B SO Guaranteed from PSRR test VDD = 2.5 V to 5.0 V, dc input floating VDD − 1 55 78 300 2.0 Gain = 6 dB O Input Impedance Gain Gain ZIN SHUTDOWN CONTROL Input Voltage High Input Voltage Low Turn-On Time Turn-Off Time Output Impedance VIH VIL tWU tSD ZOUT NOISE PERFORMANCE Output Voltage Noise en Signal-to-Noise Ratio SNR VDD = 3.6 V, f = 20 Hz to 20 kHz, inputs are ac grounded, Gain = 6 dB, A-weighted PO = 1.4 W, RL = 8 Ω 2.5 70 Unit VDD PSRR (DC) PSRRGSM ISY GAIN CONTROL Closed-Loop Gain 1 Typ TE Efficiency Symbol LE Parameter DEVICE CHARACTERISTICS Output Power/Channel 85 5.5 V dB 60 5.75 4.9 4.7 5.5 5.1 4.5 20 dB mA mA mA mA mA mA nA Note that, although the SSM2356 has good audio quality above 2 W per channel, continuous output power beyond 2 W per channel must be avoided due to device packaging limitations. Rev. A | Page 3 of 16 SSM2356 Data Sheet ABSOLUTE MAXIMUM RATINGS Absolute maximum ratings apply at 25°C, unless otherwise noted. THERMAL RESISTANCE Table 2. θJA (junction to air) is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. θJA and θJB (junction to board) are determined according to JESD51-9 on a 4-layer printed circuit board (PCB) with natural convection cooling. Rating 6V VDD VDD 4 kV −65°C to +150°C −40°C to +85°C −65°C to +165°C 300°C Table 3. Thermal Resistance Package Type 16-ball, 1.66 mm × 1.66 mm WLCSP ESD CAUTION O B SO LE Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. A | Page 4 of 16 θJA 66 θJB 19 TE Parameter Supply Voltage Input Voltage Common-Mode Input Voltage ESD Susceptibility Storage Temperature Range Operating Temperature Range Junction Temperature Range Lead Temperature Range (Soldering, 60 sec) Unit °C/W Data Sheet SSM2356 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS BALL A1 INDICATOR 2 1 3 4 OUTL+ VDD VDD OUTR+ OUTL– GND GND OUTR– A B SDNL EDGE GAIN SDNR C INL+ INL– INR– INR+ TE TOP VIEW (BALL SIDE DOWN) Not to Scale 08084-002 D Figure 2. Pin Configuration (Top Side View) Table 4. Pin Function Descriptions Mnemonic OUTL+ OUTL− SDNL Description Noninverting Output for Left Channel. Inverting Output for Left Channel. Shutdown, Left Channel. Active low digital input. D1 D2 C4 C3 D3 D4 B2 B4 INL+ INL− SDNR GAIN INR− INR+ GND OUTR− Noninverting Input for Left Channel. Inverting Input for Left Channel. Shutdown, Right Channel. Active low digital input. Gain select between 6 dB and 18 dB. Inverting Input for Right Channel. Noninverting Input for Right Channel. Ground. Inverting Output for Right Channel. OUTR+ GND VDD VDD EDGE Noninverting Output for Right Channel. Ground. Power Supply. Power Supply. Edge Control (Low Emission Mode); active high digital input. B SO O A4 B3 A2 A3 C2 LE Bump A1 B1 C1 Rev. A | Page 5 of 16 SSM2356 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS 100 100 RL = 8Ω + 33µH GAIN = 6dB VDD = 2.5V VDD = 2.5V 10 THD + N (%) 10 THD + N (%) RL = 4Ω + 15µH GAIN = 18dB VDD = 3.6V 1 0.1 VDD = 5V 0.01 1 VDD = 3.6V 0.1 0.01 0.01 0.1 1 10 OUTPUT POWER (W) 0.001 0.0001 VDD = 3.6V VDD = 2.5V 1 10 10 VDD = 5V GAIN = 6dB RL = 8Ω + 33µH LE 10 0.1 Figure 6. THD + N vs. Output Power into 4 Ω, AV = 18 dB 100 RL = 8Ω + 33µH GAIN = 18dB 0.01 OUTPUT POWER (W) Figure 3. THD + N vs. Output Power into 8 Ω, AV = 6 dB 100 0.001 08084-104 0.001 08084-101 0.001 0.0001 TE VDD = 5V THD + N (%) THD + N (%) 1 1 0.1 1W 0.1 0.25W B SO 0.01 VDD = 5V 0.001 0.01 0.1 1 10 OUTPUT POWER (W) 0.5W 0.0001 10 VDD = 3.6V 0.1 100k VDD = 5V GAIN = 18dB RL = 8Ω + 33µH 10 THD + N (%) O 0.01 1 1W 0.1 0.01 0.5W 0.25W 0.001 0.0001 0.001 0.01 0.1 1 OUTPUT POWER (W) 10 Figure 5. THD + N vs. Output Power into 4 Ω, AV = 6 dB 0.001 10 100 1k 10k 100k FREQUENCY (Hz) Figure 8. THD + N vs. Frequency, VDD = 5 V, RL = 8 Ω, AV = 18 dB Rev. A | Page 6 of 16 08084-106 VDD = 5V 08084-103 THD + N (%) 100 VDD = 2.5V 1 10k Figure 7. THD + N vs. Frequency, VDD = 5 V, RL = 8 Ω, AV = 6 dB RL = 4Ω + 15µH GAIN = 6dB 10 1k FREQUENCY (Hz) Figure 4. THD + N vs. Output Power into 8 Ω, AV = 18 dB 100 100 08084-105 0.001 0.0001 0.001 08084-102 0.01 Data Sheet 100 SSM2356 100 VDD = 5V GAIN = 6dB RL = 4Ω + 15µH 10 THD + N (%) THD + N (%) 10 VDD = 3.6V GAIN = 18dB RL = 8Ω + 33µH 1 2W 0.1 0.01 1 0.5W 0.1 0.01 0.5W 0.125W 0.25W 1k 10k 100k FREQUENCY (Hz) Figure 9. THD + N vs. Frequency, VDD = 5 V, RL = 4 Ω, AV = 6 dB 100 100 1k 10k 100k FREQUENCY (Hz) Figure 12. THD + N vs. Frequency, VDD = 3.6 V, RL = 8 Ω, AV = 18 dB 100 VDD = 5V GAIN = 18dB RL = 4Ω + 15µH 10 VDD = 3.6V GAIN = 6dB RL = 4Ω + 15µH 10 THD + N (%) LE THD + N (%) 0.001 10 08084-110 100 TE 0.001 10 08084-107 1W 1 2W 0.5W 0.1 1 1W 0.1 0.25W 0.01 0.01 1k 10k 100k FREQUENCY (Hz) 0.5W 0.001 10 100 0.1 0.5W VDD = 3.6V GAIN = 18dB RL = 4Ω + 15µH 1 1W 0.1 0.25W 0.125W 0.01 100k 10 THD + N (%) O 0.01 0.5W 0.001 10 100 1k 10k 100k FREQUENCY (Hz) Figure 11. THD + N vs. Frequency, VDD = 3.6 V, RL = 8 Ω, AV = 6 dB 0.001 10 100 1k 10k 100k FREQUENCY (Hz) Figure 14. THD + N vs. Frequency, VDD = 3.6 V, RL = 4 Ω, AV = 18 dB Rev. A | Page 7 of 16 08084-112 0.25W 08084-109 THD + N (%) 1 10k Figure 13. THD + N vs. Frequency, VDD = 3.6 V, RL = 4 Ω, AV = 6 dB VDD = 3.6V GAIN = 6dB RL = 8Ω + 33µH 10 1k FREQUENCY (Hz) Figure 10. THD + N vs. Frequency, VDD = 5 V, RL = 8 Ω, AV = 18 dB 100 100 08084-111 100 08084-108 0.001 10 B SO 1W SSM2356 100 Data Sheet 100 VDD = 2.5V GAIN = 6dB RL = 8Ω + 33µH 10 THD + N (%) THD + N (%) 10 VDD = 2.5V GAIN = 18dB RL = 4Ω + 15µH 1 0.25W 0.1 0.5W 1 0.1 1.25W 0.0625W 0.01 0.01 0.25W 1k 10k 100k FREQUENCY (Hz) 0.001 10 7.0 6.0 5.5 8Ω + 33µH 5.0 4.5 B SO 0.125W 100 1k 10k 100k FREQUENCY (Hz) 4.0 2.5 7.5 0.1 0.25W 4.0 4.5 5.0 5.5 ISY FOR BOTH CHANNELS GAIN = 18dB 7.0 SUPPLY CURRENT (mA) O 1 3.5 Figure 19. Supply Current vs. Supply Voltage, AV = 6 dB VDD = 2.5V GAIN = 6dB RL = 4Ω + 15µH 0.5W 3.0 NO LOAD SUPPLY VOLTAGE (V) Figure 16. THD + N vs. Frequency, VDD = 2.5 V, RL = 8 Ω, AV = 18 dB 10 4Ω + 15µH 08084-117 SUPPLY CURRENT (mA) 0.0625W 0.01 6.5 4Ω + 15µH 6.0 8Ω + 33µH 5.5 5.0 NO LOAD 0.01 4.5 100 1k 10k 100k FREQUENCY (Hz) Figure 17. THD + N vs. Frequency, VDD = 2.5 V, RL = 4 Ω, AV = 6 dB 4.0 2.5 3.0 3.5 4.0 4.5 5.0 SUPPLY VOLTAGE (V) Figure 20. Supply Current vs. Supply Voltage, AV = 18 dB Rev. A | Page 8 of 16 5.5 08084-118 0.125W 0.001 10 08084-115 THD + N (%) ISY FOR BOTH CHANNELS GAIN = 6dB LE 0.25W 08084-114 THD + N (%) 1 100 100k 6.5 10 0.001 10 10k Figure 18. THD + N vs. Frequency, VDD = 2.5 V, RL = 4 Ω, AV = 18 dB VDD = 2.5V GAIN = 18dB RL = 8Ω + 33µH 0.1 1k FREQUENCY (Hz) Figure 15. THD + N vs. Frequency, VDD = 2.5 V, RL = 8 Ω, AV = 6 dB 100 100 TE 100 08084-113 0.001 10 08084-116 0.125W Data Sheet SSM2356 3.5 2.0 f = 1kHz GAIN = 18dB 3.0 RL = 4Ω + 15µH f = 1kHz 1.8 GAIN = 6dB RL = 8Ω + 33µH 1.4 OUTPUT POWER (W) OUTPUT POWER (W) 1.6 1.2 10% 1.0 0.8 1% 0.6 2.5 2.0 10% 1.5 1% 1.0 0.4 0.5 3.5 4.0 4.5 5.0 SUPPLY VOLTAGE (V) Figure 21. Maximum Output Power vs. Supply Voltage, RL = 8 Ω, AV = 6 dB 1.8 EFFICIENCY (%) 1% 0.6 60 50 40 3.5 4.0 4.5 5.0 0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 OUTPUT POWER (W) Figure 22. Maximum Output Power vs. Supply Voltage, RL = 8 Ω, AV = 18 dB Figure 25. Efficiency vs. Output Power into 8 Ω 100 f = 1kHz GAIN = 6dB 3.0 RL = 4Ω + 15µH 1.5 1% 80 70 EFFICIENCY (%) O 10% 90 VDD = 2.5V VDD = 5V VDD = 3.6V 60 50 40 30 1.0 20 0.5 GAIN = 6dB RL = 4Ω + 15µH POUT FOR BOTH CHANNELS 3.0 3.5 4.0 SUPPLY VOLTAGE (V) 4.5 5.0 08084-121 10 Figure 23. Maximum Output Power vs. Supply Voltage, RL = 4 Ω, AV = 6 dB Rev. A | Page 9 of 16 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 OUTPUT POWER (W) Figure 26. Efficiency vs. Output Power into 4 Ω 5.5 6.0 08084-124 3.0 GAIN = 6dB RL = 8Ω + 33µH POUT FOR BOTH CHANNELS 10 08084-123 B SO 20 SUPPLY VOLTAGE (V) OUTPUT POWER (W) VDD = 5V VDD = 3.6V 30 0.4 0 2.5 5.0 VDD = 2.5V LE 0.8 08084-120 OUTPUT POWER (W) 1.0 2.0 4.5 70 10% 2.5 4.0 Figure 24. Maximum Output Power vs. Supply Voltage, RL = 4 Ω, AV = 18 dB 80 1.2 3.5 3.5 90 1.4 0 2.5 3.0 SUPPLY VOLTAGE (V) 100 f = 1kHz GAIN = 18dB 1.6 RL = 8Ω + 33µH 0.2 0 2.5 08084-122 3.0 TE 0 2.5 08084-119 0.2 SSM2356 Data Sheet 0 0.8 GAIN = 6dB RL = 8Ω + 33µH 0.7 I , P SY OUT FOR BOTH CHANNELS VDD = 5V –10 –20 –30 VDD = 3.6V 0.5 CMRR (dB) SUPPLY CURRENT (A) 0.6 0.4 VDD = 2.5V 0.3 –40 –50 –60 –70 0.2 –80 0.1 0.5 1.0 1.5 2.0 2.5 3.0 3.5 OUTPUT POWER (W) –100 10 100 1k 10k 100k TE 0 08084-125 0 FREQUENCY (Hz) Figure 27. Supply Current vs. Output Power into 8 Ω 08084-129 –90 Figure 30. CMRR vs. Frequency 1.6 0 GAIN = 6dB RL = 4Ω + 15µH 1.4 I , P SY OUT FOR BOTH CHANNELS VDD = 5V –10 –20 –30 LE VDD = 3.6V 1.0 PSRR (dB) SUPPLY CURRENT (A) 1.2 0.8 VDD = 2.5V 0.6 –40 –50 –60 –70 0.4 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 OUTPUT POWER (W) –100 10 100 Figure 28. Supply Current vs. Output Power into 4 Ω 0 RIGHT TO LEFT 100k 6 5 SD INPUT 4 VOLTAGE (V) –60 O 3 2 OUTPUT 1 –80 0 –100 –120 1 10 100 1k FREQUENCY (Hz) 10k 100k Figure 29. Crosstalk v. Frequency –2 –2 0 2 4 6 8 10 12 TIME (ms) Figure 32. Turn-On Response Rev. A | Page 10 of 16 14 16 18 08084-131 –1 LEFT TO RIGHT 08084-133 CHANNEL SEPARATION (dB) –40 10k Figure 31. PSRR vs. Frequency VDD = 5V VOUT = 500mV rms RL = 8Ω + 33µH –20 1k FREQUENCY (Hz) 08084-130 0 –90 08084-126 0 B SO –80 0.2 Data Sheet SSM2356 7 6 5 VOLTAGE (V) 4 OUTPUT 3 2 1 0 –1 –90 –70 –50 –30 –10 10 TIME (µs) 30 50 70 O B SO LE Figure 33. Turn-Off Response TE SD INPUT 08084-132 –2 –110 Rev. A | Page 11 of 16 SSM2356 Data Sheet TYPICAL APPLICATION CIRCUITS VBATT 2.5V TO 5.5V 10µF 0.1µF VDD SSM2356 22nF REXT SDNR FET DRIVER OUTR– EDGE EDGE CONTROL INTERNAL OSCILLATOR BIAS SHUTDOWN–L LEFT AUDIO IN– INR– 80kΩ MODULATOR (Σ-Δ) BIAS SHUTDOWN–R LEFT AUDIO IN+ OUTR+ GAIN CONTROL INR+ 22nF R EXT SDNL 80kΩ 22nF REXT OUTL+ GAIN CONTROL INL+ INL– 80kΩ MODULATOR (Σ-Δ) FET DRIVER OUTL– GAIN GND GAIN GND 08084-003 RIGHT AUDIO IN– VDD 80kΩ TE RIGHT AUDIO IN+ 22nF R EXT EXTERNAL GAIN SETTINGS = 160kΩ/(80kΩ + R EXT) {GAIN = GND} = 640kΩ/(80kΩ + R EXT) {GAIN = VBATT} LE Figure 34. Stereo Differential Input Configuration (When GAIN = VBATT use no larger than 10 kΩ REXT) VBATT 2.5V TO 5.5V 10µF 0.1µF VDD SSM2356 RIGHT AUDIO IN+ 22nF R EXT 80kΩ INR+ GAIN CONTROL INR– 80kΩ MODULATOR (Σ-Δ) B SO 22nF REXT FET DRIVER OUTR+ OUTR– BIAS SHUTDOWN–R SDNR INTERNAL OSCILLATOR EDGE CONTROL EDGE BIAS SHUTDOWN–L LEFT AUDIO IN+ VDD 22nF R EXT SDNL 80kΩ GAIN CONTROL INL+ 22nF REXT INL– 80kΩ OUTL+ MODULATOR (Σ-Δ) GAIN FET DRIVER GND OUTL– GND O EXTERNAL GAIN SETTINGS = 160kΩ/(80kΩ + R EXT) {GAIN = GND} = 640kΩ/(80kΩ + R EXT) {GAIN = VBATT} Figure 35. Stereo Single-Ended Input Configuration (When GAIN = VBATT use no larger than 10 kΩ REXT) Rev. A | Page 12 of 16 08084-004 GAIN Data Sheet SSM2356 APPLICATIONS INFORMATION System power-up/power-down Mute/unmute Input source change Sample rate change The SSM2356 has a pop-and-click suppression architecture that reduces these output transients, resulting in noiseless activation and deactivation. EMI NOISE The SSM2356 uses a proprietary modulation and spreadspectrum technology to minimize EMI emissions from the device. For applications having difficulty passing FCC Class B emission tests, the SSM2356 includes a modulation select pin (ultralow EMI emission mode) that significantly reduces the radiated emissions at the Class-D outputs, particularly above 100 MHz. Figure 36 shows SSM2356 EMI emission tests performed in a certified FCC Class-B laboratory in normal emissions mode (EDGE = GND). Figure 37 shows SSM2356 EMI emission with EDGE = VDD, placing the device in low emissions mode. It is possible to adjust the SSM2356 gain by using external resistors at the input. To set a gain lower than 18 dB (or 6 dB when GAIN = GND), refer to Figure 34 for the differential input configuration and Figure 35 for the single-ended configuration. Calculate the external gain configuration as follows: When GAIN = GND (6 dB default gain setting) O External Gain Settings = 160 kΩ/(80 kΩ + REXT) 60 50 40 30 20 [1] HORIZONTAL [2] VERTICAL FCC CLASS-B LIMIT 10 0 30 130 230 330 430 530 630 730 830 930 1000 FREQUENCY (MHz) 08084-005 B SO The preset gain of SSM2356 can be selected between 6 dB and 18 dB with no external components and no change to the input impedance. A major benefit of fixed input impedance is that there is no need to recalculate input corner frequency (Fc) when gain is adjusted. The same input coupling components can be used for both gain settings. (dBµV) The SSM2356 also integrates overcurrent and temperature protection. Figure 36. EMI Emissions from SSM2356, 1-Channel, 12 cm Cable, EDGE = GND When GAIN = VDD (18 dB default gain setting) 60 External Gain Settings = 640 kΩ/(80 kΩ + REXT) 50 POP-AND-CLICK SUPPRESSION 40 (dBµV) Please note that when using external resistors to adjust the gain from the 18 dB setting (GAIN = VDD) to maintain optimal audio performance, it is not recommended to use external series resistors larger than 10 kΩ due to increased noise floor and reduced THD+N performance. 30 20 10 Voltage transients at the output of audio amplifiers may occur when shutdown is activated or deactivated. Voltage transients as low as 10 mV can be heard as an audio pop in the speaker. Clicks and pops can also be classified as undesirable audible transients generated by the amplifier system and, therefore, as not coming from the system input signal. Rev. A | Page 13 of 16 0 30 [1] HORIZONTAL [2] VERTICAL FCC CLASS-B LIMIT 130 230 330 430 530 630 FREQUENCY (MHz) 730 830 930 1000 08084-006 GAIN SELECTION • • • • LE The SSM2356 stereo Class-D audio amplifier features a filterless modulation scheme that greatly reduces the external component count, conserving board space and, thus, reducing systems cost. The SSM2356 does not require an output filter but, instead, relies on the inherent inductance of the speaker coil and the natural filtering of the speaker and human ear to fully recover the audio component of the square wave output. Most Class-D amplifiers use some variation of pulse-width modulation (PWM), but the SSM2356 uses Σ-Δ modulation to determine the switching pattern of the output devices, resulting in a number of important benefits. Σ-Δ modulators do not produce a sharp peak with many harmonics in the AM frequency band, as pulse-width modulators often do. Σ-Δ modulation provides the benefits of reducing the amplitude of spectral components at high frequencies, that is, reducing EMI emission that might otherwise be radiated by speakers and long cable traces. Due to the inherent spread-spectrum nature of Σ-Δ modulation, the need for oscillator synchronization is eliminated for designs incorporating multiple SSM2356 amplifiers. Such transients may be generated when the amplifier system changes its operating mode. For example, the following can be sources of audible transients: TE OVERVIEW Figure 37. EMI Emissions from SSM2356, 1-Channel, 12 cm Cable, EDGE = VDD SSM2356 Data Sheet affecting efficiency. Use large traces for the power supply inputs and amplifier outputs to minimize losses due to parasitic trace resistance. Proper grounding guidelines help to improve audio performance, minimize crosstalk between channels, and prevent switching noise from coupling into the audio signal. OUTPUT MODULATION DESCRIPTION The SSM2356 uses three-level, Σ-Δ output modulation. Each output can swing from GND to VDD and vice versa. Ideally, when no input signal is present, the output differential voltage is 0 V because there is no need to generate a pulse. In a real-world situation, there are always noise sources present. When the user wants to send an input signal, an output pulse is generated to follow input voltage. The differential pulse density is increased by raising the input signal level. Figure 38 depicts three-level, Σ-Δ output modulation with and without input stimulus. OUTPUT = 0V +5V INPUT CAPACITOR SELECTION 0V +5V OUT– The SSM2356 does not require input coupling capacitors if the input signal is biased from 1.0 V to VDD − 1.0 V. Input capacitors are required if the input signal is not biased within this recommended input dc common-mode voltage range, if high-pass filtering is needed, or if a single-ended source is used. If highpass filtering is needed at the input, the input capacitor and the input resistor of the SSM2356 form a high-pass filter whose corner frequency is determined by the following equation: 0V +5V VOUT 0V –5V OUTPUT > 0V OUT+ +5V 0V +5V OUT– 0V +5V VOUT If the system has separate analog and digital ground and power planes, the analog ground plane should be directly beneath the analog power plane, and, similarly, the digital ground plane should be directly beneath the digital power plane. There should be no overlap between analog and digital ground planes or between analog and digital power planes. B SO OUT+ Properly designed multilayer PCBs can reduce EMI emission and increase immunity to the RF field by a factor of 10 or more, compared with double-sided boards. A multilayer board allows a complete layer to be used for the ground plane, whereas the ground plane side of a double-sided board is often disrupted by signal crossover. LE Due to this constant presence of noise, a differential pulse is generated, when required, in response to this stimulus. A small amount of current flows into the inductive load when the differential pulse is generated. However, most of the time, output differential voltage is 0 V, due to the Analog Devices three-level, Σ-Δ output modulation. This feature ensures that the current flowing through the inductive load is small. To maintain high output swing and high peak output power, the PCB traces that connect the output pins to the load and supply pins should be as wide as possible to maintain the minimum trace resistances. It is also recommended that a large ground plane be used for minimum impedances. In addition, good PCB layout isolates critical analog paths from sources of high interference. High frequency circuits (analog and digital) should be separated from low frequency circuits. TE The measurements for Figure 36 and Figure 37 were taken in an FCC-certified EMI laboratory with a 1 kHz input signal, producing 0.5 W output power into an 8 Ω load from a 5 V supply. Cable length was 12 cm, unshielded twisted pair speaker cable. Note that reducing the supply voltage greatly reduces radiated emissions. 0V O OUT+ OUT– VOUT 0V +5V 0V 0V –5V fC = 1/(2π × RIN × CIN) The input capacitor can significantly affect the performance of the circuit. Not using input capacitors degrades both the output offset of the amplifier and the dc PSRR performance. +5V 08084-007 OUTPUT < 0V Figure 38. Three-Level, Σ-Δ Output Modulation With and Without Input Stimulus LAYOUT As output power continues to increase, care must be taken to lay out PCB traces and wires properly among the amplifier, load, and power supply. A good practice is to use short, wide PCB tracks to decrease voltage drops and minimize inductance. Ensure that track widths are at least 200 mil for every inch of track length for the lowest dc resistance (DCR), and use 1 oz. or 2 oz. copper PCB traces to further reduce IR drops and inductance. A poor layout increases voltage drops, consequently PROPER POWER SUPPLY DECOUPLING To ensure high efficiency, low total harmonic distortion (THD), and high PSRR, proper power supply decoupling is necessary. Noise transients on the power supply lines are short-duration voltage spikes. These spikes can contain frequency components that extend into the hundreds of megahertz. The power supply input must be decoupled with a good quality, low ESL, low ESR capacitor, greater than 4.7 μF. This capacitor bypasses low frequency noises to the ground plane. For high frequency transient noises, use a 0.1 μF capacitor as close as possible to the VDD pin of the device. Placing the decoupling capacitor as close as possible to the SSM2356 helps to maintain efficient performance. Rev. A | Page 14 of 16 Data Sheet SSM2356 OUTLINE DIMENSIONS 1.700 1.660 SQ 1.620 4 3 2 1 A BALL A1 IDENTIFIER B 1.20 REF C D 0.40 BSC (BALL SIDE UP) SIDE VIEW 0.430 0.400 0.370 TE COPLANARITY 0.07 0.290 0.260 0.230 0.230 0.200 0.170 10-19-2012-B SEATING PLANE BOTTOM VIEW LE 0.660 0.600 0.540 TOP VIEW (BALL SIDE DOWN) Figure 4. 16-Ball Wafer Level Chip Scale Package [WLCSP] (CB-16-4) Dimensions shown in millimeters ORDERING GUIDE Package Description 16-Ball Wafer Level Chip Scale Package [WLCSP] 16-Ball Wafer Level Chip Scale Package [WLCSP] Evaluation Board Z = RoHS Compliant Part. O 1 Temperature Range −40°C to +85°C −40°C to +85°C B SO Model 1 SSM2356CBZ-RL SSM2356CBZ-RL7 EVAL-SSM2356Z Rev. A | Page 15 of 16 Package Option CB-16-4 CB-16-4 Branding Y1R Y1R SSM2356 Data Sheet O B SO LE TE NOTES ©2009–2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D08084-0-3/13(A) Rev. A | Page 16 of 16
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