V62/11608-01XE

V62/11608-01XE

  • 厂商:

    AD(亚德诺)

  • 封装:

    SOT-23-8

  • 描述:

    IC SWITCH SPDT SINGLE SOT23-8

  • 数据手册
  • 价格&库存
V62/11608-01XE 数据手册
REVISIONS LTR DESCRIPTION DATE Prepared in accordance with ASME Y14.24 APPROVED Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV 1 PAGE 2 3 PMIC N/A PREPARED BY Phu H. Nguyen Original date of drawing YY MM DD CHECKED BY 11-01-19 Phu H. Nguyen APPROVED BY Thomas M. Hess SIZE A REV AMSC N/A 4 CODE IDENT. NO. 5 6 7 8 9 10 11 12 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 TITLE MICROCIRCUIT, DIGITAL, CMOS, ±% V/ +5V , 4 Ω, SINGLE SPDT SWITCH, MONOLITHIC SILICON DWG NO. V62/11608 16236 PAGE 1 OF 12 5962-V029-11 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance CMOS, ±5 V/ +5 V, 4 Ω, single SPDT switch microcircuit, with an operating temperature range of -40C to +125C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturer,s PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/11608 - Drawing number 01 X E Device type (See 1.2.1) Case outline (See 1.2.2) Lead finish (See 1.2.3) 1.2.1 Device type(s). Generic Device type 01 Circuit function ADG619-EP CMOS, ±5 V/ +5 V, 4 Ω, single SPDT switch 1.2.2 Case outline(s). The case outlines are as specified herein. Outline letter Number of pins X 8 JEDEC PUB 95 Package style JEDEC MO-178 Small outline Package 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator A B C D E Z DLA LAND AND MARITIME COLUMBUS, OHIO Material Hot solder dip Tin-lead plate Gold plate Palladium Gold flash palladium Other SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/11608 PAGE 2 1.3 Absolute maximum ratings. 1/ Voltage referenced : VDD to VSS .............................................................................. VDD to GND ............................................................................ VSS to GND ............................................................................ Analog input 2/ .............................................................................. Digital input 2/ .............................................................................. Peak current, S or D ...................................................................... Continuous current, S or D ............................................................ Ambient operating temperature range ........................................ Storage temperature range ........................................................... Maximum junction temperature (TJ) .............................................. Thermal impedance: θJA .......................................................................................... θJC .......................................................................................... Lead soldering: Reflow, peak temperature ......................................................... Time at peak temperature ......................................................... 13.0 V -0.3 V to +6.5 V +0.3 V to -6.5 V VSS – 0.3 V to VDD + 0.3 V -0.3 V to VDD + 0.3 V or 30 mA (which ever occurs first) 100 MA (pulsed at 1 ms, 10% duty cycle mzximum) 50 mA -55C to +125C -65C to +150C 150C 229C /W 91.99C /W 260(+0/-5)C 20 sec to 40 sec 2. APPLICABLE DOCUMENTS JEDEC PUB 95 – Registered and Standard Outlines for Semiconductor Devices (Applications for copies should be addressed to the Electronic Industries Alliance, 3103 North 10th St., Suite 240-S, Arlington, VA 22201-2107 or online at http://www.jedec.org) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturer’s part number as shown in 6.3 herein and as follows: A. B. C. Manufacturer’s name, CAGE code, or logo Pin 1 identifier ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturer’s part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 1/ 2/ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability. Overvoltage at IN, S or D are clamped by internal diodes. Current should be limited to the maximum ratings given. DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/11608 PAGE 3 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Terminal connections. The terminal connections shall be as shown in figure 2. 3.5.3 Functional block diagram. The functional block diagram shall be as shown in figure 3. 3.5.4 Truth table. The truth table shall be as shown in figure 4. 3.5.5 On Resistance. The On resistance shall be as shown in figure 5. 3.5.6 Off Leakage. The Off leakage shall be as shown in figure 6. 3.5.7 On Leakage . The On leakage shall be as shown in figure 7. 3.5.8 Switching times. The switching times shall be as shown in figure 8. 3.5.9 Break before making time delay. The break before making time delay shall be as shown in figure 9. 3.5.10 Charge injection. The charge injection shall be as shown in figure 10. 3.5.11 Off isolation. The Off isolation shall be as shown in figure 11. 3.5.12 Channel to channel crosstalk. The channel to channel crosstalk shall be as shown in figure 12. 3.5.13 Bandwidth. The bandwidth shall be as shown in figure 13. DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/11608 PAGE 4 TABLE I. Electrical performance characteristics. 1/ Test Symbol Limits Test conditions 2/ unless otherwise specified TA = 25C Min Max Unit -55C ≤ TA ≤ +125C Min Max DUAL SUPPLY Analog switch Analog signal range On resistance VDD = +4.5 V, VSS = -4.5 V VS = ±4.5 V, IDS = -10 mA See figure 5 RON Match between channels ∆RON VS = ±4.5 V, IDS = -10 mA On resistance flatness RFLAT (ON)) VS = ±3.3 V, IDS = -10 mA Leakage currents (VDD = +5.5 V, VSS = -5.5 V) Source off leakage, IS(Off) VS = ±4.5 V, VD = ±4.5 V, See figure 6 Channel On leakage, ID, IS VS = VD = ±4.5 V, (On) See figure 7 Digital inputs Input high voltage VINH Input low voltage VINL Input current, INL or INH VIN = VINL or VINH Digital input capacitance CIN Dynamic characteristic 3/ tON RL = 300 Ω, CL = 35 pF, VS = 3.3 V, See figure 8 tOFF Break before make time delay tBBM RL = 300 Ω, CL = 35 pF, VS1 = VS2 = 3.3 V, See figure 9 Charge injection VS -= 0 V, RS = 0 Ω, CL = 1 nF, See figure 10 Off isolation RL = 50 Ω, CL = 5 pF, f = 1 MHz, See figure 11 Channel to channel crosstalk RL = 50 Ω, CL = 5 pF, f = 1 MHz, See figure 12 Bandwidth -3 dB RL = 50 Ω, CL = 5 pF, See figure 13 CS (Off) f = 1 MHz CD, CS (On) Power requirements (VDD = +5.5 V, VSS = -5.5 V) IDD Digital inputs = 0 V or 5.5 V ISS RON 6.5 VSS VDD 10 1.1 1.35 1.45 1.6 ±0.25 ±3 ±0.25 ±25 V Ω nA 2.4 0.05 TYP 2 TYP 220 75 70 TYP V 0.8 ±0.1 µA pF 390 135 ns 10 6 TYP - 67 TYP - 67 TYP 190 TYP 25 TYP 95 TYP 0.001 TYP 0.001 TYP pC dB MHz pF 1.0 1.0 µA µA See footnotes at end of table. DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/11608 PAGE 5 TABLE I. Electrical performance characteristics Continued. 1/ Test Symbol Limits Test conditions 2/ unless otherwise specified TA = 25C Min Max Unit -55C ≤ TA ≤ +125C Min Max SINGLE SUPPLY Analog switch Analog signal range On resistance RON RON Match between channels ∆RON On resistance flatness RFLAT (ON)) Leakage currents (VDD = +5.5 V) Source off leakage, IS(Off) Channel On leakage, Digital inputs Input high voltage Input low voltage Input current, Digital input capacitance Dynamic characteristic 3/ tON tOFF Break before make time delay ID, IS (On) VINH VINL INL or INH CIN tBBM Charge injection Off isolation Channel to channel crosstalk Bandwidth -3 dB CS (Off) CD, CS (On) Power requirements (VDD = +5.5 V) IDD 1/ 2/ 3/ VDD = +4.5 V, VSS = -0 V VS = 0 V to 4.5 V, IDS = -10 mA See figure 5 VS = 0 V to 4.5 V, IDS = -10 mA VS =1.5 V to 3.3 V, IDS = -10 mA 0 VS = 1 V/4.5 V, VD = 4.5 V/1 V, See figure 6 VS = VD = ±4.5 V, See figure 7 10 VDD 14 1.1 0.5 TYP 1.4 1.4 ±0.25 ±3 ±0.25 ±25 V Ω nA 2.4 VIN = VINL or VINH 0.05 TYP 2 TYP RL = 300 Ω, CL = 35 pF, VS = 3.3 V, See figure 8 RL = 300 Ω, CL = 35 pF, VS1 = VS2 = 3.3 V, See figure 9 VS -= 0 V, RS = 0 Ω, CL = 1 nF, See figure 10 RL = 50 Ω, CL = 5 pF, f = 1 MHz, See figure 11 RL = 50 Ω, CL = 5 pF, f = 1 MHz, See figure 12 RL = 50 Ω, CL = 5 pF, See figure 13 f = 1 MHz Digital inputs = 0 V or 5.5 V 120 75 40 TYP V 0.8 ±0.1 µA pF 215 105 ns 10 110 TYP - 67 TYP - 67 TYP 190 TYP 25 TYP 95 TYP 0.001 TYP pC dB MHz pF 1.0 µA Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or design. VDD = 5 V ±10%, VSS = 0 V, GND = 0 V, -55C ≤ TA ≤ 125C, unless otherwise noted. Guaranteed by design, not subject to production test. DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/11608 PAGE 6 Case X Symbol A A1 A2 b c D Dimensions Millimeters Symbol Min Max 0.90 0.05 0.95 0.22 0.08 2.80 1.30 0.15 1.45 0.38 0.22 3.00 E E1 e L L1 Millimeters Min Max 1.50 1.70 2.60 3.00 0.65 BSC 0.30 0.60 0.60 BSC FIGURE 1. Case outline. DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/11608 PAGE 7 Case outline X Pin No. 1 2 3 4 5 6 7 Mnemonic D S1 GND VDD NC IN VSS 8 S2 Description Drain terminal. Can be an input or output Source terminal. Can be an input or output Ground (0 V) reference. Most positive power supply No connect. Not internal connected. Logic control input Most negative power supply. This pin is only used in dual supply applications and should be tied to ground in single supply applications. Source terminal. can be an input or output FIGURE 2. Terminal connections. FIGURE 3. Functional block diagram. IN 0 1 Switch S1 On Off Switch S2 Off On FIGURE 4. Truth table. DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/11608 PAGE 8 FIGURE 6. OFF leakage. FIGURE 5. ON Resistance. FIGURE 7. ON Leakage. FIGURE 8. Switching times. FIGURE 9. Break before make time delay. DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/11608 PAGE 9 FIGURE 10. Charge injection. FIGURE 11. Off isolation. DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/11608 PAGE 10 FIGURE 12. Channel to channel crosstalk. FIGURE 13. Bandwidth. DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/11608 PAGE 11 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as indicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturer’s standard commercial practices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturer’s data book. The device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of present or continued availability as a source of supply for the item. Vendor item drawing administrative control number 1/ Device manufacturer CAGE code Vendor part number V62/11608-01XE 24355 ADG619SRJZ-EP-RL7 1/ The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation. CAGE code 24355 DLA LAND AND MARITIME COLUMBUS, OHIO Source of supply Analog Devices Rt 1 Industrial Park PO Box 9106 Norwood, MA 02062 Point of contact: 7910 Triad Center Drive Greensboro, NC 27409-9605 SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/11608 PAGE 12
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