104-DIO-48S

104-DIO-48S & 104-DIO-24S PC/104 48 or 24 L ines of DIGITAL I/O WITH COS K E Y F E AT U R E S : ■ 4 8 or 24 parallel lines of 82C55 digital I/O with tristate buffers FAC T ORY OP T IONS: ■ 8 2C54 with three 16-bit counter/timers for event counting, prevent unintended control of external equipment ■ I RQ on input change of state (COS) eliminates the need for f requency output, pulse width and frequency measurement ■ 0 to 70°C and -40 to +85°C versions available ■ Economy version without COS feature ■ Pull-down resistors on I/O lines ■ Vertical I/O connector pins constant polling ■ H igh sink/source current 64mA/32mA ■ I /O pulled up to 5V for contact monitoring ■ Compatible with Opto-22 and other industry standard I/O racks The 104-DIO-48S and 104-DIO-24S provide a total of 48 or 24 lines of digital I/O with counter/timer for PC/104-based data acquisition. This low-cost, highperformance, reliable board features Change of State (COS) detection on userselected ports, allowing the board to generate an interrupt port by port. Since one READ determines the data, there is no need for constant polling, which greatly reduces processor overhead and allows applications to run more smoothly. The 104-DIO-48S board uses two 82C55A chips to provide a computer interface to the 48 I/O lines. Each chip provides two 8-bit ports and two 4-bit ports with software programmable direction. Each I/O line is buffered and capable of sourcing 32mA or sinking 64mA. Pull-ups to 5V are provided for contact monitoring. Optionally available is an 82C54 chip that includes three 16-bit counter/timers factory configured in an optimal module for use as event counters, frequency output, pulse width, and frequency measurement. Connections are made via two industrystandard 50-pin headers plus one ten-pin header for the optional counter/timer. S O F T WA R E The 104-DIO-48S is supported for use in most operating systems and includes a free DOS, Linux and Windows 95/98/Me/ NT/2000/XP/2003 compatible software package. This includes sample programs and source code in "C" and Pascal for DOS, and Visual Basic, Delphi, C++ Builder, and Visual C++ for Windows. Also included is a graphical setup program in Windows. Embedded OS support includes Windows XPe and CE. Linux support includes installation files and basic samples for programming from any user level via an open source kernel driver. Advanced Digital Logic, Inc. 4411 Morena Blvd. Suite 101 San Diego, CA 92117 E mail: s ales @adlogic-pc104.com W ebsite: w ww. adlogic-pc104 .com Tel: ( 858) 490-0597 F ax: ( 858) 490- 0599 104-DIO-48S & 104-DIO-24S PC/104 DIGITAL I/O Block Diagram & Pin Configuration I/O Header Port C Hi Port C Hi Port C Hi Port C Hi Port C Lo Port C Lo Port C Lo Port C Lo Port B Port B Port B Port B Port B Port B Port B Port B Port A Port A Port A Port A Port A Port A Port A Port A PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0 PB7 PB6 PB5 PB4 PB3 PB2 PB1 PB0 PA7 PA6 PA5 PA4 PA3 PA2 PA1 PA0 +5 VDC 01 03 05 07 09 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 02 04 06 08 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND Clock 0 Input Output 0 Gate 1 Input Clock 2 Input Output 2 48 or 24 L ines of WITH COS CTR/Timer 01 03 05 07 09 02 04 06 08 10 Gate 0 Input 1MHz Clock (out) Output 1 Gate 2 Input Ground Specifications Digit al I/O Chip Number of I/O lines Direction Sink and source current Pullup resistors Change of state detection (COS) Throughput Power output 82C55A (each supports 24 lines) 48 or 24 TTL/CMOS compatible Programmable as inputs or outputs in two groups of 4 and 8 per 82C55A 64mA and 32mA respectively 10K all input lines with optional pull-downs Port by port selectable on rising and falling edge Output voltage Up to 1 Megabyte per second Re-settable fused +5V at 500mA per 50-pin connector Count er/T imer s Chip Counter/timers Maximum input frequency On-board time-base Signal type Input voltage Type 82C54 3 x 16 bit 10MHz 1MHz TTL Logic low: -0.5V min, 0.8V max; Logic high: 2.0V min, 5.0V max Logic low: 0.0V min, 0.4V max; Logic high: 3.0V min, 5.0V max Gener al Power required +5V at 50mA typical, all outputs open 0 to 70°C, optional -40 to +85°C, all versions -50 to 120°C 5% to 95% RH, non-condensing Operating temperature Storage temperature Operating humidity Int er r upts Number of interrupts Interrupt requests Interrupt sources 11 IRQ's 3-7, 9-12, 14, 15 Counter/timer outputs, external interrupt input, or DIO lines with change of state detection enabled by software O rdering Guide 104-DIO-48S 104-DIO-24S 48 lines of digital I/O with change of state detection 24 lines of digital I/O with change-of-state detection Advanced Digital Logic, Inc. 4411 Morena Blvd. Suite 101 San Diego, CA 92117 E mail: s ales @adlogic-pc104.com W ebsite: w ww. adlogic-pc104 .com Tel: ( 858) 490-0597 F ax: ( 858) 490- 0599 © Copyright 2006 Advanced Digital Logic, Inc. Specifications subject to change without notice.