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ADT7310

ADT7310

  • 厂商:

    ADTECH

  • 封装:

  • 描述:

    ADT7310 - system specific power supply IC that is suitable for color CCD camera - ADTech

  • 数据手册
  • 价格&库存
ADT7310 数据手册
ADT7310 General Description The ADT7310 is system specific power supply IC that is suitable for color CCD camera. Other features include over-current protection, thermal shutdown. It reduces design complexity and external component count. Package outline of the ADT7310 ADT7310 YYWW Features • Input voltage range : 4.75V to 18V • Multiple output voltage channel available - 2 channel 3.3V outputs , 200mA / 60mA max. - 1.8V output , 40mA max. - 5V boost converter output , 100mA max. - 15V output , 10mA max. - Externally adjustable negative voltage output (-7V typical) • Power-on-reset output & power sequence • Protection : thermal shutdown , over-current protection Applications • Color CCD camera • CCTV camera • distributed power system (3.3V / 1.8V / 5V / 15V / -7V) • Small size(5x5 mm2 body) and thermally enhanced 28 Pin MLF Package Typical Application Circuit CF1 L2 D2 U1 CL1 VIN QN1 5V 1.8V C2 CL7 C20 Rs2 C100 U2 C200 Rs1 CF2 CL2 QP1 C10 U0 (ADT7310) CF3 U3 Rn2 L1 C1 CL6 C30 CL4 Ct CL5 -7V Rn1 CL3 VIN2 15V D1 RBO 3.3VD C40 3.3VA * This specifications are subject to be changed without notice Oct. 17. 2008 / Rev. 0.0 1/15 http://www.ad-tech.co.kr ADT7310 Part List Component U0 U1, 2, 3 QP1 QN1 D1, D2 L1 L2 C1 , 2 C100 C200 CF1 , 2 , 3 CL1 , 2 , 3 C10 C20 C30 Ct CL4, 5, 7 CL6 C40 Rs1 , 2 Rn1 Rn2 IC IC Chip transistor Chip transistor Chip SBD Chip inductor Chip inductor MLCC Tantalum capacitor MLCC MLCC MLCC MLCC MLCC MLCC MLCC MLCC MLCC MLCC Chip resistor Chip resistor Chip resistor Type ADT7310 BAT54SWT1 2SB1424 MMBT4401LT1 RSX101M-30 47uH / 590mA (SLF6028T-470MR59) 47uH / 590mA (SLF6028T-470MR59) 10uF / 10V / X5R 10uF / 25V (T91C106K025AT) 0.1uF / 25V 1uF / 25V / X5R 2.2uF / 25V / X5R 1nF 22nF 22nF 18pF 2.2uF / 25V / X5R 4.7uF / 25V / X5R 10nF 0.1Ω / 1% 45.3㏀ / 1% 12.1㏀ / 1% Value ( Model ) Manufacturer ADTech ON Semiconductor ROHM ON Semiconductor ROHM TDK TDK Murata KEMET Murata Murata Murata Murata - ※ SBD (Schottky Barrier Diode) * This specifications are subject to be changed without notice Oct. 17. 2008 / Rev. 0.0 2/15 http://www.ad-tech.co.kr ADT7310 Pin Configuration 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 ADT7310 18 17 16 15 Pin Description Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Name RS2 VIN1 RS1 PWM CC1 GND2 VIN2 VO1 GND3 DLY RBO CT VO2 GND4 VHO VREG VNO1 DRV3 GND5 VIN5 DRV2 VIN4 GND6 VLO VIN3 DRV1 CC2 GND1 I/O I I O O O O O O O O O I O O O O O - I : Input , O : Output , IO : Input/Output , P : Power , G : Ground , A : Analog , D : Digital Type A P A D A G P A G A D A A G A A A D G P D P G A P D A G Description Current sensing and voltage feed-forward for boost converter Main power input Current sensing and voltage feed-forward for buck converter PWM output for buck converter Capacitor terminal for phase compensation of buck converter Ground Second power input 3.3V output for digital part Ground Delay time control for RBO signal Power on reset output Capacitor terminal for tuning oscillation frequency 3.3V output for analog part Ground 15V output for CCD positive voltage Internal reference voltage output Feedback voltage input for VNO (-7V typical) Driving signal output of charge pump inverter Ground Power input for 15V output Driving signal output of charge pump doubler Power input for charge pump block Ground 1.8V output Feedback voltage input for boost converter PWM output for boost converter Capacitor terminal for phase compensation of boost converter Ground * This specifications are subject to be changed without notice Oct. 17. 2008 / Rev. 0.0 3/15 http://www.ad-tech.co.kr ADT7310 Functional Block Diagram RS2 CC2 DRV1 5V 1.8V VIN1 Internal Reg BIAS OSC PWM controller LDO VIN4 C/P doubler Thermal Shutdown RS1 PWM CC1 DRV2 VIN5 PWM controller Power Sequencer C/P inverter feedback DRV3 VNO1 VIN2 LDO POR LDO LDO 15V 3.3VD RBO 3.3VA * This specifications are subject to be changed without notice Oct. 17. 2008 / Rev. 0.0 4/15 http://www.ad-tech.co.kr ADT7310 Absolute Maximum Ratings Parameter Power supply voltage Power dissipation (Ta=70℃) *1 Storage temperature Junction temperature Thermal resistance Symbol VIN PDmax TSTG TJmax ΘJA Min. -65 Typ. 35 Max. 20 2.2 +150 +150 Unit V W ℃ ℃ ℃/W *1 derate 35℃/W above +70℃. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Operating Ratings Parameter Power supply voltage Operating temperature Junction temperature Max. power dissipation (Ta=70℃)*1 Symbol VIN TOPR TJ PD Min. 4.75 -20 Typ. 12 Max. 18 +85 +125 1.5 Unit V ℃ ℃ W *1 This spec. indicates that junction temperature of the device is under 125℃. In specific applications, this is recommended under this power dissipation specification. Electrical Characteristics (Ta = 25℃ , VIN = 12V , unless otherwise noted.) Parameter Basic Function Operating supply voltage ICC with no load Tdelay Power on reset VOH Over-temperature protection Efficiency Switching frequency Buck Converter (+3.7V output) Output voltage (VIN2) VIN=12V 3.5 3.7 3.9 V On Off VIN=12V, w/o loading VIN=12V , C30 =22㎋ Junction temperature at OT enable Junction temperature at OT release VIN=12V , max. load current Continuous mode , Ct=13㎊ Continuous mode , Ct=18㎊ 4.75 5.0 3.0 400 300 12 8.0 8.5 3.3 140 110 58 500 400 18 11.0 3.6 600 500 V ㎃ ㎳ V ℃ ℃ % ㎑ ㎑ Note1 Note2 Condition Min Typ Max Unit Note * This specifications are subject to be changed without notice Oct. 17. 2008 / Rev. 0.0 5/15 http://www.ad-tech.co.kr ADT7310 Electrical Characteristics (continued) Parameter +3.3VD output Output voltage Output drive current Current limit Load regulation Ripple rejection +3.3VA output Output voltage Output drive current Current limit Load regulation Ripple rejection +1.8V output Output voltage Output drive current Current limit Load regulation Ripple rejection +15V output Output voltage Output drive current Current limit Load regulation VIN=12V , IO=5㎃ VIN=12V VIN=12V IO=0 to 10㎃ 14.55 15.00 5 20 30 15.45 10 50 V ㎃ ㎃ ㎷ VIN=12V , IO=25㎃ VIN=12V VIN=12V IO=0 to 40㎃ IO=40㎃ , freq=10㎑ 1.7 1.8 25 200 20 40 1.9 40 40 V ㎃ ㎃ ㎷ ㏈ VIN=12V , IO=50㎃ VIN=12V VIN=12V IO=0 to 60㎃ IO=60㎃ , freq=10㎑ 3.0 3.3 50 180 60 40 3.6 60 100 V ㎃ ㎃ ㎷ ㏈ VIN=12V , IO=180㎃ VIN=12V VIN=12V IO=0 to 200㎃ IO=200㎃ , freq=10㎑ 3.0 3.3 180 480 90 40 3.6 200 200 V ㎃ ㎃ ㎷ ㏈ Condition Min. Typ. Max. Unit Note -7V output (Rn1=45.3㏀ , Rn2=12.1㏀ , unless otherwise noted.) Output voltage Output drive current Load regulation Boost Converter (+5V output) Output voltage (VIN3) Maximum output current VIN=12V , IO=80㎃ VIN=12V 4.75 5.00 50 5.25 100 V ㎃ VIN=12V , Io=-2㎃ Inflow current Io=0 to -5㎃ -7.5 -7.0 2 30 -6.5 5 100 V ㎃ ㎷ Note 1. This switching frequency is suitable to 5V VIN operating condition. Note 2. This switching frequency is suitable to 12V VIN operating condition. * This specifications are subject to be changed without notice Oct. 17. 2008 / Rev. 0.0 6/15 http://www.ad-tech.co.kr ADT7310 Typical Performance Characteristics 3.3VD Change vs. Temperature 3.0 3.3VD Change (%) 3.3VA Change (%) 2.0 1.0 0.0 -1.0 -2.0 -3.0 -20 0 20 40 60 80 Temperature (℃) 100 120 3.0 2.0 1.0 0.0 -1.0 -2.0 -3.0 -20 0 20 40 60 80 Temperature (℃) 100 120 3.3VA Change vs Temperature 5V Change vs Temperature 3.0 2.0 1.0 0.0 -1.0 -2.0 -3.0 -20 0 20 40 60 80 Temperature (℃) 100 120 1.8V Change (%) 5V Change (%) 3.0 2.0 1.0 0.0 -1.0 -2.0 -3.0 -20 0 1.8V Change vs Temperature 20 40 60 80 Temperature (℃) 100 120 15V Change vs Temperature 3.0 2.0 15V Change (%) 1.0 0.0 -1.0 -2.0 -3.0 -20 0 20 40 60 80 Temperature (℃) 100 120 -7V Change (%) 3.0 2.0 1.0 0.0 -1.0 -2.0 -3.0 -20 0 -7V Change vs Temperature 20 40 60 80 Temperature (℃) 100 120 * This specifications are subject to be changed without notice Oct. 17. 2008 / Rev. 0.0 7/15 http://www.ad-tech.co.kr ADT7310 Typical Performance Characteristics Switching Frequency vs Temperature 500 475 Frequency (kHz) 450 425 400 375 350 325 300 -20 0 20 40 60 80 Temperature (℃) 100 120 20 0 200 400 600 Load Current (mA) 800 1000 Efficiency (%) 80 100 Efficiency vs Load Current (Buck) VIN=5V VIN=12V VIN=18V 60 40 * This specifications are subject to be changed without notice Oct. 17. 2008 / Rev. 0.0 8/15 http://www.ad-tech.co.kr ADT7310 Operation Description DEVICE INFORMATION The ADT7310 includes one step down DC-DC switching buck converter, one step up DC-DC switching boost converter, charge pump boost converter, charge pump inverting converter, and several LDOs. Especially produced for powering CCD camera applications, this device provides various power channels for composing the CCD applied camera system. These channel are 3.3V, 5V, 15V , -7V and 1.8V. From these channel, it is possible to supply all the powers required for the application in one power supply device, ADT7310. The ADT7310 is assembled with small size and thermally enhanced MLF (Micro Lead Frame) package. With wide input operating voltage range and one stop power supply configuration, it is very easy to design new specific set. BUCK CONVERTER Buck converter generates internal supply voltage (approximately 3.7V). As required wide input supply range from 4.75V to 18V, intermediate power is needed. From this intermediate power all the channel outputs re-generated. Using a current mode architecture with asynchronous rectification, the buck converter have the ability to deliver sufficient current to the following power supply channels. POWER ON SEQUENCE BOOST CONVERTER 5V output channel is generated by the boost converter. Operating with current mode step-up DC-DC converter, its input voltage is buck converter output voltage (3.7V typical). With this boost converter output, supplied the power at the following charge pump converters for generating +15V and -7V output. Also it is provided +5V output with 100mA load current independently. In case of upper 100mA load, must be considered the device’s heat dissipation constraint. CHARGE PUMP CONVERTER By these converters the ADT7310 provides +15V and -7V channel outputs. For these two channel generation, it is used three charge pump converters, one with externally composed and others with integrated. In case of generating charge pump inverter the part of the inverter are placed at the outside of the device for its inherent limitation of negative voltage operation. -7V inverter is possible to change its output voltage by tuning the external resistors. -7V +15V RBO Note that external resistors for tuning negative voltage output required as accurate as possible. It is recommended 1% accuracy. Because -7V output is generated by two cascaded charge pump converter, this channel has operating voltage limitation. With the operation above -7.5V, it is saturated and its regulation performance degraded. +15V channel is generated with two cascaded charge pump converters and one LDO. This channel output supplied current to CCD device. So, its channel output noise affects image to noise directly. This is why one LDO is added and therefore the ADT7310 provides clear +15V output to the system. LDO This device has four LDOs integrated (+3.3V 2 channel, +15V and +1.8V channel). Because the ADT7310 provided for using CCD camera application, the noise of each channel output must be minimized. Integration of LDOs trade off noiseless output and heat dissipation performance of the device. From these aspect, each channel load capability and input-output dropout conditions are designed. By these considerations this device provides optimum application function. Note that the heavy load current and high line voltage application will produce themal constraint. CCD camera application made by various devices requires many different supply voltages. Also with different operating rating between devices, it is seriously considered to power up sequence. Fortunately CCD camera application has only two critical power supplies, +15V and -7V for powering the CCD. Power on sequence that the system needs is as follows : i) the -7V must be supplied lastly. ii) the +15V must be supplied before the -7V. iii) other power supplies have no order. Followed by the upper sequence, the ADT7310 operate successfully when it is powered up. Further the ADT7310 will monitor +3.3V channel voltage and generate RBO signal to reset the DSP device. This RBO signal also follows after the -7V channel settling. VIN * This specifications are subject to be changed without notice Oct. 17. 2008 / Rev. 0.0 9/15 http://www.ad-tech.co.kr ADT7310 Application Hints LDO CONSIDERATIONS EXTERNAL CAPACITORS The ADT7310’s regulators requires external capacitors for regulator stability. These are specifically designed for CCTV camera applications requiring minimum board space and smallest components. These capacitors must be correctly selected for good performance. OUTPUT CAPACITOR The LDO’s are designed specifically to work with small ceramic output capacitors. And each LDO’s has its own output capacitor ranges. Be sure to be connected proper output capacitor between the output pin and ground. For using MLCC, output capacitor value is good to use more than that of the specified to ‘Typical Application Circuit’. And its required ESR range are between 10mΩ to 1Ω. The output capacitor must meet the requirement for the minimum value of capacitance and also have an ESR value that is within the optimum range for stability. The LDO’s will remain stable and in regulation with no external load. CAPACITOR CHARACTERISTICS The LDO’s are designed to work with ceramic capacitors on the output to take advantage of the benefits they offer. For capacitance values in the range of 0.47uF to 4.7uF, ceramic capacitors are the smallest, least expensive and have the lowest ESR values, thus making them best for eliminating high frequency noise. The ESR of a typical 1.0uF ceramic capacitor is in the range of 20mΩ to 40mΩ. The capacitor value can change greatly, depending on the operation conditions and capacitor type. So, the output capacitor selection should take account of all the capacitor parameters, to ensure that the specification is met within the application. The capacitance can vary with DC bias conditions as well as temperature and frequency of operation. Normally increasing the DC bias condition can result in the capacitance value falling below the minimum specified limit. It is therefore recommended that the capacitor manufacturer’s specifications for the nominal value capacitor are consulted for all conditions. The ceramic capacitor’s capacitance can vary with temperature. The capacitor type X7R, which operates over a temperatuThe saturation current is greater than the sum of the maximum load current and the worst case average to peak inductor current. A 47uH inductor with a saturation current rating of at least 590mA is recommended in this application. The inductor’s resistance should be as low as possible for better efficiency. For CCTV camera application, radiated RF noise from inductor is critical for high definitive video image. In this application, a toroidal or shielded bobbin inductor should be used. INDUCTOR SELECTION There are two main considerations when choosing an inductor; the inductor should not saturate, and the inductor current ripple is small enough to achieve the desired output voltage ripple. Different saturation current rating specs are followed by different manufacturers so attention must be given to details. Saturation current ratings are typically specified at 25℃ so rating at max ambient temperature of application should be requested from manufacturer. Tantalum capacitors are less desirable than ceramic for use as output capacitors because they are more expensive when comparing equivalent capacitance and voltage ratings in the 0.47uF to 4.7uF range. Another important consideration is that tantalum capacitors have higher ESR values than equivalent size ceramics. This means that while it may be possible to find a tantalum capacitor with an ESR value within the stable range, it would have to be larger in capacitance than a ceramic capacitor with the same ESR value. It should also be noted that the ESR of a typical tantalum will increase about 2:1 as the temperature goes from 25℃ down to -40℃, so some guard band must be allowed. re range of -55℃ to +125℃, will only vary the capacitance to within ±15%. The capacitor type X5R has a similar tolerance over a reduced temperature range of -55℃ to +85℃. Many large value ceramic capacitors, larger than 1uF are manufactured with Z5U or Y5V temperature characteristics. Their capacitance can drop by more than 50% as the temperature varies from 25℃ to +85℃. Therefore X7R is recommended over Z5U and Y5V in applications where the ambient temperature will change significantly above or below 25℃. BUCK CONSIDERATIONS * This specifications are subject to be changed without notice Oct. 17. 2008 / Rev. 0.0 10/15 http://www.ad-tech.co.kr ADT7310 Application Hints (continued) OUTPUT CAPACITOR SELECTION Use a 10uF, 10V ceramic capacitor. Use X7R or X5R types, do not use Y5V. The output filter capacitor smoothes out current flow from the inductor to the load, helps maintain a steady output voltage during transient load changes and reduces output voltage ripple. These capacitors must be selected with sufficient capacitance and sufficiently low ESR to perform these functions. The output voltage ripple is caused by the charging and discharging of the output capacitor and also due to its ESR and can be calculated as : Voltage peak-to-peak ripple due to capacitance can be expressed as follows VPP-C = IRIPPLE / (4 * f * C) where IRIPPLE : Average to peak inductor current f : Minimum switching frequency Voltage peak-to-peak ripple due to ESR can be expressed as follows VPP-ESR = (2 * IRIPPLE) * RESR Because these two components are out of phase the rms value can be used to get an approximate value of peak-to-peak ripple. Voltage peak-to-peak ripple, root mean squared can be expressed as follows VPP-RMS = √ (VPP-C2 + VPP-ESR2) Note that the output voltage ripple is dependent on the inductor current ripple and the ESR of the output capacitor. The ESR is frequency dependent (as well as temperature dependent), make sure the value used for calculations is at the switching frequency of the part. INPUT CAPACITOR SELECTION The ADT7310 uses 10uF, 25V tantalum capacitor for input capacitor. Use a mix of input bypass capacitors to control the voltage overshoot. Use ceramic capacitor for the high frequency decoupling and tantalum capacitor to supply the required rms input current. Place the input capacitor as close as possible to the VIN pin of the device. The input filter capacitor supplies current to the PNP switching transistor of the converter in the first half of each cycle and reduces voltage ripple imposed on the input power source. The input current ripple can be calculated as : The load capacitor (CL1,2,3) of the charge pump plays an important part in determining the characteristics of the doubler output. The ESR of the output load capacitor affects charge pump output resistance, which plays a role in determining output current capability. Both output capacitance and ESR affect output voltage ripple. For these reasons, a low value ESR capacitor is recommended. DOUBLER / INVERTER CAPACITOR SELECTION The flying capacitor (CF*) transfers charge from the its input power supply to the output. A polarized capacitor (tantalum, aluminum electrolytic, etc.) must not be used here, as the capacitor will be reverse biased upon start-up of the ADT7310. The size of the flying capacitor and its ESR affect output current capability and ripple characteristic. In this applications, a 1uF, X7R or X5R type ceramic capacitor is recommended for the flying capacitor. where IOUTMAX : maximum load current L : min. inductor value including worst case tolerance CHARGE PUMP CONSIDERATIONS BOOST CONSIDERATIONS INDUCTOR SELECTION As previously mentioned from the inductor selection at the buck converter, inductor at the boost converter also needs to be considered two factors when choosing an inductor; the inductor should not saturate, and the inductor current ripple is small enough to achieve the desired output voltage ripple. By the property of cascading boost converter from buck converter, its inductor saturation current is lower than the that of the buck converter. In this application, the same 47uH adopted and is sufficient. Boost converter drives both its load current and the following charge pump converters for generating +15V and -7V. For proper operation at the power up time this inductor needs more saturation current than its total load current required. OUTPUT CAPACITOR SELECTION Use a 10uF, 10V ceramic capacitor. Use X7R or X5R types, do not use Y5V. (the same component as buck converter) I RMS V = I OUTMAX ∗ 1 − OUT VIN ⎛V r2 ⎞ ∗ ⎜ OUT + ⎟ ⎟ ⎜V ⎝ IN 12 ⎠ (V − VOUT ) ∗ VOUT r = IN L ∗ f ∗ I OUTMAX ∗ VIN * This specifications are subject to be changed without notice Oct. 17. 2008 / Rev. 0.0 11/15 http://www.ad-tech.co.kr ADT7310 Application Hints (continued) The output filter capacitor smoothes out current flow from the inductor to the load, helps maintain a steady output voltage during transient load changes and reduces output voltage ripple . These capacitors must be selected with sufficient capacitance and sufficiently low ESR to perform these functions. Though the output ripple at the boost converter is not critical at the CCD camera application, care must be needed because its output ripple attacks other power supplies composed in the board to add ripple voltage noise and induce noise at the image. So, if produced output ripple don’t affect to the image than it is recommended to choose one by considering component cost. * This specifications are subject to be changed without notice Oct. 17. 2008 / Rev. 0.0 12/15 http://www.ad-tech.co.kr ADT7310 PCB design for optimized thermal performance 1. Overview Temperature characteristic of the ADT7310 is dependant to power dissipation and heat away of the PCB pattern. Therefore, in design of the PCB pattern, Consideration of the heat away characteristic is important. ADT7310 package is designed to provide enhanced thermal characteristics through the exposed PAD on the bottom surface of the package. Exposed PAD effectively decrease the thermal resistance, which in turn provides excellent heat dissipation from the die. In order to take full advantage of exposed PAD, the PCB must have features to effectively conduct heat away from the package. This can be achieved by incorporating thermal PAD and thermal VIAs. PCB to the bottom layers, thermal VIAs need to be incorporated into the thermal pad design. The number of thermal VIAs improve the package thermal performance. Generally, web-constructed VIA is often used in through-hole applications to facilitate the soldering of a pin to a large plane. It has a large thermal resistance to the surrounding layer. For this reason, do not use web-constructed VIA to the thermal PAD. It is recommended use completely connected VIA to the surrounding layer (Figure 2). If the diameter of the VIAs is too large, solder will be pulled away from the exposed paddle (solder wicking) during the reflow process. This will decrease thermal characteristic of the VIA 2. PCB Layout considerations 2.1 Heat transfer For enhanced thermal performance, the exposed PAD on the package needs to be soldered to thermal PAD on the PCB. Furthermore, for proper heat conduction through the PCB, thermal VIAs need to be incorporated in the PCB in the thermal PAD region. The exposed PAD should be attached to the ground plane for proper thermal and electrical performance. Figure 1 illustrates primary heat away through GND layer of the PCB. The presence of large metal planes in the PCB can heat away 90% of the generated heat in the ADT7310 (Reference 1) 3. Recommended PCB patterns Figure 3 and 4 show adoptive PCB pattern of the ADT7310. Top and bottom of the thermal PAD patterns are the same and connected through the thermal VIAs. Also the bottom thermal PAD must be connected to adjacent ground plane. It is recommended that an array of thermal VIAs should be incorporated at 1.0 to 1.2mm pitch with VIA diameter of 0.3 to 0.33mm. 2.2 Thermal PAD To maximize thermal performance, the size of the thermal PAD should at least match the exposed PAD size. The size of the thermal PAD on the bottom PCB layer should be at least as large as the thermal PAD on the top PCB layer. It is recommended that the bottom thermal PAD be thermally connected to a GND layer (Reference 2) 2.3 Thermal VIAs In order to effectively transfer heat from the top layer of the * This specifications are subject to be changed without notice Oct. 17. 2008 / Rev. 0.0 13/15 http://www.ad-tech.co.kr ADT7310 PCB design for optimized thermal performance 4. Stencil MASK In order to effectively remove the heat from the package and to enhance electrical performance the exposed PAD needs to be soldered to the thermal PAD, preferably with minimum voids. If the solder paste coverage is too big, out gassing occurs during reflow process which may cause defects (splatter, solder balling). Therefore, It is recommended that smaller multiple openings in stencil should be used instead of one big opening for printing solder paste on the thermal PAD region (Figure 5). This will typically result in 50 to 80% solder paste coverage 1.0mm dia. Circles @1.2mm Pitch 5. Reflow condition Reflow profile and peak temperature has a strong influence on void formation. Voids in the thermal PAD region reduce as the peak reflow temperature is 250~270℃. Solder extrusion from the bottom side of the PCB reduces as the reflow temperature is reduced. Reference : 1. B.Guenin, “Packaging: Designing for Thermal Performance.” Electronics Cooling, May1997. 2. Application Note: “Application Notes for Surface Mount Assembly of Amkor’s Micro Lead Frame ( MLF) Packages.” Amkor Technology, March2001 * This specifications are subject to be changed without notice Oct. 17. 2008 / Rev. 0.0 14/15 http://www.ad-tech.co.kr ADT7310 Package ; 28MLF, 5mm x 5mm body (units : mm) TOP VIEW SIDE VIEW BOTTOM VIEW * This specifications are subject to be changed without notice Oct. 17. 2008 / Rev. 0.0 15/15 http://www.ad-tech.co.kr
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