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96SD1I-512M400NN-I

96SD1I-512M400NN-I

  • 厂商:

    ADVANTECH(研华)

  • 封装:

    200-SODIMM

  • 描述:

    MODULE DDR SDRAM 512MB 200SODIMM

  • 数据手册
  • 价格&库存
96SD1I-512M400NN-I 数据手册
E/T DDR SODIMM Approval Sheet Customer Product Number M1SF-12MC4103-J Module speed PC-3200 Pin 200 pin CAS Latency CL-3 SDRAM Operating Temp -20 ℃ ~ 85 ℃ Date 26th November 2014 Approval by Customer P/N: Signature: Date: Sales: Sr. Technical Manager: John Hsieh Rev 1.1 November 2014 2008© InnoDisk Corp. All rights reserved InnoDisk Corp. reserves the right to change the Products and Specification without notices. E/T DDR SODIMM 1. Features Key Parameter Data Rate MT/s Industry Speed Nomenclature Grade CL=2 CL=2.5 PC-3200 F 266 333 • JEDEC Standard 200-pin Dual In-Line tRCD tRP tRC CL=3 (ns) (ns) (ns) 400 15 15 55 •Self-Refresh Modes support. • Serial Presence Detect with EEPROM Memory Module • Intend for 400 MHz applications • Self-refresh 7.8µs (TA ≤ +70°C) • Inputs and Outputs are SSTL-2 compatible • SDRAM Operation Temperature • VDD=VDDQ= 2.6 Volt ± 0.2 (PC-3200) - • Differential clock input -20°C ≤ TA ≤ +85°C • Programmable Device Operation: • DLL aligns DQ and DQS transition with CK - transition Burst Type: Sequential or Interleave • Bi-Directional data strobe with one clock cycle - Device CAS# Latency: 2, 2.5 & 3 • Golden Connector (Au: 30μ”.) - Burst Length: 2, 4 or 8 • Built with 512Mb DDR SDRAMs in 400 mil • RoHS Compliant (Section 13) TSOP II packages 2 Rev 1.1 November 2014 2008© InnoDisk Corp. All rights reserved InnoDisk Corp. reserves the right to change the Products and Specification without notices. E/T DDR SODIMM 2. Environmental Requirements iDIMM are intended for use in standard office environments that have limited capacity for heating and air conditioning. Symbol Parameter Rating Units Notes TOPR Operating Temperature (ambient) -20 to +85 °C 1 TSTG Storage Temperature -50 to +100 °C 1 1. The component maximum case temperature (Tcase) shall not exceed the value specified in the DDR DRAM component specification. Rev 1.1 November 2014 2008© InnoDisk Corp. All rights reserved InnoDisk Corp. reserves the right to change the Products and Specification without notices. E/T DDR SODIMM 3. Ordering Information Extend Temperature DDR SODIMM Part Number Density M1SF-12MC4103-J 512MB DIMM Number of Number of Organization DRAM rank 64M x64 8 1 Speed PC-3200 ECC N/A Rev 1.1 November 2014 2008© InnoDisk Corp. All rights reserved InnoDisk Corp. reserves the right to change the Products and Specification without notices. E/T DDR SODIMM 4. Pin Configurations (Front side/Back side) Rev 1.1 November 2014 2008© InnoDisk Corp. All rights reserved InnoDisk Corp. reserves the right to change the Products and Specification without notices. E/T DDR SODIMM 5. Architecture Pin Definition Pin Name Description Pin Name Description CK0 – CK1 A0 - A13 SDRAM address bus (A14 or A15) Differential SDRAM Clocks /CK0 - /CK1 BA0 - BA1 SDRAM Bank Address Inputs SCL SDRAM row address strobe SDA Serial Presence Detect Clock Input (or BA2) Serial Presence Detect Data RAS# input/output Serial Presence Detect Address CAS# SDRAM column address strobe SA0 – SA1 Inputs WE# S0# - S1# SDRAM write enable VDD Power Supply DIMM Rank Select Lines VDDID VDD Identification Flag CK0 – CKE1 SDRAM clock enable lines VDDQ SDRAM I/O Driver power supply DQ0 – DQ63 DIMM memory data bus VREF SDRAM I/O Reference supply DIMM ECC check bit VSS Ground CB0 – CB7 Serial EEPROM positive power DQS0 – DQS17 SDRAM data strobes VDDSPD supply DM0 – DM7 NC SDRAM data masks Reset Reset enable Spare Pin Rev 1.1 November 2014 2008© InnoDisk Corp. All rights reserved InnoDisk Corp. reserves the right to change the Products and Specification without notices. E/T DDR SODIMM 6. Function Block Diagram: - (512B, 1 Rank 64Mx8 DDR SODIMM) /S0 DQS0 /DQS0 DM0 /DQS4 DQS4 DM4 DM /CS /DQS I/ O 0 I/ O 1 I/ O 2 I/ O 3 D0 I/ O 4 I/ O 5 I/ O 6 I/ O 7 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQS DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 /DQS DM /CS /DQS I/ O 0 I/ O 1 I/ O 2 I/ O 3 D5 I/ O 4 I/ O 5 I/ O 6 I/ O 7 DQS DM /CS /DQS I/ O 0 I/ O 1 I/ O 2 I/ O 3 D6 I/ O 4 I/ O 5 I/ O 6 I/ O 7 DQS DM /CS /DQS I/ O 0 I/ O 1 I/ O 2 I/ O 3 D7 I/ O 4 I/ O 5 I/ O 6 I/ O 7 DQS DQS5 /DQS5 DM5 DQS1 /DQS1 DM1 DM /CS /DQS I/ O 0 I/ O 1 I/ O 2 I/ O 3 D1 I/ O 4 I/ O 5 I/ O 6 I/ O 7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQS DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQS2 /DQS2 DM2 DQS6 /DQS6 DM6 DM /CS /DQS I/ O 0 I/ O 1 I/ O 2 I/ O 3 D2 I/ O 4 I/ O 5 I/ O 6 I/ O 7 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQS DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQS3 /DQS3 DM3 DQS7 /DQS7 DM7 DM /CS /DQS I/ O 0 I/ O 1 I/ O 2 I/ O 3 D3 I/ O 4 I/ O 5 I/ O 6 I/ O 7 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 BA0-BA2 A0-A15 /RAS /CAS /WE CKE0 ODT0 DM /CS DQS I/ O 0 I/ O 1 I/ O 2 I/ O 3 D4 I/ O 4 I/ O 5 I/ O 6 I/ O 7 DQS BA0-BA2:SDRAMs D0-D7 A0-A15:SDRAMs D0-D7 /RAS:SDRAM D0-D7 /CAS:SDRAM D0-D7 /WE:SDRAM D0-D7 CKE0:SDRAM D0-D7 ODT0:SDRAM D0-D7 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 V DDSPD V DDQ V DD Serial PD D0-D7 D0-D7 D0-D7 D0-D7 V REF VSS Serial PD SCL Notes: 1. DQ-to-I/O wiring is shown as recommended but may be change. A1 WP A0 2. DQ, DQS, /DQS, ODT, DM, CKE, /S relationships must be maintained as shown. 3. DQ, DM, DQS,/DQS resistors: Refer to associated topology diagram. SA0 SA1 4. Bax, Ax, /RAS, /CAS, /WE resistor: refer to associated topology diagram. 5. Refer to the appropriate clock writing topology under the DIMM wwiring details section of this document A2 SDA SA2 Rev 1.1 November 2014 2008© InnoDisk Corp. All rights reserved InnoDisk Corp. reserves the right to change the Products and Specification without notices. E/T DDR SODIMM 7. SDRAM Absolute Maximum Ratings Symbol Rating Units Operation Temperature -20 to 85 °C Storage Temperature -55 to 150 °C VINPUT Voltage input pins relative to Vss -1.0 to +3.6 V VIO Voltage on I/O pins relative to Vss -0.5 to +3.6 V VDD Voltage on VDD supply relative to Vss -1.0 to +3.6 V Voltage on VDDQ supply relative to Vss -1.0 to +3.6 V 50 mA TA TSTG VDDQ IOS Note: Parameter Output short Circuit Current Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is stress rating only, and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 8. AC & DC Operating Conditions - AC Operating Conditions (TCASE =-20 °C ~ 85 °C; VSS=0V) Value Symbol Parameter Units Min Max Notes VIH (AC) Input High (Logic1) Voltage VREF + 0.31 - V VIL (AC) Input Low (Logic0) Voltage - VREF + 0.31 V VID (AC) Input differential Voltage: CK, /CK 0.7 VDDQ + 0.6 V 1 VIX (AC) Input crossing point Voltage: CK, /CK 0.5* VDDQ + 0.2 0.5* VDDQ - 0.2 V 2 Note: 1. VID is the magnitude of the difference between the input level on CK and the input on /CK. 2. The value of VIX is expected to equal 0.5*V DDQ of the transmitting device and must track variations in the DC level of the same. 8 Rev 1.1 November 2014 2008© InnoDisk Corp. All rights reserved InnoDisk Corp. reserves the right to change the Products and Specification without notices. E/T DDR SODIMM - DC Electrical Characteristics and Operating Conditions (TCASE =-20 °C ~ 85 °C; VSS = 0V) Symbol Parameter Min Typ. Max Units Supply Voltage (DDR266,333) 2.5 2.6 2.7 V Supply Voltage (DDR400) 2.5 2.6 2.7 V Supply Voltage (DDR266,333) 2.3 2.5 2.7 V Supply Voltage (DDR400) 2.5 2.6 2.7 V Notes VDD VDDQ VIH (DC) Input High (Logic1) Voltage VIL (DC) Input Low (Logic0) Voltage VTT VREF Termination Voltage I/O Reference Voltage VREF + 0.15 - VDDQ + 0.3 V 1 -0.3 - VREF - 0.15 V 1 VREF-0.04 VREF VREF+0.04 V 3 0.49VDDQ 0.5VDDQ 0.51VDDQ V 2 VIN(DC) Input Voltage Level: CK, /CK -0.3 - VDDQ + 0.3 V VID(DC) Input Differential Voltage: CK, /CK 0.36 - VDDQ + 0.6 V V-I Matching 0.71 - 1.4 VI(RATIO) V Note: 1. Inputs are not recognized as valid until VREF stabilizes. 2. VREF is expected to be equal to 0.5 V DDQ of the transmitting device, and to track variations in the DC level of the same. Peak-to-peak noise on VREF may not exceed 2% of the DC value. 3. VTT of transmitting device must track VREF of receiving device. Rev 1.1 November 2014 2008© InnoDisk Corp. All rights reserved InnoDisk Corp. reserves the right to change the Products and Specification without notices. E/T DDR SODIMM 9. Operating, Standby, and Refresh Currents - 512MB SODIMM (1 Rank, 64Mx8 DDR SDRAMs TCASE = -20 °C ~ 85 °C) Symbol Parameter/Condition PC-3200 Unit 760 mA 920 mA 80 mA 280 mA 360 mA 480 mA 1080 mA 1160 mA 1280 mA 40 mA 1680 mA One bank; Active - Precharge; tRC=tRC(min); tCK=tCK(min); DQ,DM and DQS inputs changing I DD0 twice per clock cycle; address and control inputs changing once per clock cycle One bank; Active - Read - Precharge; Burst Length=2; tRC=tRC(min); tCK=tCK(min); address I DD1 and control inputs changing once per clock cycle I DD2P All banks idle; Power down mode; CKE=Low, tCK=tCK(min) /CS=High, All banks idle; tCK=tCK(min); CKE= High; address and control inputs changing once I DD2F per clock cycle.VIN=VREF for DQ, DQS and DM I DD3P One bank active ; Power down mode; CKE=Low, tCK=tCK(min) /CS=HIGH; CKE=HIGH; One bank; Active-Precharge;tRC=tRAS(max); tCK=tCK(min); DQ, DM I DD3N and DQS inputs changing twice per clock cycle; Address and other control inputs changing once per clock cycle Burst=2; Reads; Continuous burst; One bank active; Address and control inputs changing once I DD4R per clock cycle; tCK=tCK(min); IOUT=0mA Burst=2; Writes; Continuous burst; One bank active; Address and control inputs changing once I DD4W per clock cycle; tCK=tCK(min); DQ, DM and DQS inputs changing twice per clock cycle tRC=tRFC(min) - 8*tCK for DDR200 at 100Mhz, 10*tCK for I DD5 DDR266A & DDR266B at 133Mhz; distributed refresh I DD6 CKE=
96SD1I-512M400NN-I 价格&库存

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96SD1I-512M400NN-I
  •  国内价格 香港价格
  • 1+423.014161+52.63967

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