AQD-SD4U16E24-SE

260 Pin DDR4 1.2V 2400 ECC SO-DIMM 16GB Based on 1Gx8 AQD-SD4U16E24-SE Advantech AQD-SD4U16E24-SE Datasheet Rev. 1.0 2017-03-13 Advantech 1 260 Pin DDR4 1.2V 2400 ECC SO-DIMM 16GB Based on 1Gx8 AQD-SD4U16E24-SE Description Pin Identification DDR4 1.2V ECC SO-DIMM is high-speed, low power Symbol memory module that use 1Gx8bits DDR4 SDRAM in Function A0–A16 Register address input BA0, BA1 Register bank select input BG0, BG1 Register bank group select input RAS_n1 Register row address strobe input CAS_n2 Register column address strobe input on both edges of DQS. Range of operation frequencies, WE_n3 Register write enable input programmable latencies allow the same device to be CS0_n, CS1_n, DIMM Rank Select Lines input useful for a variety of high bandwidth, high performance CKE0, CKE1 Register clock enable lines input FBGA package and a 4096 bits serial EEPROM on a 260-pin printed circuit board. DDR4 1.2V ECC SO-DIMM is a Dual In-Line Memory Module and is intended for mounting into 260-pin edge connector sockets. Synchronous design allows precise cycle control with the use of system clock. Data I/O transactions are possible memory system applications. Register on-die termination control lines ODT0, ODT1 input Features  RoHS compliant products ACT_n Register input for activate input DQ0–DQ63 DIMM memory data bus  VDDQ=1.2V (1.14V to 1.26V) CB0–CB7 DIMM ECC check bits  Clock Freq: 1200MHZ for 2400Mb/s/Pin DQS0_t– Data Buffer data strobes (positive line DQS17_t of differential pair) DQS0_c– Data Buffer data strobes (negative line DQS17_c of differential pair)  JEDEC standard 1.2V (1.14V to 1.26V) Power supply  16 Banks (4 Bank Groups)  Programmable CAS Latency: 10, 11, 12, 13, 14,15,16, 17,18  Programmable Additive Latency (Posted /CAS): Register clock input (positive line of 0,CL-2 or CL-1 clock CK0_t, CK1_t  Programmable /CAS Write Latency (CWL) = 12,16 (DDR4-2400) differential pair) Register clocks input (negative line of  8 bit pre-fetch CK0_c, CK1_c differential pair)  Burst Length: 4, 8 I2C serial bus clock for SPD/TS and  Bi-directional Differential Data-Strobe SCL register  On Die Termination with ODT pin  Serial presence detect with EEPROM I2C serial bus data line for SPD/TS and SDA  Asynchronous reset register  PCB: 30µ gold finger I2C slave address select for SPD/TS SA0–SA2 and register PARITY Advantech 2 Register parity input 260 Pin DDR4 1.2V 2400 ECC SO-DIMM 16GB Based on 1Gx8 AQD-SD4U16E24-SE VDD SDRAM core power supply VPP SDRAM activating power supply SDRAM command/address reference VREFCA supply VSS Power supply return (ground) VDDSPD Serial SPD/TS positive power supply ALERT_n Register ALERT_n output Set Register and SDRAMs to a Known RESET_n State SPD signals a thermal event has EVENT_n occurred VTT SDRAM I/O termination supply RFU Reserved for future use NC No Connection Advantech 3 260 Pin DDR4 1.2V 2400 ECC SO-DIMM 16GB Based on 1Gx8 AQD-SD4U16E24-SE Dimensions (Unit: millimeter) Advantech 4 260 Pin DDR4 1.2V 2400 ECC SO-DIMM 16GB Based on 1Gx8 AQD-SD4U16E24-SE Pin Assignments Pin No. Pin name-Front Pin No. Pin name-Back Pin No. Pin name-Front Pin No. Pin name-Back 1 VSS 2 VSS 133 A1 134 EVENT_n 3 DQ5 4 DQ4 135 VDD 136 VDD 5 VSS 6 VSS 137 CK0_t 138 CK1_t 7 DQ1 8 DQ0 139 CK0_c 140 CK1_c 9 VSS 10 VSS 141 VDD 142 VDD 11 DQS0_c 12 DM0_n, DBI0_n 143 PARITY 144 A0 13 DQS0_t 14 VSS 145 BA1 146 A10/AP 15 VSS 16 DQ6 147 VDD 148 VDD 17 DQ7 18 VSS 149 CS0_n 150 BA0 19 VSS 20 DQ2 151 A14/WE_n 152 A16/RAS_n 21 DQ3 22 VSS 153 VDD 154 VDD 23 VSS 24 DQ12 155 ODT0 156 A15/CAS_n 25 DQ13 26 VSS 157 CS1_n 158 A13 27 VSS 28 DQ8 159 VDD 160 VDD 29 DQ9 30 VSS 161 ODT1 162 C0, CS2_n, NC 31 VSS 32 DQS1_c 163 VDD 164 VREFCA 33 DM1_n, DBI1_n 34 DQS1_t 165 C1, CS3_n, NC 166 SA2 35 VSS 36 VSS 167 VSS 168 VSS 37 DQ15 38 DQ14 169 DQ37 170 DQ36 39 VSS 40 VSS 171 VSS 172 VSS 41 DQ10 42 DQ11 173 DQ33 174 DQ32 43 VSS 44 VSS 175 VSS 176 VSS 45 DQ21 46 DQ20 177 DQS4_c 178 DM4_n, DBI4_n 47 VSS 48 VSS 179 DQS4_t 180 VSS 49 DQ17 50 DQ16 181 VSS 182 DQ39 51 VSS 52 VSS 183 DQ38 184 VSS 53 DQS2_c 54 DM2_n, DBI2_n 185 VSS 186 DQ35 55 DQS2_t 56 VSS 187 DQ34 188 VSS 57 VSS 58 DQ22 189 VSS 190 DQ45 59 DQ23 60 VSS 191 DQ44 192 VSS 61 VSS 62 DQ18 193 VSS 194 DQ41 63 DQ19 64 VSS 195 DQ40 196 VSS 65 VSS 66 DQ28 197 VSS 198 DQS5_c Advantech 5 260 Pin DDR4 1.2V 2400 ECC SO-DIMM 16GB Based on 1Gx8 AQD-SD4U16E24-SE 67 DQ29 68 VSS 199 DM5_n, DBI5_n 200 DQS5_t 69 VSS 70 DQ24 201 VSS 202 VSS 71 DQ25 72 VSS 203 DQ46 204 DQ47 73 VSS 74 DQS3_c 205 VSS 206 VSS 75 DM3_n, DBI3_n 76 DQS3_t 207 DQ42 208 DQ43 77 VSS 78 VSS 209 VSS 210 VSS 79 DQ30 80 DQ31 211 DQ52 212 DQ53 81 VSS 82 VSS 213 VSS 214 VSS 83 DQ26 84 DQ27 215 DQ49 216 DQ48 85 VSS 86 VSS 217 VSS 218 VSS 87 CB5, NC 88 CB4, NC 219 DQS6_c 220 DM6_n, DBI6_n 89 VSS 90 VSS 221 DQS6_t 222 VSS 91 CB1, NC 92 CB0, NC 223 VSS 224 DQ54 93 VSS 94 VSS 225 DQ55 226 VSS 95 DQS8_c 96 DM8_n, DBI8_n 227 VSS 228 DQ50 97 DQS8_t 98 VSS 229 DQ51 230 VSS 99 VSS 100 CB6, NC 231 VSS 232 DQ60 101 CB2, NC 102 VSS 233 DQ61 234 VSS 103 VSS 104 CB7, NC 235 VSS 236 DQ57 105 CB3, NC 106 VSS 237 DQ56 238 VSS 107 VSS 108 RESET_n 239 VSS 240 DQS7_c 109 CKE0 110 CKE1 241 DM7_n, DBI7_n 242 DQS7_t 111 VDD 112 VDD 243 VSS 244 VSS 113 BG1 114 ACT_n 245 DQ62 246 DQ63 115 BG0 116 ALERT_n 247 VSS 248 VSS 117 VDD 118 VDD 249 DQ58 250 DQ59 119 A12 120 A11 251 VSS 252 VSS 121 A9 122 A7 253 SCL 254 SDA 123 VDD 124 VDD 255 VDDSPD 256 SA0 125 A8 126 A5 257 VPP 258 VTT 127 A6 128 A4 259 VPP 260 SA1 129 VDD 130 VDD – – – – 131 A3 A2 – – – – *IC Component Composition : Advantech 132 256Mx8 512Mx8 1024Mx8 2048Mx8 A0~A13 A0~A14, A0~A15, A0~A16, 512Mx4 1024Mx4 2048Mx4 6 A0~A14 A0~A15 A0~A16 260 Pin DDR4 1.2V 2400 ECC SO-DIMM 16GB Based on 1Gx8 AQD-SD4U16E24-SE Block Diagram 16GB, 2Gx72 Module(2 Rank x8) This technical information is based on industry standard data and tests believed to be reliable. However, Advantech makes no warranties, either expressed or implied, as to its accuracy and assume no liability in connection with the use of this product. Advantech reserves the right to make changes in specifications at any time without prior notice. Advantech 7 260 Pin DDR4 1.2V 2400 ECC SO-DIMM 16GB Based on 1Gx8 AQD-SD4U16E24-SE Operating Temperature Condition Parameter Symbol Rating Unit Note Operating Temperature TOPER 0 to 85 C 1,2 Note: 1. Operating Temperature is the case surface temperature on the center/top side of the DRAM. For the measurement conditions, please refer to JESD51-2 standard. 2. At 0 - 85C, operation temperature range are the temperature which all DRAM specification will be supported. Absolute Maximum DC Ratings Parameter Symbol Value Unit Note Voltage on VDD relative to Vss VDD -0.3 ~ 1.5 V 1,3 Voltage on VDDQ pin relative to Vss VDDQ -0.3 ~ 1.5 V 1,3 Voltage on VPP pin relative to Vss VPP -0.3 ~ 3.0 V 4 Voltage on any pin relative to Vss VIN, VOUT -0.3 ~ 1.5 V 1,3 Storage temperature TSTG -55~+100 C 1,2 Note: 1. Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability 2. Storage Temperature is the case surface temperature on the center/top side of the DRAM. For the measurement conditions, please refer to JESD51-2 standard. 3. VDD and VDDQ must be within 300 mV of each other at all times and VREFCA must be not greater than 0.6 x VDDQ, When VDD and VDDQ are less than 500 mV; VREFCA may be equal to or less than 300 mV 4. VPP must be equal or greater than VDD/VDDQ at all times. AC & DC Operating Conditions Recommended DC operating conditions Symbol Parameter Min. 1.14 1.14 2.375 Rating Typ. 1.2 1.2 2.5 Max. 1.26 1.26 2.75 VDD Supply Voltage VDDQ Supply Voltage for Output VPP Peak-to-Peak Voltage NOTE: 1. Under all conditions VDDQ must be less than or equal to VDD. 2. VDDQ tracks with VDD. AC parameters are measured with VDD and VDDQ tied together. 3. DC bandwidth is limited to 20MHz. Unit NOTE V V V 1,2,3 1,2,3 3 Unit NOTE AC & DC Logic Input Levels for Single-Ended Signals Symbol Parameter DDR4-1600/1866/2133/2400 Min. Max. VREFCA+ 0.075 VDD VSS VREFCA-0.075 VREF + 0.1 Note 2 Note 2 VREF - 0.1 0.49*VDD 0.51*VDD VIH.CA(DC75) DC input logic high V VIL.CA(DC75) DC input logic low V VIH.CA(AC100) AC input logic high V 1 VIL.CA(AC100) AC input logic low V 1 VREFCA(DC) Reference Voltage for ADD, CMD inputs V 2,3 NOTE : 1. See “Overshoot and Undershoot Specifications” on section. 2. The AC peak noise on VREFCA may not allow VREFCA to deviate from VREFCA(DC) by more than ± 1% VDD (for reference : approx. ± 12mV) 3. For reference : approx. VDD/2 ± 12mV Advantech 8 260 Pin DDR4 1.2V 2400 ECC SO-DIMM 16GB Based on 1Gx8 AQD-SD4U16E24-SE Timing Parameters & Specifications Speed Parameter DDR4 2400 Unit Symbol Min Max Average Clock Period tCK 0.833