ACT-9S512K8N-010L2I

ACT-PS512K8 High Speed 4 Megabit Plastic Monolithic SRAM Plastic Path™ Features Low Power Monolithic CMOS 512K x 8 SRAM s Operating Temperature Range q Full Military (-55°C to +125°C) q Industrial (-40°C to +85°C) s Burn-in and Temperature Cycle Available s 10, 12, 15, 17, 20 & 25ns Access Times s +5V Power Supply s Industry Standard Pinouts q Center Power / Ground Pins s TTL Compatible I/O s 3.3V Device I/O Interfacing s JEDEC Standard 36 pin Plastic SOJ Package q 36 Lead, .93" x .405" x 0.148 Small Outline J lead (SOJ), Aeroflex code# "L2" s Fully Static Operation q No Clocks or Refresh Required s CIRCUIT TECHNOLOGY www.aeroflex.com A E RO F LE X LA C ISO 9001 E RTIFIED Block Diagram – SOJ (L2) CE WE OE A0 – A18 Vss Vcc 512Kx8 8 General Description The ACT-PS512K8 is a Plastic High Speed, 4 Megabit (4,194,304 bits) CMOS Monolithic SRAM organized as 524,288 words by 8 bits. Designed for high-speed, high density, high reliablility, mass memory and fast cache system applications. The plastic monolithic is input and output TTL compatible. Writing is executed when the write enable (WE) and chip enable (CE) inputs are low. Reading is accomplished when WE is high and CE and output enable (OE) are both low. Access time grades of 10ns 12ns, 15ns, 17ns, 20ns and 25ns are standard. B S I NC . I/O0-7 Pin Description I/O0-7 A0–18 WE CE OE VCC VSS NC Data I/O Address Inputs Write Enable Chip Enable Output Enable Power Supply Ground Not Connected eroflex Circuit Technology - Advanced Multichip Modules © SCD3764 REV A 6/2/98 Absolute Maximum Ratings Symbol TC TSTG PD VG VCC Parameter Case Operating Temperature Storage Temperature Maximum Package Power Dissipation Maximum Signal Voltage to Ground Power Supply Voltage -0.5 -0.5 MINIMUM -55 -65 MAXIMUM +125 +150 1.0 VCC + 0.5 +7.0 Units °C °C W V V Recommended Operating Conditions Symbol VCC VSS VIH VIL TC TC Ground Input High Voltage Input Low Voltage Operating Temperature (Military) Operating Temperature (Industrial) Parameter Power Supply Voltage Minimum +4.5 0 +2.2 -0.5 -55 -40 Maximum +5.5 0 VCC + 0.5 +0.8 +125 +85 Units V V V V °C °C Truth Table Mode Standby Output Disable Read Write CE H L L L WE X H H L OE X H L X Data I/O High Z High Z Data OUT Data IN Supply Current ISB ICC ICC ICC Capacitance (VIN & VOUT = 0V, f = 1MHz, TC = 25°C, unless otherwise noted, Guaranteed but not tested) Symbol CIN COUT Parameter Input Capacitance (A0-18, WE & OE) Output Capacitance (I/O0-7 & CE) Maximum 6 8 Units pF pF DC Characteristics (VCC = 5.0V, VSS = 0V, TC = -55°C to +125°C or -40°C to +85°C) Parameter Input Leakage Current Output Leakage Current Operating Supply Current Standby Current Output Low Voltage Output High Voltage Sym ILI ILO ICC ISB Conditions VCC = Max, VIN = VSS to VCC CE = VIH, OE = VIH, VOUT = VSS to VCC CE = VIL, OE = VIH,f =5MHz,Vcc=5.5V CE = VIH, OE= VIH, f =5MHz,Vcc=5.5V 2.4 Min -10 -10 Max +10 +10 130 20 0.4 Units µA µA mA mA V V VOL IOL = 8 mA, Vcc = 4.5V VOH IOH = -4 mA, Vcc = 4.5V Note: DC Test conditions: VIL = 0.3V, VIH = Vcc - 0.3V. Aeroflex Circuit Technology 2 SCD3764 REV A 6/2/98 Plainview NY (516) 694-6700 AC Characteristics (VCC = 5.0V, VSS= 0V, TC = -55°C to +125°C or -40°C to +85°C) Read Cycle Parameter Read Cycle Time Address Access Time Chip Enable Access Time Output Hold from Address Change Output Enable to Output Valid Chip Enable to Output in Low Z (1) Output Enable to Output in Low Z (1) Chip Deselect to Output in High Z (1) Note 1. Guaranteed by design, but not tested Sym –010 –012 –015 –017 –020 –025 Min Max Min Max Min Max Min Max Min Max Min Max 10 10 10 3 5 3 0 5 5 3 0 6 6 3 6 3 0 7 7 12 12 12 3 7 3 0 7 7 15 15 15 3 8 3 0 8 8 17 17 17 4 10 3 0 10 10 20 20 20 5 12 25 25 25 Units tRC tAA tACE tOH tOE tCLZ tOLZ tCHZ ns ns ns ns ns ns ns ns ns Output Disable to Output in High Z (1) tOHZ Write Cycle Parameter Write Cycle Time Chip Enable to End of Write Address Valid to End of Write Data Valid to End of Write Write Pulse Width Address Setup Time Address Hold Time Output Active from End of Write (1) Write to Output in High Z (1) Data Hold from Write Time Note 1. Guaranteed by design, but not tested Sym tWC tCW tAW tDW tWP tAS tAH tOW tWHZ tDH –010 –012 –015 –017 –020 –025 Min Max Min Max Min Max Min Max Min Max Min Max 10 7 7 5 7 0 0 3 5 0 0 12 8 8 6 8 0 0 3 6 0 15 10 10 8 10 0 0 3 7 0 17 12 12 8 12 0 0 3 8 0 20 13 13 9 13 0 0 4 8 0 25 15 15 10 15 0 0 5 10 Units ns ns ns ns ns ns ns ns ns ns Data Retention Electrical Characteristics (Special Order Only) VCC = 5.0V, VSS= 0V, TC = -55°C to +125°C or -40°C to +85°C) All Speeds Typ 0.5 Parameter VCC for Data Retention Data Retention Current Sym VDR ICCDR1 Test Conditions CE ≥ VCC – 0.2V VCC = 3V Min 2 Max 5.5 2.0 Units V mA Aeroflex Circuit Technology 3 SCD3764 REV A 6/2/98 Plainview NY (516) 694-6700 Timing Diagrams — SRAM Read Cycle Timing Diagrams Read Cycle 1 (SCE = OE = VIL, SWE = VIH) tRC A0-18 tAA tOH DI/O Previous Data Valid Data Valid SCE tAS SWE tOW SEE NOTE Write Cycle Timing Diagrams Write Cycle (SWE Controlled, OE = VIH) tWC A0-18 tAW tCW tAH tWP tWHZ tDW Data Valid tDH D I/O Read Cycle 2 (SWE = VIH) tRC A0-18 tAA SCE tACE tCLZ SEE NOTE Write Cycle (SCE Controlled, OE = VIH ) tWC A0-18 tAW tCHZ SEE NOTE tAH tCW tAS SCE OE tWP tOE tOLZ SEE NOTE tOHZ SEE NOTE SWE tDW tDH DI/O High Z Data Valid DI/O Data Valid UNDEFINED DON’T CARE Note: Guaranteed by design, but not tested. AC Test Circuit Current Source IOL AC Test Conditions Parameter Typical 0 – 3.0 5 1.5 Units V ns V To Device Under Test C L = 50 pF VZ ~ 1.5 V (Bipolar Supply) Input Pulse Level Input Rise and Fall Input and Output Timing Reference Level IOH Current Source Notes: 1) VZ is programmable from -2V to +7V. 2) IOL and IOH programmable from 0 to 16 mA. 3) Tester Impedance ZO = 75Ω. 4) VZ is typically the midpoint of VOH and VOL. 5) IOL and IOH are adjusted to simulate a typical resistance load circuit. 6) ATE Tester includes jig capacitance. Aeroflex Circuit Technology 4 SCD3764 REV A 6/2/98 Plainview NY (516) 694-6700 Pin Numbers & Functions 36 Pins — SOJ Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 Function A0 A1 A2 A3 A4 CE I/O0 I/O1 VCC VSS I/O2 I/O3 WE A5 A6 A7 A8 A9 Pin # 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 Function NC A10 A11 A12 A13 A14 I/O4 I/O5 VCC VSS I/O6 I/O7 OE A15 A16 A17 A18 NC Package Outline "L2" — SOJ Package, 36 Leads 23.62 (.930) 23.37 (.920) 36 19 11.30 (.445) 11.05 (.435) 9.65 (.380) 9.14 (.360) 10.29 (.405) 10.03 (.395) 1 18 .69 MIN (.027) 3.76 (.148) MAX .43 +.10 -.05 TYP (.017 +.004) -.002) .004 MAX 0.95 (.037) 1.27 TYP (.050) All dimensions in inches Dimensions in millmeters mm Dimensions in inches (.xxx) Aeroflex Circuit Technology 5 SCD3764 REV A 6/2/98 Plainview NY (516) 694-6700 CIRCUIT TECHNOLOGY Ordering Information (Typical) Model Number ACT-PS512K8N–010L2I ACT-PS512K8W–012L2I ACT-PS512K8X–015L2T ACT-PS512K8Y–017L2T ACT-PS512K8Y–020L2T ACT-PS512K8Y–025L2T Options None Burn-in Temp Cycle Temp Cycle & Burn-in Temp Cycle & Burn-in Temp Cycle & Burn-in Speed 10ns 12ns 15ns 17ns 20ns 25ns Package 36 Lead SOJ 36 Lead SOJ 36 Lead SOJ 36 Lead SOJ 36 Lead SOJ 36 Lead SOJ Part Number Breakdown \\\ Aeroflex Circuit Technology Plastic Path Memory Type S = Plastic SRAM Memory Depth, Locations Memory Width, Bits Options ACT- P S 512K 8 N– 010 L2 T Electrical Testing I = Industrial Temp, -40°C to +85°C T = Military Temp, -55°C to +125°C Package Type & Size L2 = 36 Pin Plastic SOJ N = None W = Burn-in * X = Temperature Cycle * Y = Burn-in & Temperature Cycle Memory Speed, ns 010 = 10ns 012 = 12ns 015 = 15ns 017 = 17ns 020 = 20ns 025 = 25ns * * Screened to the test methods of MIL-STD-883 Aeroflex Circuit Technology 35 South Service Road Plainview New York 11830 Aeroflex Circuit Technology Telephone: (516) 694-6700 FAX: (516) 694-6715 Toll Free Inquiries: 1-(800) 843-1553 6 SCD3764 REV A 6/2/98 Plainview NY (516) 694-6700