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ACT8501-I

ACT8501-I

  • 厂商:

    AEROFLEX

  • 封装:

  • 描述:

    ACT8501-I - ACT8501 Radiation Hardened & ESD Protected 64-Channel Analog Multiplexer Module - Aerofl...

  • 数据手册
  • 价格&库存
ACT8501-I 数据手册
ACT8501 Radiation Hardened & ESD Protected 64-Channel Analog Multiplexer Module Features ■ Radiation Environment • Radiation 300K(Si) Total Dose • No Latch-Up or SEE to 120MeV/cm2/mg CIRCUIT TECHNOLOGY www.aeroflex.com ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Full Military Temperature Range Low Power Consumption < 90mW 64 Channels Provided by Four (4) HS-1840RH Multiplexers Two Address Busses (A0-3 & B0-3), and Four Enable lines afford flexible organization All Channel Inputs protected by ±20V Transorbs X LA LE F Fast Access Time 1500ns ±35V Input Over Voltage Protection (Power On or Off) Break-Before-Make Switching 9001 High Analog Input Impedance (Power On or Off) C E RT IFIE D Dielectrically Isolated Device Islands No Latch-Up Packaging – Hermetic Ceramic Quad Flat Pack B A E RO S I NC . ISO • 96 Leads, 1.32"Sq x .20"Ht Quad Flat Pack • Typical Weight 15 grams ■ DESC SMD Pending General Description Aeroflex’s ACT8501 is a radiation hardened, multi-chip 64 channel multiplexer MCM (multi-chip module) with ESD protection for use in space applications. All channel inputs have electrostatic discharge protection. The ACT8501 has been specifically designed to meet exposure to radiation environments. The multiplexer is available in a 96 lead High Temperature Co-Fired Ceramic (HTCC) Quad Flatpack (QFP) and is guaranteed operational from -55°C to +125°C. Available screened in accordance with MIL-PRF-38534, the ACT8501 is ideal for demanding military and space applications. eroflex Circuit Technology – Multiplexer Modules For The Future © SCD8501 REV A 10/26/01 Aeroflex Circuit Technology SECTION B 16 CH 0 16 CH 16 MUX 1 OUTPUT 0-15 CH 31 16 16 CH 15 • • • VR MUX 2 VR • • • OUTPUT 16-31 EN 0-15 EN 16-31 B0 B1 B2 B3 SECTION A 16 CH 32 16 CH 48 MUX 3 OUTPUT 32-47 EN 48-63 CH 63 16 16 2 CH 47 • • • VR VR • • • MUX 4 OUTPUT 48-63 EN 32-47 A0 A1 A2 A3 -VEE VREF GND +VDD SCD8501 REV A 10/26/01 Plainview NY (516) 694-6700 ACT8501 64 Channel Analog MUX Block Diagram Organization and Application The ACT8501 consists of four 16 channel muxes arranged as shown in the Block Diagram. The ACT8501 design is inherently Radiation Hard due to the HS1840RH Multiplexers as well as Microsemi Corp. Transient Suppressors (Reference Microsemi MicroNotes Series 050 page 14). A Section Thirty-two channels addressable by Bus A0~A3, in two 16 channel blocks, each block enabled separately. B Section Thirty-two (32) channels addressable by Bus B0~B3, in two 16 channel blocks, each block enabled separately. NOTE: It is recommended that all "NC or "no connect pin", be grounded. This eliminates or minimizes any ESD or static buildup. Aeroflex Circuit Technology 3 SCD8501 REV A 10/26/01 Plainview NY (516) 694-6700 Absolute Maximum Ratings 1/ Parameter Case Operating Temperature Range Storage Temperature Range Supply Voltage +VCC (Pin 44) -VEE (Pin 46) VREF (Pin 48) Digital Input Overvoltage VEN (Pins 5, 6, 91, 92), VA (Pins 93, 95, 1, 3), VB (Pins 94, 96, 2, 4) Analog Input Over Voltage VS Notes: 1/ All measurements are made with respect to ground. NOTICE: Stresses above those listed under "Absolute Maximums Rating" may cause permanent damage to the device. These are stress rating only; functional operation beyond the "Operation Conditions" is not recommended and extended exposure beyond the "Operation Conditions" may effect device reliability. Range -55 to +125 -55 to +150 +20 -20 +20 < V R +4 > GND -4 ±18 Units °C °C V V V V V V Recommended Operating Conditions Symbol +VCC -VEE VREF VAL VAH Parameter +15V Power Supply Voltage -15V Power Supply Voltage Reference Voltage Logic Low Level Logic High Level Typical +15.0 -15.0 +5.00 +0.8 +4.0 Units V V V V V DC Electrical Performance Characteristics 1/ (Tc = -55°C to +125°C, +VEE = +15V, -VEE = -15V, VREF = +5.0V, Unless otherwise specified) Parameter Supply Current Symbol I+ I+ISBY -ISBY Conditions VEN(0-63) = VA(0-3)A = VA(0-3)B = 0 VEN(0-63) = VA(0-3)A = VA(0-3)B = 0 VEN(0-63) = 4V, VA(0-3)A = VA(0-3)B = 0 6/ VEN(0-63) = 4V, VA(0-3)A = VA(0-3)B = 0 6/ VA = 0V 1/ VA = 5V 1/ VA = 0V 1/ VA = 5V 1/ VEN(0-15) = 0V VEN(0-15) = 5V VEN(16-31) = 0V VEN(16-31) = 5V VEN(32-63) = 0V VEN(32-63) = 5V 4 Min Max Units 0.2 -2 0.2 -2 -2 -2 -2 -2 -1 -1 -1 -1 -1 -1 2 -0.2 2 -0.2 2 2 2 2 1 1 1 1 1 1 mA mA mA mA µA µA µA µA µA µA µA µA µA µA Address Input Current IAL(0-3)A IAH(0-3)A IAL(0-3)B IAH(0-3)B Enable Input Current IENL(0-15) IENH(0-15) IENL(16-31) IENH(16-31) IENL(32-63) IENH(32-63) Aeroflex Circuit Technology SCD8501 REV A 10/26/01 Plainview NY (516) 694-6700 DC Electrical Performance Characteristics 1/ (con’t) (Tc = -55°C to +125°C, +VEE = +15V, -VEE = -15V, VREF = +5.0V, Unless otherwise specified) Parameter Positive Input Leakage Current CH0-CH63 Negative Input Leakage Current CH0-CH63 Output Leakage Current OUTPUTS (pins 25,26, 68 & 70) Output Leakage Current OUTPUTS (pins 25,26, 68 & 70) Input Clamped Voltage CH0 - CH63 Input Clamped Voltage CH0 - CH63 Switch ON Resistance OUTPUTS (pins 25,26, 68 & 70) Symbol +ISOFFOUTPUT(0-63) Conditions VIN = +10V, VEN = 4V, output and all unused MUX inputs under test = -10V 2/, 3/ VIN = -10V, VEN = 4V, output and all unused MUX inputs under test = +10V 2/, 3/ VOUT = +10V, VEN = 4V, output and all unused MUX inputs under test = -10V 3/, 4/ VOUT = -10V, VEN = 4V, output and all unused MUX inputs under test = +10V 3/, 4/ Min Max Units -100 +700 nA -ISOFFOUTPUT(0-63) -100 +700 nA +IDOFFOUTPUT(0-63) -100 +100 nA -IDOFFOUTPUT(0-63) -100 +100 nA +VCLMP(0-63) VEN = 4V, all unused MUX inputs under test are open. 3/ +25°C 18.0 23.0 +125°C 18.0 23.5 -55°C 17.5 22.5 +25°C -23.0 -18.0 +125°C -23.5 -18.0 -55°C -22.5 -17.5 V V V V V V Ω Ω Ω -VCLMP(0-63) R DS(ON)(0-63)A R DS(ON)(0-63)B RDS(ON)(0-63)C VIN = +15V, VEN = 0.8V, IOUT = -1mA 2/, 3/, 5/ VIN = +5V, VEN = 0.8V, IOUT = -1mA 2/, 3/, 5/ VIN = -5V, VEN = 0.8V, IOUT = +1mA 2/, 3/, 5/ 500 3000 500 3000 500 3000 Notes: 1/ Measure inputs sequentially. Ground all unused inputs of the MUX under test. VA is the applied input voltage to the MUXes’ address lines A(0-3). VB is the applied input voltage to the MUXes’ address lines B(0-3). 2/ VIN is the applied input voltage to the MUXes’ input channel CH0-CH63. 3/ V EN is the applied input voltage to the MUXes’ enable line En(0-15), En(16-31), En(32-47) and En(48-63). 4/ VOUT is the applied input voltage to the MUXes’ output line OUTPUT(1-15), OUTPUT(16-31), OUTPUT(32-47) and OUTPUT(48-63). 5/ Negative current is the current flowing out of each of the MUX pins. Positive current is the current flowing into each MUX pin. 6/ If not tested, shall be guaranteed to the specified limits. Switching Characteristics (Tc = -55°C to +125°C, VDD = +15V, VEE = -15V, VR = +5.0V, Unless otherwise specified) Parameter Switching Test MUX Symbol tONA tOFFA tONEN tOFFEN Conditions R L = 10KΩ, CL = 50pF R L = 10KΩ, CL = 50pF R L = 1KΩ, CL = 50pF R L = 1KΩ, CL = 50pF Min 10 10 10 10 Max 1500 2000 1500 1000 Units ns ns ns ns Aeroflex Circuit Technology 5 SCD8501 REV A 10/26/01 Plainview NY (516) 694-6700 Truth Table (CH0 – CH15) B3 X L L L L L L L L H H H H H H H H B2 X L L L L H H H H L L L L H H H H B1 X L L H H L L H H L L H H L L H H B0 X L H L H L H L H L H L H L H L H EN(0-15) H L L L L L L L L L L L L L L L L "ON" CHANNEL 1/ NONE CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8 CH9 CH10 CH11 CH12 CH13 CH14 CH15 1/ Between CH0-15 and OUTPUT (0-15) Truth Table (CH16 – CH31) B3 X L L L L L L L L H H H H H H H H B2 X L L L L H H H H L L L L H H H H B1 X L L H H L L H H L L H H L L H H B0 X L H L H L H L H L H L H L H L H EN(16-31) H L L L L L L L L L L L L L L L L "ON" CHANNEL 1/ NONE CH16 CH17 CH18 CH19 CH20 CH21 CH22 CH23 CH24 CH25 CH26 CH27 CH28 CH29 CH30 CH31 1 / Between CH16-31 and OUTPUT (16-31) Aeroflex Circuit Technology 6 SCD8501 REV A 10/26/01 Plainview NY (516) 694-6700 Truth Table (CH32 – CH47) A3 X L L L L L L L L H H H H H H H H A2 X L L L L H H H H L L L L H H H H A1 X L L H H L L H H L L H H L L H H A0 X L H L H L H L H L H L H L H L H EN(32-47) H L L L L L L L L L L L L L L L L "ON" CHANNEL 1/ NONE CH32 CH33 CH34 CH35 CH36 CH37 CH38 CH39 CH40 CH41 CH42 CH43 CH44 CH45 CH46 CH47 1 / Between CH32-47 and OUTPUT (32-47) Truth Table (CH48 – CH63) A3 X L L L L L L L L H H H H H H H H A2 X L L L L H H H H L L L L H H H H A1 X L L H H L L H H L L H H L L H H A0 X L H L H L H L H L H L H L H L H EN(47-63) H L L L L L L L L L L L L L L L L "ON" CHANNEL 1/ NONE CH48 CH49 CH50 CH51 CH52 CH53 CH54 CH55 CH56 CH57 CH58 CH59 CH60 CH61 CH62 CH63 1 / Between CH48-63 and OUTPUT (48-63) Aeroflex Circuit Technology 7 SCD8501 REV A 10/26/01 Plainview NY (516) 694-6700 4V Address Lines 0.8V 12V MIN OUTPUT 0V tONA Definition of tONA 4V Address Lines 0.8V OUTPUT 0V tOFFA Definition of tOFFA 4V Enable Line 50% 0.8V 90% OUTPUT 10% 0V tONEN tOFFEN Definition of tONEN and tOFFEN Aeroflex Circuit Technology 8 SCD8501 REV A 10/26/01 Plainview NY (516) 694-6700 Lead Numbers & Functions ACT8501 – 96 Leads Ceramic QUAD Flat Pack Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 A2 B2 A3 B3 EN 0-15 EN 16-31 CH0 CH16 CH1 CH17 CH2 CH18 CH3 CH19 CH4 CH20 CH5 CH21 CH6 CH22 CH7 CH23 GND GND Output V(0-15) Output V(16-31) CH8 CH24 CH9 CH25 CH10 CH26 Function Pin # 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 Function CH11 CH27 CH12 CH28 CH13 CH29 CH14 CH30 CH15 CH31 NC +VCC NC -VEE NC VREF NC CASE GND CH63 CH62 CH61 CH60 CH59 CH58 CH57 CH56 CH55 CH54 CH53 CH52 CH51 CH50 Pin # 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 Function CH49 CH48 NC Output V(48-63) NC Output V(32-47) GND GND CH47 CH46 CH45 CH44 CH43 CH42 CH41 CH40 CH39 CH38 CH37 CH36 CH35 CH34 CH33 CH32 GND GND EN 48-63 EN 32-47 A0 B0 A1 B1 NOTE: It is recommended that all "NC or "no connect pin", be grounded. This eliminates or minimizes any ESD or static buildup. Aeroflex Circuit Technology 9 SCD8501 REV A 10/26/01 Plainview NY (516) 694-6700 CIRCUIT TECHNOLOGY Ordering Information Model Number ACT8501 -S Screening Military Temperature, -55°C to +125°C, Screened to the individual test methods of MIL-STD-883 IAW MIL-PRF-38534 Class K Military Temperature, -55°C to +125°C, Screened to the individual test methods of MIL-STD-883 IAW MIL-PRF-38534 Class H Commercial Flow, +25°C testing only Commercial Flow, -55°C to +125°C testing only Commercial Flow, -40°C to +85°C testing only Commercial Flow, -0°C to +70°C testing only NA DESC SMD # Pending Package QUAD Flat Pack ACT8501 ACT8501 -7 ACT8501 -T ACT8501 -I ACT8501 -C Flat Package Outline 1.150 ±.005 (23 Spaces at .050) Tol Non-Cum 4 Sides Pin 1 Pin 12 Pin 85 Pin 84 .200 MAX Pin 13 .0165 ±.003 1.320 SQ MAX Pin 36 (.400) .006 ±.001 Specifications subject to change without notice Pin 37 Pin 61 Pin 60 Note: Outside ceramic tie bars not shown for clarity. Contact factory for details Aeroflex Circuit Technology 35 South Service Road Plainview New York 11803 www.aeroflex.com Aeroflex Circuit Technology 10 Telephone: (516) 694-6700 FAX: (516) 694-6715 Toll Free Inquiries: (800) THE-1553 E-Mail: sales-act@aeroflex.com SCD8501 REV A 10/26/01 Plainview NY (516) 694-6700
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