Standard Products Data Sheet January, 2003
QCOTSTM UT8Q1024K8 SRAM
FEATURES 25ns maximum (3.3 volt supply) address access time Dual cavity package contains two (2) 512K x 8 industrystandard asynchronous SRAMs; the control architecture allows operation as an 8-bit data width TTL compatible inputs and output levels, three-state bidirectional data bus Typical radiation performance - Total dose: 50krad(Si) - SEL Immune >80 MeV-cm2/mg - LETTH(0.25) = >10 MeV-cm2/mg - Saturated Cross Section cm2 per bit, 5.0E-9 - V IH (min)
tAXQX Figure 4a. SRAM Read Cycle 1: Address Access
A(18:0) En tETQV DQ(7:0) t ETQX t EFQZ
DATA VALID
Assumptions: 1. G < V IL (max) and W n > VIH (min)
Figure 4b. SRAM Read Cycle 2: Chip Enable-Controlled Access
tAVQV A(18:0) G t GHQZ t GLQX DQ(7:0)
Assumptions: 1 . En < V IL ( max) andW n > V IH (min)
DATA VALID
tGLQV
Figure 4c. SRAM Read Cycle 3: Output Enable-Controlled Access
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AC CHARACTERISTICS WRITE CYCLE (Pre/Post-Radiation)* (-40° C to +125 ° C) (V DD = 3.3V + 0.3) SYMBOL tAVAV 1 tETWH tAVET tAVWL tWLWH tWHAX tEFAX tWLQZ 2 tWHQX 2 tETEF tDVWH tWHDX 2 tWLEF tDVEF 2 tEFDX tAVWH tWHWL1 Write cycle time Device Enable to end of write Address setup time for write (En - controlled) Address setup time for write (W n - controlled) Write pulse width Address hold time for write (W n - controlled) Address hold time for Device Enable (En - controlled) W n- controlled three-state time W n - controlled Output Enable time Device Enable pulse width (E n - controlled) Data setup time Data hold time Device Enable controlled write pulse width Data setup time Data hold time Address valid to end of write Write disable time 5 20 15 2 20 15 2 20 5 PARAMETER MIN 25 20 0 0 20 2 2 10 MAX UNIT ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
Notes : * Post-radiation performance guaranteed at 25 °C per MIL-STD-883 Method 1019. 1. Functional test performed with outputs disabled (G h igh). 2. Three-state is defined as 300mV change from steady-state output voltage.
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A(18:0) tAVAV 2 En tAVWH tETWH Wn t AVWL Q(7:0) t WLQZ D(7:0)
Assumptions: 1. G < VIL (max). If G > VIH ( min) then Qn(8:0) will be in three-state for the entire cycle. 2. G high for t AVAV c ycle. APPLIED DATA
tWHWL tWHAX
tWLWH
t WHQX
t DVWH
t WHDX
Figure 5a . SRAM Write Cycle 1: Write Enable - Controlled Access
t AVAV 3 A(18:0) tAVET t ETEF tEFAX En
or
tAVET En t ETEF tWLEF
APPLIED DATA
t EFAX
Wn D(7:0)
tWLQZ Q(7:0)
tDVEF
tEFDX
Assumptions & Notes: 1. G < V IL (max). If G > V IH ( min) then Q(7:0) will be in three-state for the entire cycle. 2. Either E n scenario above can occur. 3. G high for t AVAV c ycle.
Figure 5b. SRAM Write Cycle 2: Chip Enable - Controlled Access
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DATA RETENTION MODE
VDD
50% t EFR
VDR > 2.0V
50% tR
En
Figure 7. Low VDD Data Retention Waveform
DATA RETENTION CHARACTERISTICS (Pre/Post-Irradiation) (1 Second Data Retention Test) SYMBOL PARAMETER V DR IDDR
1,2
MINIMUM 2.0 -0 tAVAV
MAXIMUM -4.0
UNIT V mA ns ns
V DD for data retention Data retention current (per byte) Chip select to data retention time Operation recovery time
tEFR1,3 tR1,3
Notes: 1. En = VDD - .2V, all other inputs = VDR o r V SS. 2. Data retention current (I DDR ) Tc = 25 oC. 3. Not guaranteed or tested.
DATA RETENTION CHARACTERISTICS (Pre/Post-Irradiation) (10 Second Data Retention Test, TC=-40oC to +125o C) SYMBOL V DD 1 tEFR 2, 3 tR2, 3 PARAMETER V DD for data retention Chip select to data retention time Operation recovery time MINIMUM 3.0 0 tAVAV MAXIMUM 3.6 UNIT V ns ns
Notes: 1 . Performed at VD D ( min) and V D D ( max). 2. En = VSS , all other inputs = VDR o r V SS . 3. Not guaranteed or tested.
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PACKAGING
1. All exposed metalized areas must be plated per MIL-PRF-38535. 2. The lid is electrically connected to V SS . 3. Index mark configuration is optional. 4. Total weight is approx. 4.6 g.
Figure 9. 44-lead bottom brazed dual CFP (BBTFP) package
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ORDERING INFORMATION 1024K8 SRAM:
UT8Q1024K8 - * *
*
*
Lead Finish: (A) = Hot solder dipped (C) = Gold (X) = Factory option (gold or solder)
Screening: (P) = Prototype flow (W) = Extended Industrial Temperature Range Flow (-40o C to +125o C)
Package Type: (U) = 44-lead bottom brazed dual CFP (BBTFP)
D evice Type: - = 25ns access, 3.3V operation Aeroflex UTMC Core Part Number
N otes: 1. Lead finish (A,C, or X) must be specified. 2. If an “X” is specified when ordering, then the part marking will match the lead finish and will be either “A” (solder) or “C” (g old). 3. Prototype flow per UTMC Manufacturing Flows Document. Tested at 25 ° C only. Lead finish is GOLD ONLY. Radiation neither tested nor guaranteed. 4. Extended Industrial Temperature Range flow per UTMC Manufacturing Flows Document. Devices are tested at -40°C to +125°C. Radiation neither tested nor guaranteed.
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1024K8 SRAM: SMD
5962 - 01532
** * * *
Lead Finish: (A) = Hot solder dipped (C) = Gold (X) = Factory Option (gold or solder) Case Outline: (Y) = 44-lead dual cavity CFP Class Designator: (T) = QML Class T (Q) = QML Class Q
Device Type 01 = 25ns access time, 3.3V operation, Extended Industrial Temp (-40oC to +125 oC)
Drawing Number: 01532 Total Dose (-) = None (D) = 1E4 (10krad(Si)) (P) = 3E4 (30krad(Si)) (contact factory) (L) = 5E4 (50krad(Si)) (contact factory) Federal Stock Class Designator: No Options Notes: 1. Lead finish (A, C, or X) must be specified. 2. If an "X" is specified when ordering, part marking will match the lead finish and will be either "A" (solder) or "C" (gold). 3. Total dose radiation must be specified when ordering.
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Aeroflex UTMC Microelectronic Systems Inc. (Aeroflex) reserves the right to make changes to any products and services herein at any time without notice. Consult Aeroflex or an authorized sales representative to verify that the information in this data sheet is current before using this product. Aeroflex does not assume any responsibility or liability arising out of the application or use of any product or service described herein, except as expressly agreed to in writing by Aeroflex; nor does the purchase, lease, or use of a product or service from Aeroflex convey a license under any patent rights, copyrights, trademark rights, or any other of the intellectual rights of Aeroflex or of third parties.
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