[AK09940]
= Preliminary =
AK09940
Ultrahigh precision 3-axis Electronic Magnetometer
1. General Description
AK09940 is ultrahigh precision 3-axis electronic magnetometer IC with ultrahigh sensitive TMR sensor
technology.
Small package of AK09940 incorporates magnetic sensors for detecting magnetic field in the X-axis, Yaxis, and Z-axis, a sensor driving circuit, signal amplifier chain, and an arithmetic circuit for processing
the signal from each sensor. Self-test function is also incorporated.
2. Features
Functions:
3-axis magnetometer device
Built-in A to D Converter for magnetometer data out
18-bit data out for each 3-axis magnetic component
Sensitivity: 10 nT/LSB (typ.)
Range: ±1200 µT (max.)
Serial interface
I2C bus interface
Standard and Fast modes compliant with Philips I2C specification Ver.2.1
4-wire SPI
Operation mode
Power-down, Single measurement, Continuous measurement and Self-test
DRDY function for measurement data ready
Magnetic sensor overflow monitor function
Built-in oscillator for internal clock source
Power on Reset circuit
Self-test function with internal magnetic source
Built-in temperature sensor
Built-in magnetic sensitivity adjustment circuit
8 FIFO data buffer
Selectable sensor drive
Low power drive / Low noise drive
Operating temperatures:
-30˚C to +85˚C
Operating supply voltage:
Analog power supply
+1.7 V to +1.98 V
Digital Interface supply
+1.65 V to analog power supply voltage
Current consumption:
Power-down:
0.5 µA (typ.)
Measurement:
Average current consumption at 100 Hz repetition rate
Low power drive 1: 0.03 mA (typ.)
Low power drive 2: 0.06 mA (typ.)
Low noise drive 1 : 0.10 mA (typ.)
Low noise drive 2 : 0.20 mA (typ.)
Package:
AK09940
11-pin LGA: 1.6 mm × 1.6 mm × 0.58 mm (typ.)
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3. Table of Contents
1.
2.
3.
4.
General Description ............................................................................................................................ 1
Features .............................................................................................................................................. 1
Table of Contents ................................................................................................................................ 2
Block Diagram and Functions ............................................................................................................. 4
4.1. Block Diagram.............................................................................................................................. 4
4.2. Functions ..................................................................................................................................... 4
5. Pin Configurations and Functions ....................................................................................................... 5
6. Absolute Maximum Ratings ................................................................................................................ 6
7. Recommended Operating Conditions................................................................................................. 6
8. Electrical Characteristics..................................................................................................................... 7
8.1. DC Characteristics ....................................................................................................................... 7
8.2. AC Characteristics ....................................................................................................................... 8
8.3. Analog Circuit Characteristics ..................................................................................................... 9
8.4. 4-wire SPI .................................................................................................................................. 10
8.5. I2C Bus Interface .........................................................................................................................11
9. Functional Descriptions..................................................................................................................... 12
9.1. Power States.............................................................................................................................. 12
9.2. Reset Functions ......................................................................................................................... 12
9.3. Operation Modes ....................................................................................................................... 13
9.4. Description of Each Operation Mode ........................................................................................ 14
9.4.1. Power-down Mode.............................................................................................................. 14
9.4.2. Single Measurement Mode ................................................................................................ 14
9.4.3. Continuous Measurement Modes ...................................................................................... 16
9.4.4. Self-test Mode .................................................................................................................... 20
9.5. Temperature Sensor .................................................................................................................. 20
9.6. Sensor Drive Select ................................................................................................................... 20
9.7. FIFO ........................................................................................................................................... 21
9.7.1. Watermark .......................................................................................................................... 21
9.7.2. FIFO status ......................................................................................................................... 21
10. Serial Interface .................................................................................................................................. 22
10.1.
4-wire SPI ............................................................................................................................... 22
10.1.1.
Writing Data .................................................................................................................... 22
10.1.2.
Reading Data .................................................................................................................. 23
10.2.
I2C Bus Interface .................................................................................................................... 23
10.2.1.
Data Transfer .................................................................................................................. 23
10.2.2.
WRITE Instruction ........................................................................................................... 26
10.2.3.
READ Instruction ............................................................................................................ 26
11. Registers ........................................................................................................................................... 28
11.1.
Description of Registers ......................................................................................................... 28
11.2.
Register Map .......................................................................................................................... 29
11.3.
Detailed Description of Registers .......................................................................................... 30
11.3.1. WIA: Who I Am ................................................................................................................... 30
11.3.2. RSV: Reserved ................................................................................................................... 30
11.3.3. ST1: Status 1 ...................................................................................................................... 30
11.3.4. HXL to HZH: Measurement data ........................................................................................ 31
11.3.5. TMPS: Temperature Data ................................................................................................... 32
11.3.6. ST2: Status 2 ...................................................................................................................... 33
11.3.7. CNTL1: Control 1................................................................................................................ 34
11.3.8. CNTL2: Control 2................................................................................................................ 34
11.3.9. CNTL3: Control 3................................................................................................................ 35
11.3.10. CNTL4: Control 4 ............................................................................................................ 35
11.3.11.
I2CDIS: I2C Disable ........................................................................................................ 36
11.3.12. TS: Test ........................................................................................................................... 36
12. Recommended External Circuits ...................................................................................................... 37
12.1.
I2C Bus Interface .................................................................................................................... 37
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12.2.
4-wire SPI ............................................................................................................................... 38
13. Package ............................................................................................................................................ 39
13.1.
Marking................................................................................................................................... 39
13.2.
Pin Assignment ...................................................................................................................... 39
13.3.
Outline Dimensions ................................................................................................................ 40
13.4.
Recommended Foot Print Pattern Outline ............................................................................. 40
14. Relationship between the Magnetic Field and Output Code ............................................................ 41
IMPORTANT NOTICE .......................................................................................................................... 42
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4. Block Diagram and Functions
4.1. Block Diagram
3-axis
TMR
sensor
Pre-AMP
ADC
MUX
T-Sensor
OSC1
TMR-Drive
RSTN
Interface,
Logic
& Register
Timing
Control
Magnetic Source
CSB
SO
VIREF
DRDY
OSC2
POR
CAD0 CAD1
VSS
VDD
SCL/SK
SDA/SI
FIFO
VID
4.2. Functions
Block
3-axis TMR sensor
MUX
TMR-Drive
Pre-AMP
T-Sensor
ADC
OSC1
OSC2
POR
VIREF
Interface Logic
&
Register
Timing Control
Magnetic Source
FIFO
Function
TMR elements.
Multiplexer for selecting TMR elements.
Magnetic sensor drive circuit.
Fixed-gain differential amplifier used to amplify the magnetic sensor signal.
Temperature sensor. Generates a voltage in proportion to temperature.
Amplifies Pre-AMP output or T-Sensor output and performs analog-todigital conversion.
Generates an operating clock for sensor measurement.
Generates an operating periodic clock for sequencer.
Power On Reset circuit. Generates reset signal on rising edge of VDD.
Generates reference voltage and current.
Exchanges data with an external CPU.
DRDY pin indicates sensor measurement has ended and data is ready to
be read.
I2C bus interface using two pins, namely, SCL and SDA. Standard and
Fast modes are supported. The low-voltage specification can be supported
by applying 1.65 V to the VID pin.
4-wire SPI is also supported by SK, SI, SO and CSB pins.
4-wire SPI works in VID pin voltage down to 1.65 V, too.
Generates a timing signal required for internal operation from a clock
generated by the OSC1.
Generates magnetic field for self-test of magnetic sensor.
The buffer is capable up to 8 sets of data.
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5. Pin Configurations and Functions
Pin Pin
I/O Power Type
Function
No. name
supply
A1 DRDY O
VID
CMOS Data Ready output pin.
“H” active. Informs measurement ended and data is ready to be
read.
A2 CSB
I
VID
CMOS Chip select pin for 4-wire SPI.
“L” active. Connect to VID when selecting I2C bus interface.
A3 SCL
I
VID
CMOS When the I2C bus interface is selected (CSB pin is connected to
VID).
SCL: Control clock input pin.
Input: Schmitt trigger.
SK
When the 4-wire SPI is selected.
SK: Serial clock input pin.
A4 SDA I/O
VID
CMOS When the I2C bus interface is selected (CSB pin is connected to
VID).
SDA: Control data input/output pin.
Input: Schmitt trigger, Output: Open drain.
SI
I
When the 4-wire SPI is selected.
SI: Serial data input pin.
B1 VDD
Power Positive power supply pin.
B4
SO
O
VID
CMOS When the I2C bus interface is selected (CSB pin is connected to
VID).
Hi-Z output. Keep this pin electrically non-connected.
When the 4-wire SPI is selected.
Serial data output pin.
C1 VSS
Power Ground pin.
C4
VID
Power Digital interface positive power supply pin.
D1 CAD0
I
VID
CMOS When the I2C bus interface is selected (CSB pin is connected to
VID).
CAD0: Slave address 0 input pin.
Connect to VSS or VID.
When the 4-wire serial interface is selected.
Connect to VSS.
D2 CAD1
I
VID
CMOS When the I2C bus interface is selected (CSB pin is connected to
VID).
CAD1: Slave address 1 input pin.
Connect to VSS or VID.
When the 4-wire serial interface is selected.
Connect to VSS.
D4 RSTN
I
VID
CMOS Reset pin.
Resets registers by setting to “L”. Connect to VID when not in
use.
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6. Absolute Maximum Ratings
Vss = 0 V
Parameter
Power supply voltage
(Vdd, Vid)
Input voltage
(except for power supply pin)
Input current
(except for power supply pin)
Storage temperature
External magnetic field
Symbol
V+
Condition
Min.
-0.3
Max.
+2.5
Unit
V
VIN
-0.3
（V+）+0.3
V
IIN
-10
+10
mA
-40
+125
˚C
Ta = 25˚C
TBD
mT
Less than 3 seconds
WARNING: Operation at or beyond these limits may result in permanent damage to the device.
Normal operation is not guaranteed at these extremes.
Tst
Hext
7. Recommended Operating Conditions
Vss = 0 V
Parameter
Operating temperature
Power supply voltage
Remark
Symbol
Min.
Typ.
Max.
Unit
Ta
-30
+85
˚C
VDD pin voltage
Vdd
1.7
1.8
1.98
V
VID pin voltage
Vid
1.65
1.8
Vdd
V
WARNING: AKM assumes no responsibility for the usage beyond the conditions in this data sheet.
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8. Electrical Characteristics
The following conditions apply unless otherwise noted:
Vdd = 1.7 V to 1.98 V, Vid = 1.65 V to Vdd, Temperature range = -30˚C to 85˚C
Typical condition: Vdd = Vid = 1.8 V, Temperature = 25˚C
8.1. DC Characteristics
Parameter
Symbol
Pin
High level input voltage
VIH
CSB
RSTN
Low level input voltage
VIL
SK/SCL
Input current
IIN
SI/SDA
CAD0
CAD1
Hysteresis input voltage
VHS
SCL
(* 1)
SDA
High level output voltage
VOH
SO
DRDY
Low level output voltage 1 VOL1
Low level output voltage 2 VOL2
SDA
(* 2)
Current consumption (* 3) IDD1
VDD
VID
IDD2
IDD3
IDD4
IDD5
Condition
Vin = Vss or Vid
Min.
Typ.
Max.
Unit
70%Vid
Vid+0.3
V
-0.3
30%Vid
V
-10
+10
µA
10%Vid
IOH ≥ -100 µA
IOL1 ≤ +100 µA
IOL2 ≤ +3 mA
Power-down mode
Vdd = Vid = 1.8 V
When magnetic
sensor is driven
Self-test mode
When temperature
sensor is driven
(* 4)
V
80%Vid
20%Vid
20%Vid
V
V
V
0.5
6.0
µA
0.8
1.1
mA
1.9
0.7
2.5
0.9
mA
mA
0.2
5.0
µA
Notes:
* 1. Schmitt trigger input (reference value for design).
* 2. Output is open-drain. Connect a pull-up resistor externally.
* 3. Without any resistance load.
* 4. (case 1) Vdd = ON, Vid = ON, RSTN pin = “L”.
(case 2) Vdd = ON, Vid = OFF (0 V), RSTN pin = “L”.
(case 3) Vdd = OFF (0 V), Vid = ON.
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8.2. AC Characteristics
Parameter
Symbol Pin
Condition
Min. Typ. Max. Unit
Power supply rise
PSUP VDD
Period of time that VDD (VID)
50
ms
time
VID changes from 0.2 V to Vdd (Vid).
POR completion time PORT
Period of time after PSUP to
100
µs
(* 5)
Power-down mode (* 6)
Power supply turn off
SDV
VDD Turn off voltage to enable POR
0.2
V
voltage (* 5)
VID
to restart (* 6)
Power supply turn on PSINT VDD Period of time that voltage lower 100
µs
interval (* 5)
VID
than SDV needed to be kept to
enable POR to restart (* 6)
Wait time before
Twait
100
µs
mode setting
Reset input effective tRSTL RSTN
5
µs
pulse width (“L”)
Notes:
* 5. Reference value for design.
* 6. When POR circuit detects the rise of VDD/VID voltage, it resets internal circuits and initializes the
registers. After reset, AK09940 transits to Power-down mode.
Power-down mode
Power-down mode
Vdd/Vid
Twait
PORT
SDV
0V
PSUP
PSINT
tRSTL
VIL
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8.3. Analog Circuit Characteristics
Parameter
Symbol
Measurement data output bit
DBIT
Time for measurement
TSM
Magnetic sensor sensitivity
Magnetic sensor
measurement range (* 7)
Magnetic sensor initial offset
(* 8)
RMS noise (* 7)
BSE
BRG
BOF
NIS
Condition
MT[1:0] = “00”
MT[1:0] = “01”
MT[1:0] = “10”
MT[1:0] = “11”
Ta = 25˚C
Ta = 25˚C
Each Axis
Ta = 25˚C
MT[1:0] = “00”
MT[1:0] = “01”
MT[1:0] = “10”
MT[1:0] = “11”
Min.
-
Typ.
18
0.6
0.9
1.5
2.8
10
±1200
TBD
Max.
0.7
1.0
1.7
3.1
nT/LSB
µT
TBD
70
60
50
40
Unit
Bit
ms
LSB
nT rms
Notes:
* 7. Reference value for design.
* 8. Value of measurement data register on shipment test without applying magnetic field on purpose.
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8.4. 4-wire SPI
4-wire SPI is compliant with mode 3 (SPI-mode3).
Parameter
Symbol
Condition
CSB setup time
Tcs
Data setup time
Ts
Data hold time
Th
SK high time
Twh
SK low time
Twl
SK setup time
Tsd
SK to SO delay time
Tdd
(* 9)
CSB to SO delay time
Tcd
(* 9)
SK rise time(* 10)
Tr
SK fall time (* 10)
Tf
CSB high time
Tch
* 9. SO load capacitance: 20 pF
* 10. Reference value for design.
Min.
50
50
50
150
150
50
Typ.
Max.
50
Unit
ns
ns
ns
ns
ns
ns
ns
50
ns
100
100
ns
ns
ns
150
[4-wire SPI]
Tch
Tcs
Tsd
CSB
Ts
Th
Tdd
Twh
Tcd
Twl
SK
SI
Hi-Z
Hi-Z
SO
[Rise time and fall time]
Tr
Tf
0.9Vid
0.1Vid
SK
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8.5. I2C Bus Interface
CSB pin = “H”.
I2C bus interface is compliant with Standard mode and Fast mode. Standard/Fast mode is selected
automatically by fSCL.
Standard mode
fSCL ≤ 100 kHz
Parameter
SCL clock frequency
SCL clock “High” time
SCL clock “Low” time
SDA and SCL rise time
SDA and SCL fall time
Start Condition hold time
Start Condition setup time
SDA hold time (vs. SCL falling edge)
SDA setup time (vs. SCL rising edge)
Stop Condition setup time
Bus free time
Symbol
fSCL
tHIGH
tLOW
tR
tF
tHD:STA
tSU:STA
tHD:DAT
tSU:DAT
tSU:STO
tBUF
Min.
Fast mode
100 kHz ≤ fSCL ≤ 400 kHz
Parameter
SCL clock frequency
SCL clock “High” time
SCL clock “Low” time
SDA and SCL rise time
SDA and SCL fall time
Start Condition hold time
Start Condition setup time
SDA hold time (vs. SCL falling edge)
SDA setup time (vs. SCL rising edge)
Stop Condition setup time
Bus free time
Noise suppression pulse width
Symbol
fSCL
tHIGH
tLOW
tR
tF
tHD:STA
tSU:STA
tHD:DAT
tSU:DAT
tSU:STO
tBUF
tSP
Min.
Typ.
Max.
100
4.0
4.7
1.0
0.3
4.0
4.7
0
250
4.0
4.7
Typ.
Max.
400
0.6
1.3
0.3
0.3
0.6
0.6
0
100
0.6
1.3
50
Unit
kHz
µs
µs
µs
µs
µs
µs
µs
ns
µs
µs
Unit
kHz
µs
µs
µs
µs
µs
µs
µs
ns
µs
µs
ns
[I2C bus interface timing]
1/fSCL
VIH
SCL
VIL
VIH
SDA
VIL
tLOW
tBUF
tR
tHIGH
tF
tSP
VIH
SCL
VIL
tHD:STA
Stop
tHD:DAT
tSU:DAT
Start
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tSU:STO
Start
Stop
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9. Functional Descriptions
9.1. Power States
When VDD and VID are turned on from Vdd = OFF (0 V) and Vid = OFF (0 V), all registers in AK09940
are initialized by POR circuit and AK09940 transits to Power-down mode.
All the states in the table below can be set, although the transition from state 2 to state 3 and the
transition from state 3 to state 2 are prohibited.
Table 9.1. Power States
State
1
2
3
4
VDD
OFF (0 V)
VID
OFF (0 V)
Power state
OFF (0 V).
It does not affect external interface. Digital input pins
other than SCL and SDA pin should be fixed to “L” (0 V).
OFF (0 V)
1.65 V to 1.98 V OFF (0 V).
It does not affect external interface.
1.7 V to 1.98 V
OFF (0 V)
OFF (0 V).
It does not affect external interface. Digital input pins
other than SCL and SDA pin should be fixed to “L” (0 V).
1.7 V to 1.98 V 1.65 V to Vdd ON.
9.2. Reset Functions
When the power state is ON, always keep Vid ≤ Vdd.
Power-on reset (POR) works until Vdd reaches to the operation effective voltage (about 1.2 V:
reference value for design) on power-on sequence. After POR is deactivated, all registers are initialized
and transits to power down mode.
When Vdd = 1.7 to 1.98 V, POR circuit and VID monitor circuit are active. When Vid = 0 V, AK09940 is
in reset status and it consumes the current of reset state (IDD5).
AK09940 has four types of reset;
(1) Power on reset (POR)
When Vdd rise is detected, POR circuit operates, and AK09940 is reset.
(2) VID monitor
When Vid is turned OFF (0V), AK09940 is reset.
(3) Reset pin (RSTN)
AK09940 is reset by Reset pin. When Reset pin is not used, connect to VID.
(4) Soft reset
AK09940 is reset by setting SRST bit.
After reset is completed, all registers and FIFO buffer are initialized and AK09940 transit to Powerdown mode automatically.
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9.3. Operation Modes
AK09940 has following nine operation modes:
(1) Power-down mode
(2) Single measurement mode
(3) Continuous measurement mode 1
(4) Continuous measurement mode 2
(5) Continuous measurement mode 3
(6) Continuous measurement mode 4
(7) Continuous measurement mode 5
(8) Continuous measurement mode 6: Only valid for low power drive 1 or 2
(9) Self-test mode
By setting CNTL3 register MODE[4:0] bits, the operation set for each mode is started. A transition from
one mode to another is shown below.
MODE[4:0] = “00001”
Power-down
MODE[4:0] = “00000”
mode
Transits automatically
MODE[4:0] = “00010”
MODE[4:0] = “00000”
MODE[4:0] = “00100”
MODE[4:0] = “00000”
MODE[4:0] = “00110”
MODE[4:0] = “00000”
MODE[4:0] = “01000”
MODE[4:0] = “00000”
MODE[4:0] = “01010”
MODE[4:0] = “00000”
MODE[4:0] = “01100”
MODE[4:0] = “00000”
MODE[4:0] = “10000”
MODE[4:0] = “00000”
Transits automatically
Single measurement mode
Sensor is measured for one time and data is output.
Transits to Power-down mode automatically after
measurement ended.
Continuous measurement mode 1
Sensor is measured periodically in 10Hz.
Transits to Power-down mode by writing
MODE[4:0] = “00000”.
Continuous measurement mode 2
Sensor is measured periodically in 20Hz.
Transits to Power-down mode by writing
MODE[4:0] = “00000”.
Continuous measurement mode 3
Sensor is measured periodically in 50Hz.
Transits to Power-down mode by writing
MODE[4:0] = “00000”.
Continuous measurement mode 4
Sensor is measured periodically in 100Hz.
Transits to Power-down mode by writing
MODE[4:0] = “00000”.
Continuous measurement mode 5
Sensor is measured periodically in 200Hz.
Transits to Power-down mode by writing
MODE[4:0] = “00000”.
Continuous measurement mode 6
Sensor is measured periodically in 400Hz.
Transits to Power-down mode by writing
MODE[4:0] = “00000”.
Only valid for MT[1:0] = “00” or “01”
Self-test mode
Sensor is self-tested and the result is output.
Transits to Power-down mode automatically.
Figure 9.1. Operation mode
When power is turned ON, AK09940 is in Power-down mode. When a specified value is set to
MODE[4:0] bits, AK09940 transits to the specified mode and starts operation. When user wants to
change operation mode, transit to power-down mode first and then transit to other modes. After Powerdown mode is set, at least 100 µs (Twait) is needed before setting another mode.
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9.4. Description of Each Operation Mode
9.4.1. Power-down Mode
Power to almost all internal circuits is turned off. All registers are accessible in Power-down mode. Data
stored in read/write registers are remained. They can be reset by soft reset.
9.4.2. Single Measurement Mode
When Single measurement mode (MODE[4:0] = “00001”) is set, magnetic sensor measurement is
started. After magnetic sensor measurement and signal processing is finished, measurement magnetic
data is stored to measurement data registers (HXL to HZH), then AK09940 transits to Power-down
mode automatically. On transition to Power-down mode, MODE[4:0] turns to “00000”. If temperature
sensor is enabled (TEM = “1”), temperature sensor measurement is started together with magnetic
sensor measurement and measurement temperature data is stored to measurement data registers
(TMPS). At the same time, DRDY bit in ST1 register turns to “1”. This is called “Data Ready”. When any
of measurement data register (HXL to TMPS) or ST2 register is read, DRDY bit turns to “0”. It remains
“1” on transition from Power-down mode to another mode. DRDY pin is in the same state as DRDY bit.
(Figure 9.2.)
When sensor is measuring (Measurement period), measurement data registers (HXL to TMPS) keep
the previous data. Therefore, it is possible to read out data even in measurement period. Data read out
in measurement period are previous data. (Figure 9.3.)
When ST2 register is read, AK09940 judges that data reading is finished. Stored measurement data is
protected during data reading and data is not updated. By reading ST2 register, this protection is
released. It is required to read ST2 register after data reading.
Operation Mode: Single measuremnet
Power-down
(1)
(3)
(2)
Measurement period
Internal Buffer
Last Data
Measurement Data (1)
Data(2)
Data(3)
Measurement Data Register
Last Data
Measurement Data (1)
Data(2)
Data(3)
DRDY
Data read
ST1 Data(1) ST2
Register Write MODE[4:0] = “00001”
ST1 Data(3)
MODE[4:0] = “00001”
MODE[4:0] = “00001”
Figure 9.2. Single measurement mode when data is read out of measurement period
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Operation Mode:
Power-down
Single measuremnet
(1)
(2)
(3)
Measurement period
Internal Buffer
Last Data
Measurement Data (1)
Measurement Data Register
Last Data
Measurement Data (1)
Data(2)
Data(3)
Data(2)
Data(3)
DRDY
Data read
Register Write
ST1 Data(1) ST2
MODE[4:0] = “00001”
MODE[4:0] = “00001”
MODE[4:0] = “00001”
Figure 9.3. Single measurement mode when data read started during measurement period
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9.4.3. Continuous Measurement Modes
When Continuous measurement mode 1 (MODE[4:0] = “00010”), 2 (MODE[4:0] = “00100”),
3 (MODE[4:0] = “00110”), 4 (MODE[4:0] = “01000”), 5 (MODE[4:0] = “01010”) or 6 (MODE[4:0] =
“01100”) is set, magnetic sensor measurement is started periodically at 10 Hz, 20 Hz, 50 Hz, 100 Hz,
200 Hz or 400 Hz respectively. After magnetic sensor measurement and signal processing is finished,
measurement magnetic data is stored to measurement data registers (HXL to HZH) and all circuits
except for the minimum circuit required for counting cycle length are turned off (PD). When the next
measurement timing comes, AK09940 wakes up automatically from PD and starts measurement again.
If temperature sensor is enabled (TEM = “1”), temperature sensor measurement is started periodically
at 5 Hz, and measurement temperature data is stored to measurement data registers (TMPS). For
example, in the 10 Hz mode, measurement is performed once every 2 times. Continuous
measurement mode ends when Power-down mode (MODE[4:0] = “00000”) is set. It repeats
measurement until Power-down mode is set.
When Continuous measurement mode 1 (MODE[4:0] = “00010”), 2 (MODE[4:0] = “00100”),
3 (MODE[4:0] = “00110”), 4 (MODE[4:0] = “01000”), 5 (MODE[4:0] = “01010”) or 6 (MODE[4:0] =
“01100”) is set again while AK09940 is already in Continuous measurement mode, a new measurement
starts. ST1, ST2 and measurement data registers (HXL to TMPS) will not be initialized by this.
Table 9.2. Continuous measurement modes
Operation mode
Register setting
(MODE[4:0] bits)
00010
00100
00110
01000
01010
01100
Continuous measurement mode 1
Continuous measurement mode 2
Continuous measurement mode 3
Continuous measurement mode 4
Continuous measurement mode 5
Continuous measurement mode 6
(N-1)th
PD
Nth
Measurement
PD
Measurement
frequency [Hz]
10
20
50
100
200
400
(N+1)th
Measurement
PD
10Hz,20Hz,50Hz,100Hz,200Hz or 400Hz
Figure 9.4. Continuous measurement mode
9.4.3.1. Data Ready
When measurement data is stored and ready to be read, DRDY bit in ST1 register turns to “1”. This is
called “Data Ready”. DRDY pin is in the same state as DRDY bit. When measurement is performed
correctly, AK09940 becomes Data Ready on transition to PD after measurement.
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9.4.3.2. Normal Read Sequence
(1) Check Data Ready or not by monitoring DRDY pin
When Data Ready, proceed to the next step.
(2) Read ST1 register
DRDY: Shows Data Ready or not. Not when “0”, Data Ready when “1”.
(3) Read measurement data
When any of measurement data register (HXL to TMPS) or ST2 register is read, AK09940 judges
that data reading is started. When data reading is started, DRDY bit turns to “0”.
(4) Read ST2 register (required)
DOR: Shows if any data has been skipped before the current data or not. There are no skipped
data when “0”, there are skipped data when “1”. After reading ST2 register, DOR bit turns to “0”.
When ST2 register is read, AK09940 judges that data reading is finished. Stored measurement data
is protected during data reading and data is not updated. By reading ST2 register, this protection is
released. It is required to read ST2 register after data reading.
(N-1)th Nth
PD
Measurement
Internal Buffer
(N-1)th
(N+1)th
Measurement
PD
Nth
PD
(N+1)th
Measurement Data Register
(N-1)th
Nth
(N+1)th
DRDY
Data read
ST1 Data(N)
ST2
ST1 Data(N+1)
ST2
Figure 9.5. Normal read sequence
9.4.3.3. Data Read Start during Measurement
When sensor is measuring (Measurement period), measurement data registers (HXL to TMPS) keep
the previous data. Therefore, it is possible to read out data even in measurement period. If data is
started to be read during measurement period, previous data is read.
(N-1)th Nth
Measurement
PD
Internal Buffer
(N-1)th
(N+1)th
Measurement
PD
Nth
PD
(N+1)th
Measurement Data Register
(N-1)th
Nth
(N+1)th
DRDY changes to “1”
because read-out becomes possible
DRDY
Data read
ST1 Data(N)
ST2
ST1 Data(N)
ST2
Figure 9.6. Data read start during measuring
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9.4.3.4. Data Skip
When Nth data was not read before (N+1)th measurement ends, Data Ready remains until data is read.
In this case, a set of measurement data is skipped so that DOR bit turns to “1”.
When data reading started after Nth measurement ended and did not finish reading before (N+1)th
measurement ended, Nth measurement data is protected to keep correct data. In this case, a set of
measurement data is skipped and not stored so that DOR bit turns to “1”.
In both case, DOR bit turns to “0” at the next start of data reading.
(N-1)th Nth
PD
Measurement
Internal Buffer
(N-1)th
(N+1)th
Measurement
PD
PD
Nth
(N+1)th
Measurement Data Register
(N-1)th
Nth
(N+1)th
DRDY
DOR
Data read
ST1 Data(N+1)
ST2
Figure 9.7. Data Skip: when data is not read
(N+1)th
(N-1)th Nth
PD Measurement
Internal Buffer
(N-1)th
PD
(N+2)th
PD
Measurement
Nth
Measurement Data Register
(N-1)th
Nth
PD
Measurement
(N+1)th
(N+2)th
(N+1)th
Data register is protected
because data is being read
(N+2)th
DRDY changes to “1”
because read-out becomes possible.
DRDY
(N+1)th data is skipped
DOR
Data read
ST1 Data(N)
ST2
ST1 Data(N+2)
Figure 9.8. Data Skip: when data read has not been finished before the next measurement end
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[AK09940]
Although Nth data is read out when it is performed during (N+1)th measurement period, (N+1)th data is
obtained by reading out again before completion of (N+2)th measurement.
Internal Buffer
(N-1)th
(N+2)th
(N+1)th
(N-1)th Nth
PD Measurement
PD
PD
Measurement
(N+1)th
Nth
Measurement Data Register
(N-1)th
Nth
PD
Measurement
(N+2)th
(N+1)th
Data register is protected
because data is being read
DRDY changes to “1”
because read-out becomes possible.
DRDY
DOR
Data read
ST1 Data(N)
ST2
ST1 Data(N+1)
Figure 9.9. Read-out is performed before completion of the next measurement after data protection.
9.4.3.5. End Operation
Set Power-down mode (MODE[4:0] = “00000”) to end Continuous measurement mode.
9.4.3.6. Magnetic Sensor Overflow
When magnetic sensor overflow occurs, measurement data register (HXL to HZH) is clipped to
1FFFFh.
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9.4.4. Self-test Mode
Self-test mode is used to check if the magnetic sensor is working normally.
When Self-test mode (MODE[4:0] = “10000”) is set, magnetic field is generated by the internal magnetic
source and magnetic sensor is measured. Measurement data is stored to measurement data registers
(HXL to HZH), then AK09940 transits to Power-down mode automatically. (Temperature sensor is
measured.)
Data read sequence and functions of read-only registers in Self-test mode is the same as Single
measurement mode.
9.4.4.1. Self-test Sequence
(1) Set Power-down mode. (MODE[4:0] = “00000”)
(2) Set Low noise drive 2. (MT[1:0] = “11”)
(3) Set Self-test mode. (MODE[4:0] = “10000”)
(4) Check Data Ready or not by monitoring DRDY pin
When Data Ready, proceed to the next step.
(5) Read measurement data (HXL to HZH)
(6) Read ST2 register (required)
When ST2 register is read, AK09940 judges that data reading is finished. Stored measurement data
is protected during data reading and data is not updated. By reading ST2 register, this protection is
released. It is required to read ST2 register after data reading.
9.4.4.2. Self-test Judgment
When measurement data read by the above sequence is in the range of following table, AK09940 is
working normally.
Criteria
HX[17:0]
(TBD) ≤ HX ≤ (TBD)
HY[17:0]
(TBD) ≤ HY ≤ (TBD)
HZ[17:0]
(TBD) ≤ HZ ≤ (TBD)
9.5. Temperature Sensor
In Single measurement mode, Continuous measurement mode 1, 2, 3, 4, 5 or 6 is set, AK09940 can
measure temperature sensor together with magnetic sensor. When temperature sensor is enabled
(TEM = “1”), temperature sensor measurement is started together with magnetic sensor measurement.
In Continuous measurement mode 1, 2, 3, 4, 5 or 6, temperature sensor measurement is started
periodically at 5 Hz. In Single measurement mode, temperature sensor measurement is stared at every
measurement of magnetic sensor measurement. If user wants to change temperature sensor
measurement enables or disables, please set to Power-down mode before change temperature sensor
measurement.
Default TEM register is “enable” (TEM = “1”).
9.6. Sensor Drive Select
AK09940 can choose “Low power” or “Low noise” drive.
“Low power” is used to save the current consumption and “Low noise” is used to reduce the noise of the
AK09940.
MT[1:0] bits can be changed in Power-down mode only. Default MT[1:0] bits is Low power drive 1
(MT[1:0] bits = “00”).
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9.7. FIFO
FIFO function is available in Continuous measurement modes. FIFO function is enabled by setting
FIFO bit = “1”. It is prohibited to enable FIFO function in any modes other than Continuous
measurement modes.
When FIFO function is enabled, data register (HXL to TMPS) is stored to the buffer as a set of data.
The buffer is capable up to 8 sets of data. If a new data is measured when 8 sets of data is already
stored, the oldest data set is deleted and the new data set is stored. If data register is read when FIFO
function is enabled, the oldest data set is read as first-in first-out method.
When reading out data from the buffer, always start with HXL register and finish with ST2 register. By
accessing HXL register, the oldest data set is passed to the read register from the buffer. Reading ST2
register is regarded as the finish of reading out one set of data. Then the read data set is deleted and
the next oldest data set will be ready to be read. If ST2 register is not read, the same set of data is kept
in the read register.
When FIFO function is enabled, DRDY bit and DOR bit functions differently. DRDY bit informs that data
set is stored up to Watermark. Refer to 9.7.1. for details. DOR bit informs that data set is overflowed
from the buffer. If a set of new data is measured when the buffer is full, DOR bit turns to “1”. If at least
one data set is read from the buffer, DOR bit turns to “0”.
If data is read out when there is no data in the buffer, INV bit is turned to “1”, data register (HXL to HZH)
is clipped to 1FFFFh and data register (TMPS) is clipped to 7Fh. If a set of new data is measured, INV
bit turns to “0”.
When AK09940 is reset (refer to 9.2.), FIFO buffer are initialized.
9.7.1. Watermark
When FIFO function is enabled, Watermark function is available. By setting WM[2:0] bits, AK09940
informs that data set is stored up to or more than Watermark. If the number of stored data set is equal
to or more than the number set to WM[2:0] bits, DRDY bit turns to “1”. If the number of stored data set
is less than the number set to WM[2:0] bits, DRDY bit turns to “0”. DRDY pin is the same state as
DRDY bit.
WM[2:0] should be changed in the Power-down mode only. It is prohibited to write WM[2:0] in other
modes.
9.7.2. FIFO status
When FIFO function is enabled, AK09940 can be use FNUM register for monitor of FIFO.
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[AK09940]
10. Serial Interface
AK09940 supports I2C bus interface and 4-wire SPI. A selection is made by CSB pin. When used as 3wire SPI, set SI pin and SO pin wired-OR externally.
CSB pin = “L”: 4-wire SPI
CSB pin = “H”: I2C bus interface
10.1. 4-wire SPI
The 4-wire SPI consists of four digital signal lines: SK, SI, SO, and CSB, and is provided in 16bit
protocol. Data consists of Read/Write control bit (R/W), register address (7-bit) and control data (8-bit).
To read out all axes measurement data (X, Y, Z), an option to read out more than one byte data using
automatic increment command is available. (Sequential read operation)
CSB pin is low active. Input data is taken in on the rising edge of SK pin, and output data is changed on
the falling edge of SK pin. (SPI-mode3)
Communication starts when CSB pin transits to “L” and stops when CSB pin transits to “H”. SK pin must
be “H” during CSB pin is in transition. Also, it is prohibited to change SI pin during CSB pin is “H” and
SK pin is “H”.
10.1.1. Writing Data
Input 16 bits data on SI pin in synchronous with the 16-bit serial clock input on SK pin. Out of 16 bits
input data, the first 8-bit specify the R/W control bit (R/W = “0” when writing) and register address (7bit), and the latter 8-bit are control data (8-bit). When any of addresses listed on Table 11.1. is input,
AK09940 recognizes that it is selected and takes in latter 8-bit as setting data.
If the number of clock pulses is less than 16, no data is written. If the number of clock pulses is more
than 16, data after the 16th clock pulse on SI pin are ignored.
It is not compliant with serial write operation for multiple addresses.
CSB
1
2
3
4
5
6
7
8
9
RW
A6
A5
A4
A3
A2
A1
A0
D7
10
11
12
13
14
15
16
SK
SI
D6
D5
D4
D3
D2
D1
D0
(INPUT)
SO
Hi-Z
(OUTPUT)
Figure 10.1. 4-wire SPI Writing Data
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10.1.2. Reading Data
Input the R/W control bit (R/W = “1”) and 7-bit register address on SI pin in synchronous with the first 8bit of the 16 bits of a serial clock input on SK pin. Then AK09940 outputs the data held in the specified
register with MSB first from SO pin.
When clocks are input continuously after one byte of data is read, the address is incremented and data
in the next address is output. Accordingly, after the falling edge of the 16th clock and CSB pin is “L”, the
data in the next address is output on SO pin. When CSB pin is driven “L” to “H”, SO pin is placed in the
high-impedance state.
AK09940 has two incrementation lines; 00h to 1Bh and 30h to 33h. In line 00h to 1Bh, the
incrementation depends on FIFO bit. When FIFO function is disabled, AK09940 increment as follows:
00h 01h 02h 03h 10h 11h ... 1Bh 00h 01h … When FIFO function is enabled:
00h 01h 02h 03h 10h 11h ... 1Bh 11h 12h ... In line 30h to 33h, it increments as:
30h 31h 32h 33h 30h …
37h is reserved address. Do not access to this address.
When specified address is other than 00h to 1Bh or 30h to 33h or 36h to 37h, AK09940 recognizes that
it is not selected and keeps SO pin in high-impedance state. Therefore, user can use other addresses
for other devices.
CSB
1
2
3
4
5
6
7
8
RW
A6
A5
A4
A3
A2
A1
A0
9
10
11
12
13
14
15
16
SK
SI
(INPUT)
SO
(OUTPUT)
Hi-Z
Hi-Z
D7
D6
D5
D4
D3
D2
D1
D0
Figure 10.2. 4-wire SPI Reading Data
10.2. I2C Bus Interface
The I2C bus interface of AK09940 supports the Standard mode (100 kHz max.) and the Fast mode (400
kHz max.).
10.2.1. Data Transfer
To access AK09940 on the bus, generate a start condition first.
Next, transmit a one-byte slave address including a device address. At this time, AK09940 compares
the slave address with its own address. If these addresses match, AK09940 generates an
acknowledgement, and then executes READ or WRITE instruction. At the end of instruction execution,
generate a stop condition.
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10.2.1.1. Change of Data
A change of data on the SDA line must be made during “Low” period of the clock on the SCL line.
When the clock signal on the SCL line is “High”, the state of the SDA line must be stable. (Data on the
SDA line can be changed only when the clock signal on the SCL line is “Low”.)
During the SCL line is “High”, the state of data on the SDA line is changed only when a start condition
or a stop condition is generated.
SCL
SDA
DATA LINE
STABLE :
DATA VALID
CHANGE
OF DATA
ALLOWED
Figure 10.3. Data Change
10.2.1.2. Start/Stop Condition
If the SDA line is driven to “Low” from “High” when the SCL line is “High”, a start condition is generated.
Every instruction starts with a start condition.
If the SDA line is driven to “High” from “Low” when the SCL line is “High”, a stop condition is generated.
Every instruction stops with a stop condition.
SCL
SDA
STOP CONDITION
START CONDITION
Figure 10.4. Start and Stop Condition
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10.2.1.3. Acknowledge
The IC that is transmitting data releases the SDA line (in the “High” state) after sending 1-byte data.
The IC that receives the data drives the SDA line to “Low” on the next clock pulse. This operation is
referred as acknowledge. With this operation, whether data has been transferred successfully can be
checked.
AK09940 generates an acknowledge after reception of a start condition and slave address.
When a WRITE instruction is executed, AK09940 generates an acknowledge after every byte is
received.
When a READ instruction is executed, AK09940 generates an acknowledge then transfers the data
stored at the specified address. Next, AK09940 releases the SDA line then monitors the SDA line. If a
master IC generates an acknowledge instead of a stop condition, AK09940 transmits the 8-bit data
stored at the next address. If no acknowledge is generated, AK09940 stops data transmission.
Clock pulse
for acknowledge
SCL FROM
MASTER
8
1
9
DATA
OUTPUT BY
TRANSMITTER
not acknowledge
DATA
OUTPUT BY
RECEIVER
START
CONDITION
acknowledge
Figure 10.5. Generation of Acknowledge
10.2.1.4. Slave Address
The slave address of AK09940 can be selected from the following list by setting CAD0/1 pin. When
CAD pin is fixed to VSS, the corresponding slave address bit is “0”. When CAD pin is fixed to VID, the
corresponding slave address bit is “1”.
Table 10.1. Slave Address and CAD0/1 pin
CAD1
0
0
1
1
CAD0
0
1
0
1
Slave Address
0CH
0DH
0EH
0FH
MSB
0
LSB
0
0
1
1
CAD1
CAD0
R/W
Figure 10.6. Slave Address
The first byte including a slave address is transmitted after a start condition, and an IC to be accessed
is selected from the ICs on the bus according to the slave address.
When a slave address is transferred, the IC whose device address matches the transferred slave
address generates an acknowledge then executes an instruction. The 8th bit (least significant bit) of the
first byte is a R/W bit.
When the R/W bit is set to “1”, READ instruction is executed. When the R/W bit is set to “0”, WRITE
instruction is executed.
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10.2.2. WRITE Instruction
When the R/W bit is set to “0”, AK09940 performs write operation.
In write operation, AK09940 generates an acknowledge after receiving a start condition and the first
byte (slave address) then receives the second byte. The second byte is used to specify the address of
an internal control register and is based on the MSB-first configuration.
MSB
A7
LSB
A6
A5
A4
A3
A2
A1
A0
Figure 10.7. Register Address
After receiving the second byte (register address), AK09940 generates an acknowledge then receives
the third byte.
The third and the following bytes represent control data. Control data consists of 8-bit and is based on
the MSB-first configuration. AK09940 generates an acknowledge after every byte is received. Data
transfer always stops with a stop condition generated by the master.
MSB
D7
LSB
D6
D5
D4
D3
D2
D1
D0
Figure 10.8. Control Data
AK09940 can write multiple bytes of data at a time.
After reception of the third byte (control data), AK09940 generates an acknowledge then receives the
next data. If additional data is received instead of a stop condition after receiving one byte of data, the
address counter inside the LSI chip is automatically incremented and the data is written at the next
address.
The address is incremented from 00h to 1Bh or from 30h to33h. When the address is between 00h and
1Bh, in case that FIFO function is disabled, the address is incremented 00h 01h 02h 03h
10h 11h ... 1Bh, and the address goes back to 00h after 1Bh. In case that FIFO function is
enabled, the address is incremented 00h 01h 02h 03h 10h 11h ... 1Bh, and the
address goes back to 11h after 1Bh. When the address is between 30h and 33h, the address goes
back to 30h after 33h.
Actual data is written only to Read/Write registers. (Table 11.2.)
S
T
A
R
T
SDA
S
S
T
O
P
R/W = “0”
Slave
Address
Register
Address(n)
A
C
K
Data(n)
A
C
K
Data(n+1)
A
C
K
Data(n+x)
A
C
K
A
C
K
P
A
C
K
Figure 10.9. WRITE Instruction
10.2.3. READ Instruction
When the R/W bit is set to “1”, AK09940 performs read operation.
If a master IC generates an acknowledge instead of a stop condition after AK09940 transfers the data
at a specified address, the data at the next address can be read.
Address can be 00h to 1Bh or 30h to 33h. When the address is between 00h and 1Bh, in case that
FIFO function is disabled, the address is incremented 00h 01h 02h 03h 10h 11h ...
1Bh, and the address goes back to 00h after 1Bh. In case that FIFO function is enabled, the address is
incremented 00h 01h 02h 03h 10h 11h ... 1Bh, and the address goes back to 11h after
1Bh. When the address is between 30h and 33h, the address goes back to 30h after 33h.
AK09940 supports one byte read and multiple byte read.
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10.2.3.1. One Byte Read
AK09940 has an address counter inside the LSI chip. In current address read operation, the data at an
address specified by this counter is read.
The internal address counter holds the next address of the most recently accessed address.
For example, if the address most recently accessed (for READ instruction) is address “n”, and a current
address read operation is attempted, the data at address “n+1” is read.
In one byte read operation, AK09940 generates an acknowledge after receiving a slave address for the
READ instruction (R/W bit = “1”). Next, AK09940 transfers the data specified by the internal address
counter starting with the next clock pulse, then increments the internal counter by one. If the master IC
generates a stop condition instead of an acknowledge after AK09940 transmits one byte of data, the
read operation stops.
S
T
A
R
T
SDA
S
S
T
O
P
R/W = “1”
Slave
Address
Data(n)
A
C
K
Data(n+1)
A
C
K
Data(n+2)
A
C
K
Data(n+x)
A
C
K
P
A
C
K
Figure 10.10. One Byte READ
10.2.3.2. Multiple Byte Read
By multiple byte read operation, data at an arbitrary address can be read.
The multiple byte read operation requires to execute WRITE instruction as dummy before a slave
address for the READ instruction (R/W bit = “1”) is transmitted. In random read operation, a start
condition is first generated then a slave address for the WRITE instruction (R/W bit = “0”) and a read
address are transmitted sequentially.
After AK09940 generates an acknowledge in response to this address transmission, a start condition
and a slave address for the READ instruction (R/W bit = “1”) are generated again. AK09940 generates
an acknowledge in response to this slave address transmission. Next, AK09940 transfers the data at
the specified address then increments the internal address counter by one. If the master IC generates a
stop condition instead of an acknowledge after data is transferred, the read operation stops.
S
T
A
R
T
SDA
S
S
T
A
R
T
R/W = “0”
Slave
Address
Register
Address(n)
A
C
K
S Slave
Address
A
C
K
S
T
O
P
R/W = “1”
Data(n)
A
C
K
Data(n+1)
A
C
K
Data(n+x)
A
C
K
P
A
C
K
Figure 10.11. Multiple Byte READ
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11. Registers
11.1. Description of Registers
AK09940 has registers of 22 addresses as indicated in Table 11.1.. Every address consists of 8-bit
data. Data is transferred to or received from the external CPU via the serial interface described
previously.
Table 11.1. Register Table
Name Address
WIA1
WIA2
RSV1
RSV2
ST1
HXL
HXM
HXH
HYL
HYM
HYH
HZL
HZM
HZH
TMPS
ST2
CNTL1
00h
01h
02h
03h
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
30h
CNTL2
31h
CNTL3
32h
CNTL4
33h
I2CDIS
36h
TS
37h
READ/
Bit
Description
WRITE
width
READ
Company ID
8
READ
Device ID
8
READ
Reserved 1
8
READ
Reserved 2
8
READ
Status 1
8
READ
Measurement Magnetic Data
8
READ
8
READ
8
READ
8
READ
8
READ
8
READ
8
READ
8
READ
8
READ Measurement Temperature Data
8
READ
Status 2
8
READ/
Control 1
8
WRITE
READ/
Control 2
8
WRITE
READ/
Control 3
8
WRITE
READ/
Control 4
8
WRITE
READ/
I2C disable
8
WRITE
READ/
Test
8
WRITE
Remarks
Data status
X-axis data
Y-axis data
Z-axis data
Temperature data
Data status
Control settings
Control settings
Control settings
Control settings
DO NOT ACCESS
Addresses 00h to 1Bh and 30h to 33h are compliant with automatic increment function of serial
interface respectively. When the address is in 00h to 1Bh, in case that FIFO function is disabled, the
address is incremented 00h 01h 02h 03h 10h 11h ... 1Bh, and the address goes back
to 00h after 1Bh. In case that FIFO function is enabled, the address is incremented 00h 01h 02h
03h 10h 11h ... 1Bh, and the address goes back to 11h after 1Bh. When the address is in
30h to 33h, the address goes back to 30h after 33h.
Preliminary-E-02
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[AK09940]
11.2. Register Map
Table 11.2. Register Map
Addr.
Register
name
00h
01h
02h
03h
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
WIA1
WIA2
RSV1
RSV2
ST1
HXL
HXM
HXH
HYL
HYM
HYH
HZL
HZM
HZH
TMPS
ST2
30h
31h
32h
33h
36h
37h
CNTL1
CNTL2
CNTL3
CNTL4
I2CDIS
TS
D7
D6
D5
D4
Read-only register
0
1
0
0
1
0
1
0
RSV17 RSV16 RSV15 RSV14
RSV27 RSV26 RSV25 RSV24
0
0
0
FNUM3
HX7
HX6
HX5
HX4
HX15
HX14
HX13
HX12
HX17
HX17
HX17
HX17
HY7
HY6
HY5
HY4
HY15
HY14
HY13
HY12
HY17
HY17
HY17
HY17
HZ7
HZ6
HZ5
HZ4
HZ15
HZ14
HZ13
HZ12
HZ17
HZ17
HZ17
HZ17
TMPS7 TMPS6 TMPS5 TMPS4
0
0
0
0
Read/Write register
0
0
0
0
0
TEM
0
0
FIFO
MT1
MT0 MODE4
0
0
0
0
D3
D2
D1
D0
1
0
RSV13
RSV23
FNUM2
HX3
HX11
HX17
HY3
HY11
HY17
HZ3
HZ11
HZ17
TMPS3
0
0
0
RSV12
RSV22
FNUM1
HX2
HX10
HX17
HY2
HY10
HY17
HZ2
HZ10
HZ17
TMPS2
0
0
0
RSV11
RSV21
FNUM0
HX1
HX9
HX17
HY1
HY9
HY17
HZ1
HZ9
HZ17
TMPS1
INV
0
1
RSV10
RSV20
DRDY
HX0
HX8
HX16
HY0
HY8
HY16
HZ0
HZ8
HZ16
TMPS0
DOR
0
WM2
WM1
WM0
0
0
0
0
MODE3 MODE2 MODE1 MODE0
0
0
0
SRST
I2CDIS7 I2CDIS6 I2CDIS5 I2CDIS4 I2CDIS3 I2CDIS2 I2CDIS1 I2CDIS0
-
-
-
-
-
-
-
-
When VDD is turned ON, POR function works and all registers of AK09940 are initialized regardless of
VID status. To write data to or to read data from register, VID must be ON.
TS is test register for shipment test. Do not access this register.
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[AK09940]
11.3. Detailed Description of Registers
11.3.1. WIA: Who I Am
Addr.
Register
name
00h
01h
WIA1
WIA2
D7
0
1
D6
D5
D4
Read-only register
1
0
0
0
1
0
D3
D2
D1
D0
1
0
0
0
0
0
0
1
D1
D0
WIA1[7:0] bits: Company ID of AKM. It is described in one byte and fixed value.
48h: fixed
WIA2[7:0] bits: Device ID of AK09940. It is described in one byte and fixed value.
A1h: fixed
11.3.2. RSV: Reserved
Addr.
Register
name
02h
03h
RSV1
RSV2
D7
D6
D5
D4
D3
D2
Read-only register
RSV17 RSV16 RSV15 RSV14 RSV13 RSV12 RSV11 RSV10
RSV27 RSV26 RSV25 RSV24 RSV23 RSV22 RSV21 RSV20
RSV1[7:0] bits/ RSV2[7:0] bits: Reserved register used internal of AKM.
11.3.3. ST1: Status 1
Addr.
10h
Register
name
ST1
Reset
D7
D6
0
0
0
0
D5
D4
D3
D2
D1
D0
Read-only register
0
FNUM3 FNUM2 FNUM1 FNUM0 DRDY
0
0
0
0
0
0
FNUM[3:0] bits: FIFO status
“0000”: 0 set
“0001”: 1 set
“0010”: 2 sets
|
“1000”: 8 sets
FNUM bits correspond to how many data sets are currently in the FIFO buffer.
DRDY: Data Ready
“0”: Normal
“1”: Data is ready
When FIFO is disabled (FIFO bit = “0”);
DRDY bit turns to “1” when data is ready in Single measurement mode, Continuous measurement
mode 1, 2, 3, 4, 5, 6 or Self-test mode. It returns to “0” when any one of ST2 register or
measurement data register (HXL to TMPS) is read.
When FIFO is enabled (FIFO bit = “1”);
If the number of stored data set is equal to or more than the number set to WM[2:0] bits, DRDY bit
turns to “1”. If the number of stored data set is less than the number set to WM[2:0] bits, DRDY bit
turns to “0”.
Preliminary-E-02
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[AK09940]
11.3.4. HXL to HZH: Measurement data
Addr.
11h
12h
13h
14h
15h
16h
17h
18h
19h
Register
name
HXL
HXM
HXH
HYL
HYM
HYH
HZL
HZM
HZH
Reset
D7
HX7
HX15
HX17
HY7
HY15
HY17
HZ7
HZ15
HZ17
0
D6
D5
D4
Read-only register
HX6
HX5
HX4
HX14
HX13
HX12
HX17
HX17
HX17
HY6
HY5
HY4
HY14
HY13
HY12
HY17
HY17
HY17
HZ6
HZ5
HZ4
HZ14
HZ13
HZ12
HZ17
HZ17
HZ17
0
0
0
D3
D2
D1
D0
HX3
HX11
HX17
HY3
HY11
HY17
HZ3
HZ11
HZ17
0
HX2
HX10
HX17
HY2
HY10
HY17
HZ2
HZ10
HZ17
0
HX1
HX9
HX17
HY1
HY9
HY17
HZ1
HZ9
HZ17
0
HX0
HX8
HX16
HY0
HY8
HY16
HZ0
HZ8
HZ16
0
Measurement data of magnetic sensor X-axis/Y-axis/Z-axis
HXL[7:0]: X-axis measurement data lower 8-bit
HXM[15:8]: X-axis measurement data middle 8-bit
HXH[17:16]: X-axis measurement data higher 2-bit
HYL[7:0]: Y-axis measurement data lower 8-bit
HYM[15:8]: Y-axis measurement data middle 8-bit
HYH[17:16]: Y-axis measurement data higher 2-bit
HZL[7:0]: Z-axis measurement data lower 8-bit
HZM[15:8]: Z-axis measurement data middle 8-bit
HZH[17:16]: Z-axis measurement data higher 2-bit
Measurement data is stored in two’s complement and Little Endian format. Measurement range of each
axis is -131072 to 131070 in 18-bit output.
Table 11.3. Measurement magnetic data format
Measurement data (each axis) [17:0]
Magnetic flux
density [nT]
Two’s complement
Hex
Decimal
01 1111 1111 1111 1111
1FFFF
131071
overflow
01 1111 1111 1111 1110
1FFFE
131070
|
|
|
Magnetic sensor
00 0000 0000 0000 0001
00001
1
sensitivity (BSE) ×
00 0000 0000 0000 0000
00000
0
Measurement data
11 1111 1111 1111 1111
3FFFF
-1
(Decimal)
|
|
|
10 0000 0000 0000 0000
20000
-131072
When FIFO is enabled (FIFO bit = “1”);
By accessing HXL register, the oldest data set is passed to the read register from the buffer. Reading
ST2 register is regarded as the finish of reading out one set of data. Then the read data set is deleted
and the next oldest data set will be ready to be read. If ST2 register is not read, the same set of data
is kept in the read register. When reading out data, always start with HXL register and finish with ST2
register.
Preliminary-E-02
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[AK09940]
11.3.5. TMPS: Temperature Data
Addr.
1Ah
Register
name
TMPS
Reset
D7
D6
D5
D4
D3
D2
D1
D0
Read-only register
TMPS7 TMPS6 TMPS5 TMPS4 TMPS3 TMPS2 TMPS1 TMPS0
0
0
0
0
0
0
0
0
TMPS[7:0] bits: Measurement data of temperature sensor
Temperature [˚C] = 30 – (TMPS) / 1.72
Measurement data is stored in two’s complement and Little Endian format.
Measurement range of temperature is -43.8˚C (maximum code) to +104.4˚C (minimum code). The
data is clipped to 7Fh when temperature is -43.8˚C or less, and to 80h when +104.4˚C or higher.
Table 11.4. Measurement temperature data format
TMPS[7:0]
Temperature [˚C]
7Fh
-43.8
|
|
01h
29.4
00h
30.0
FFh
30.6
|
|
80h
104.4
Preliminary-E-02
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[AK09940]
11.3.6. ST2: Status 2
Addr.
1Bh
Register
name
ST2
Reset
D7
0
0
D6
0
0
D5
D4
Read-only register
0
0
0
0
D3
D2
D1
D0
0
0
0
0
INV
0
DOR
0
INV: Invalid data
“0”: Normal
“1”: Data is invalid
INV bit functions only when FIFO is enabled (FIFO bit = “1”). If data is read out when there is no data
set in the buffer, INV bit is turned to “1”, data register (HXL to HZH) is clipped to 1FFFFh and data
register (TMPS) is clipped to 7Fh. If a set of new data is measured, INV bit turns to “0”.
DOR: Data Overrun
“0”: Normal
“1”: Data overrun
When FIFO is disabled (FIFO bit = “0”);
DOR bit turns to “1” when data has been skipped in Continuous measurement mode 1, 2, 3, 4, 5 or
6. It returns to “0” when ST2 register is read.
When FIFO is enabled (FIFO bit = “1”);
If a set of new data is measured when the buffer is full, DOR bit turns to “1”. If at least one data set
is read from the buffer, DOR bit turns to “0”.
When FIFO is disabled (FIFO bit = “0”);
ST2 register has a role as data reading end register, also. When any of measurement data register
(HXL to TMPS) is read in Continuous measurement mode 1, 2, 3, 4, 5 or 6, it means data reading start
and taken as data reading until ST2 register is read. Therefore, when any of measurement data is read,
be sure to read ST2 register at the end.
When FIFO is enabled (FIFO bit = “1”);
ST2 register is a part of one set of data stored in the buffer. If any of data register (HXL to TMPS) is
read, be sure to read ST2 register at the end. If there is no data set in the buffer, INV bit is “1”.
Preliminary-E-02
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[AK09940]
11.3.7. CNTL1: Control 1
Addr.
30h
Register
name
CNTL1
Reset
D7
0
0
D6
D5
D4
Read/Write register
0
0
0
0
0
0
D3
D2
D1
D0
0
0
WM2
0
WM1
0
WM0
0
WM[2:0] bits: Watermark level setting
“000”: 1 step
“001”: 2 steps
“010”: 3 steps
|
“111”: 8 steps (upper limit)
Watermark level can be set every 1 step. The upper limit of watermark level is 8 steps (WM[2:0] bits
= “111”).
It is prohibited to change WM[2:0] bits in any other modes than Power-down mode.
11.3.8. CNTL2: Control 2
Addr.
31h
Register
name
CNTL2
Reset
D7
0
0
D6
D5
D4
Read/Write register
TEM
0
0
1
0
0
D3
D2
D1
D0
0
0
0
0
0
0
0
0
TEM: Temperature measurement setting
“0”: disable (Not recommended)
“1”: enable
When TEM bit is “1”, temperature sensor measurement is enabled. Temperature sensor is measured
together with magnetic sensor. Refer to 9.5. for detailed information.
Preliminary-E-02
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[AK09940]
11.3.9. CNTL3: Control 3
Addr.
32h
Register
name
CNTL3
Reset
D7
FIFO
0
D6
MT1
0
D5
D4
D3
D2
D1
D0
Read/Write register
MT0 MODE4 MODE3 MODE2 MODE1 MODE0
0
0
0
0
0
0
MODE[4:0] bits: Operation mode setting
“00000”: Power-down mode
“00001”: Single measurement mode
“00010”: Continuous measurement mode 1
“00100”: Continuous measurement mode 2
“00110”: Continuous measurement mode 3
“01000”: Continuous measurement mode 4
“01010”: Continuous measurement mode 5
“01100”: Continuous measurement mode 6: Only valid for low power drive 1 or 2
“10000”: Self-test mode
Other code settings are prohibited.
When each mode is set, AK09940 transits to the set mode. Refer to 9.3. for detailed information. If
other value is set, AK09940 transits to power-down mode automatically.
FIFO: FIFO setting
“0”: disable
“1”: enable
By writing “1” to FIFO bit, FIFO function is enabled. By writing “0”, FIFO function is disabled and the
buffer is cleared at the same time. FIFO function is available only in Continuous measurement mode.
It is prohibited to enable it other than Continuous measurement mode.
MT[1:0] bits: Sensor drive setting
“00”: Low power drive 1
“01”: Low power drive 2
“10”: Low noise drive 1
“11”: Low noise drive 2
When each drive is set, AK09940 transits to the set drive.
11.3.10. CNTL4: Control 4
Addr.
33h
Register
name
CNTL4
Reset
D7
0
0
D6
0
0
D5
D4
Read/Write register
0
0
0
0
D3
D2
D1
D0
0
0
0
0
0
0
SRST
0
SRST: Soft reset
“0”: Normal
“1”: Reset
When “1” is set, all registers are initialized. After reset, SRST bit turns to “0” automatically.
Preliminary-E-02
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[AK09940]
11.3.11. I2CDIS: I2C Disable
Register
name
Addr.
D7
D6
D5
D4
D3
D2
D1
D0
Read/Write register
36h
I2CDIS
Reset
I2CDIS7 I2CDIS6 I2CDIS5 I2CDIS4 I2CDIS3 I2CDIS2 I2CDIS1 I2CDIS0
0
0
0
0
0
0
0
0
This register disables I2C bus interface. I2C bus interface is enabled in default. To disable I2C bus
interface, write “00011011” to I2CDIS register. Then I2C bus interface is disabled.
Once I2C bus interface is disabled, it is impossible to write other value to I2CDIS register. To enable I2C
bus interface, reset AK09940 or input start condition 8 times continuously.
11.3.12. TS: Test
Addr.
37h
Register
name
TS
Reset
D7
0
D6
0
D5
D4
Read/Write register
0
0
D3
D2
D1
D0
0
0
0
0
TS register is test register for shipment test. Do not access this register.
Preliminary-E-02
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[AK09940]
12. Recommended External Circuits
12.1. I2C Bus Interface
VID
POWER 1.65 V to Vdd
VDD
POWER 1.7 V to 1.98 V
Slave address select
CAD1 CAD0
VSS
VSS
VSS
VID
VID
VSS
VID
VID
Host CPU
address
0 0 0 1 1 0 0 R/W
0 0 0 1 1 0 1 R/W
0 0 0 1 1 1 0 R/W
0 0 0 1 1 1 1 R/W
Power for I/F
0.1 µF
GPIO
RSTN
CAD1
CAD0
0.1 µF
AK09940
C
VID
TST2
VSS
(Top view)
SO
I2C I/F
SDA
/SI
D
B
VDD
SCL
/SK
CSB
DRDY
3
2
1
4
A
Interrupt
Pins of dot circle should be kept non-connected.
Preliminary-E-02
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[AK09940]
12.2. 4-wire SPI
VID
POWER 1.65 V to Vdd
VDD
POWER 1.7 V to 1.98 V
Host CPU
Power for I/F
0.1 µF
GPIO
RSTN
CAD1
CAD0
D
0.1 µF
VID
TST2
AK09940
SDA
/SI
VSS
(Top view)
SO
SPI I/F
C
B
VDD
SCL
/SK
CSB
DRDY
3
2
1
4
A
Interrupt
Preliminary-E-02
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[AK09940]
13. Package
13.1. Marking
Product name: 40
Date code: X1X2X3
X1 = Year code
X2 = Month code
X3 = Lot
X1 X2 X3
4
0
13.2. Pin Assignment
D
C
B
A
4
RSTN
VID
SO
SDA/SI
3
2
CAD1
SCL/SK
CSB
Preliminary-E-02
1
CAD0
VSS
VDD
DRDY
2018/11
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[AK09940]
13.3. Outline Dimensions
[mm]
1.60±0.07
4
3
2
1.2
1
1
2
3
4
D
C
1.2
1.60±0.07
0.4
B
A
0.4
0.24±0.03
0.45
0.6 max.
0.105
13.4. Recommended Foot Print Pattern Outline
[mm]
4
3
2
1
D
C
B
0.4
A
0.4
0.24
Preliminary-E-02
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[AK09940]
14. Relationship between the Magnetic Field and Output Code
The measurement data increases as the magnetic flux density increases in the arrow directions.
Z
Y
X
Preliminary-E-02
2018/11
- 41 -
IMPORTANT NOTICE
0. Asahi Kasei Microdevices Corporation (“AKM”) reserves the right to make changes to the
information contained in this document without notice. When you consider any use or application
of AKM product stipulated in this document (“Product”), please make inquiries the sales office of
AKM or authorized distributors as to current status of the Products.
1. All information included in this document are provided only to illustrate the operation and
application examples of AKM Products. AKM neither makes warranties or representations with
respect to the accuracy or completeness of the information contained in this document nor
grants any license to any intellectual property rights or any other rights of AKM or any third party
with respect to the information in this document. You are fully responsible for use of such
information contained in this document in your product design or applications. AKM ASSUMES
NO LIABILITY FOR ANY LOSSES INCURRED BY YOU OR THIRD PARTIES ARISING FROM
THE USE OF SUCH INFORMATION IN YOUR PRODUCT DESIGN OR APPLICATIONS.
2. The Product is neither intended nor warranted for use in equipment or systems that require
extraordinarily high levels of quality and/or reliability and/or a malfunction or failure of which may
cause loss of human life, bodily injury, serious property damage or serious public impact,
including but not limited to, equipment used in nuclear facilities, equipment used in the
aerospace industry, medical equipment, equipment used for automobiles, trains, ships and other
transportation, traffic signaling equipment, equipment used to control combustions or
explosions, safety devices, elevators and escalators, devices related to electric power, and
equipment used in finance-related fields. Do not use Product for the above use unless
specifically agreed by AKM in writing.
3. Though AKM works continually to improve the Product’s quality and reliability, you are
responsible for complying with safety standards and for providing adequate designs and
safeguards for your hardware, software and systems which minimize risk and avoid situations
in which a malfunction or failure of the Product could cause loss of human life, bodily injury or
damage to property, including data loss or corruption.
4. Do not use or otherwise make available the Product or related technology or any information
contained in this document for any military purposes, including without limitation, for the design,
development, use, stockpiling or manufacturing of nuclear, chemical, or biological weapons or
missile technology products (mass destruction weapons). When exporting the Products or
related technology or any information contained in this document, you should comply with the
applicable export control laws and regulations and follow the procedures required by such laws
and regulations. The Products and related technology may not be used for or incorporated into
any products or systems whose manufacture, use, or sale is prohibited under any applicable
domestic or foreign laws or regulations.
5. Please contact AKM sales representative for details as to environmental matters such as the
RoHS compatibility of the Product. Please use the Product in compliance with all applicable laws
and regulations that regulate the inclusion or use of controlled substances, including without
limitation, the EU RoHS Directive. AKM assumes no liability for damages or losses occurring as
a result of noncompliance with applicable laws and regulations.
6. Resale of the Product with provisions different from the statement and/or technical features set
forth in this document shall immediately void any warranty granted by AKM for the Product and
shall not create or extend in any manner whatsoever, any liability of AKM.
7. This document may not be reproduced or duplicated, in any form, in whole or in part, without
prior written consent of AKM.
Rev.1
Preliminary-E-02
2018/11
- 42 -
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