AK8772

Monolithic Hall Effect ICs　AK-series AK8772 Shipped in packet-tape reel(5000pcs/Reel) AK8772 is ultra-small Hall effect IC of a single silicon chip composed of Hall element and a signal processing IC. Bipolar Hall Supply Voltage Power down Effect Latch 1.6～5.5Ｖ Function Ultra High Sensitivity Bop：1.8mT Output SON CMOS Notice:It is requested to read and accept "IMPORTANT NOTICE" written on the back of the front cover of this catalogue. ●Features ・Precision Bipolar Hall Effect Latch ・Power manageability through "PDN" pin 　Current consumption in Power down mode is less than 1μA ・Low current consumption at active mode : less than avg. 　150μA@VDD=3V ・Ultra small SON package : 1.1×1.4×t0.37mm, Halogen free ●Operational Characteristics VOUT H VOH S or N Package top Bh Package bottom S N or S L VOL Brp 0 Bop N Magnetic flux density ●Functional Block Diagram 1：VDD Item 3：PDN Switch OSC Generates operating clock Timing Logic Generates timing signal requires for Chopper SW, AMP and other circuits Dynamic Offset Cancellation OSC Hall Chopper & Element SW Timing Logic Function 4：OUT Hall Element Hall element fabricated by CMOS process Chopper SW Performs chopping in order to cancel the offset voltage of Hall sensor AMP Schmitt Trigger Latch Logic Output Stage 2：VSS AMP Reduce offset voltage and amplifies Hall output voltage Schmitt Trigger Hysteresis comparator Latch Logic CMOS output, During the power down mode, output Output Stage is latched in its previous state 17 AK8772 •Please be aware that our products are not intended for use in life support equipment, devices, or systems. Use of our products in such applications requires the advance written approval of our sales staff. Certain applications using semiconductor devices may involve potential risks of personal injury, property damage or loss of life. In order to minimize these risks, adequate design and operating safeguards should be provided by the customer to minimize inherent or procedural hazards. Inclusion of our products in such applications is understood to be fully at the risk of the customer using our devices or systems. c ●Absolute Maximum Ratings symbol Min. Max. Power supply voltage VDD ー0.3 ＋6.5 V Output current IOUT ー0.5 ＋0.5 mA OUT Item Unit Note Input voltage VIN ー0.3 VDD＋0.3＊ V PDN Input IIN ー10 ＋10 mA PDN TSTG ー55 ＋125 ℃ current Storage temperature ＊) Less than +6.5V. Note) Stress beyond these listed values may cause permanent damage to the device. ●Recommended Operating Conditions Item symbol Min. Typ. Max. Unit Power supply voltage VDD 1.6 3.0 5.5 V Operating temperature Ta ー30 ＋85 ℃ g ●Electrical Characteristics（Ta=25℃ VDD =3.0V） Item symbol Min. Current consumption 1 IDD1 Current consumption 2 IDD2 PDN input current IIN ー1 PDN input H voltage VIH 0.7VDD PDN input L voltage VIL High level output voltage VOH Low level output voltage VOL Typ. Max. Unit Note 1 μA PDN=0V 60 150 μA PDN=VDD,Average 1 μA V 0.3 VDD ー0.4 V V 0.4 IOUT =ー0.5mA V IOUT=＋0.5mA PDN mode transition time 1 TPD1 （36.6） μs ＊Active→PDN PDN mode transition time 2 TPD2 100 μs PDN→Active Pulse drive period TPD3 0.5 1.0 1.5 ms When PDN＝VDD Pulse drive time TPD4 12.2 24.4 36.6 μs PDN ‘H’ input pulse width TW 100 k μs ＊) This transition time is not guaranteed by inspection because PDN input timing and internal timing are asynchronous ●Magnetic Characteristics①（Ta=25℃ VDD =3.0V） Item symbol Operating point Bop Releasing point Brp Hysteresis Bh Min. Typ. Max. Unit 1.8 4.0 mT ー4.0 ー1.8 mT 3.6 mT n o ●Magnetic Characteristics②（Ta=−30∼＋85℃ VDD =1.6∼5.5V） Item symbol Operating point Bop Releasing point Brp Hysteresis Bh Min. ー4.2 Typ. Max. Unit 1.8 4.2 mT ー1.8 mT 3.6 mT p Note) The specifications in Magnetic Characteristics ② are design targets. 18 AK8772 ●Package（Unit:mm) ●Footprint（for reference) 0.80 0.80 0.50 Sensor Center (0.23) (0.125) 4 1.70 1.00 0.60 0.22 0.22 ※Note 1) Sensitive area position referenced to the center of package within φ0.3mm circle. Note 2) Tolerances of dimension otherwise noted is ±0.05mm. Note 3) Hatched area is plated. Note 4) Center pad area (TAB) should be tied to the VSS or floating 0.37 Pin name Function VDD Power supply VSS Ground PDN Power down H:Device active L:Device power down OUT Output No. 1 2 3 1.40 1.40 0.60 0.35 0.20 1.10 0.50 Note CMOS Input. This pin has to be tied to“H”level when external power control is not used. CMOS Output ●Function Timing Chart B［mT］ N Bop 0 Brp S VPDN［V］ B［mT］ 0 t TPD2（＜100μs） S Brp t VOUT［V］ 0 t TPD1（＜36.6μs） TPD1（＜36.6μs） t TPD2（＜100μs） TPD2（＜100μs） Undefined 0 TPD1（＜36.6μs） t Functional Timing Note1) During power down mode, output is latched in its previous state. Note2) When VDD is supplied, the time from reaching VDD= 1.6V to the update of the output state is equal to TPD2. 19 S 0 t VOUT［V］ IDD［mA］ N VPDN［V］ 0 0 Bop N TPD4（typ.24.4μs） TPD3（typ.1ms） ［mA］ IDD t IDD2（typ.2.5mA） IDDOFF 0 IDD1 （