ADVANCED
LINEAR
DEVICES, INC.
ALD4701A/ALD4701B
ALD4701
QUAD MICROPOWER RAIL-TO-RAIL CMOS OPERATIONAL AMPLIFIER
GENERAL DESCRIPTION
FEATURES
The ALD4701A/ALD4701B/ALD4701 is a quad monolithic CMOS
micropower high slew rate operational amplifier intended for a broad range
of analog applications using ±1V to ±5V dual power supply systems, as well
as +2V to +10V battery operated systems. All device characteristics are
specified for +5V single supply or ±2.5V dual supply systems. Total supply
current for all four operational amplifiers is 1mA maximum at 5V supply
voltage. It is manufactured with Advanced Linear Devices' enhanced
ACMOS silicon gate CMOS process.
• All parameters specified for +5V single
supply or ±2.5V dual supply systems
• Rail-to-rail input and output voltage ranges
• Unity gain stable
• Extremely low input bias currents -- 1.0pA
• High source impedance applications
• Dual power supply ±1.0V to ±5.0V
• Single power supply +2V to +10V
• High voltage gain
• Output short circuit protected
• Unity gain bandwidth of 0.7MHz
• Slew rate of 0.7V/µs
• Low power dissipation
• Symmetrical output drive
• Suitable for rugged, temperature-extreme
environments
The ALD4701A/ALD4701B/ALD4701 is designed to offer a trade-off of
performance parameters providing a wide range of desired specifications.
It has been developed specifically for the +5V single supply or ±1V to ±5V
dual supply user and offers the popular industry standard pin configuration
of LM324 types and ICL7641 types.
Several important characteristics of the device make application easier to
implement at these voltages. First, each operational amplifier can operate
with rail to rail input and output voltages. This means the signal input
voltage and output voltage can be equal to or near to the positive and
negative supply voltages. This feature allows numerous analog serial
stages and flexibility in input signal bias levels. Second, each device was
designed to accommodate mixed applications where digital and analog
circuits may operate off the same power supply or battery. Third, the output
stage can typically drive up to 50pF capacitive and 10KΩ resistive loads.
These features, combined with extremely low input currents, high open
loop voltage gain of 100V/mV, useful bandwidth of 700KHz, a slew rate of
0.7V/µs, low power dissipation of 5mW, low offset voltage and temperature
drift, make the ALD4701A/ALD4701B/ALD4701 a versatile, micropower
quad operational amplifier.
The ALD4701A/ALD4701B/ALD4701, designed and fabricated with silicon
gate CMOS technology, offers 1pA typical input bias current. Due to low
voltage and low power operation, reliability and operating characteristics,
such as input bias currents and warm up time, are greatly improved.
Additionally, robust design and rigorous screening make this device
especially suitable for operation in temperature-extreme environments and
rugged conditions.
ORDERING INFORMATION (“L” suffix denotes lead-free (RoHS))
0°C to +70°C
Operating Temperature Range
0°C to +70°C
-55°C to 125°C
14-Pin
Small Outline
Package (SOIC)
14-Pin
Plastic Dip
Package
14-Pin
CERDIP
Package
ALD4701ASBL
ALD4701BSBL
ALD4701SBL
ALD4701APBL
ALD4701BPBL
ALD4701PBL
ALD4701ADB
ALD4701BDB
ALD4701DB
APPLICATIONS
•
•
•
•
•
•
•
•
•
•
•
•
Voltage follower/buffer/amplifier
Charge integrator
Photodiode amplifier
Data acquisition systems
High performance portable instruments
Signal conditioning circuits
Sensor and transducer amplifiers
Low leakage amplifiers
Active filters
Sample/Hold amplifier
Picoammeter
Current to voltage converter
PIN CONFIGURATION
OUT A
1
14
OUT D
-IN A
2
13
-IN D
+IN A 3
12
+IN D
V+
4
11
V-
+IN B 5
10
+IN C
-IN B
6
9
-IN C
OUT B
7
8
OUT C
TOP VIEW
SBL, PBL, DB PACKAGES
* Contact factory for leaded (non-RoHS) or high temperature versions.
Rev 2.0 ©2010 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, CA 94089-1706 Tel: (408) 747-1155 Fax: (408) 747-1286
www.aldinc.com
ABSOLUTE MAXIMUM RATINGS
Supply voltage, V+
Differential input voltage range
Power dissipation
Operating temperature range SBL, PBL packages
DB package
Storage temperature range
Lead temperature, 10 seconds
CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment.
10.6V
-0.3V to V+ +0.3V
600 mW
0°C to +70°C
-55°C to +125°C
-65°C to +150°C
+260°C
OPERATING ELECTRICAL CHARACTERISTICS
TA = 25°C VS = ±2.5V unless otherwise specified
Min
4701A
Typ
Symbol
Supply
Voltage
VS
V+
Input Offset
Voltage
VOS
Input Offset
Current
IOS
1.0
25
240
1.0
25
240
Input Bias
Current
IB
1.0
30
300
1.0
30
300
Input Voltage
Range
VIR
Input
Resistance
RIN
Input Offset
Voltage Drift
TCVOS
Power Supply
Rejection Ratio
PSRR
65
65
80
80
65
65
80
80
60
60
Common Mode
Rejection Ratio
CMRR
65
65
83
83
65
65
83
83
Large Signal
Voltage Gain
AV
15
100
300
15
100
300
±1.0
2.0
Max
Min
±5.0
10.0
±1.0
2.0
4701B
Typ Max
Parameter
5.3
2.8
ALD4701A/ALD4701B
ALD4701
10.0
11.0
mV
mV
RS ≤ 100KΩ
0°C ≤ TA ≤ +70°C
1.0
25
240
pA
pA
TA = 25°C
0°C ≤ TA ≤ +70°C
1.0
30
300
pA
pA
TA = 25°C
0°C ≤ TA ≤ +70°C
5.3
2.8
V
V
V+ = +5
VS = ±2.5V
5.0
5.8
-0.3
-2.8
5.3
2.8
-0.3
-2.8
-2.48
2.48
-2.40
RS ≤ 100KΩ
80
80
dB
dB
RS ≤ 100KΩ
0°C ≤ TA ≤ +70°C
60
60
83
83
dB
dB
RS ≤ 100KΩ
0°C ≤ TA ≤ +70°C
10
80
300
V/mV
V/mV
V/mV
RL = 100KΩ
RL ≥ 1MΩ
RL = 100KΩ
0°C ≤ TA ≤ +70°C
490
7
0.001 0.01
0.001
4.99 4.999
4.99 4.999
0.01
V
V
RL= 1MΩ V+ = +5V
0°C ≤ TA ≤ +70°C
-2.48 -2.40
2.48
2.40
-2.40
V
V
RL = 100KΩ
0°C ≤ TA ≤ +70°C
2.40
1
Ω
µV/°C
10
2.40
PD
Dual Supply
Single Supply
7
VO low
VO high
Power
Dissipation
V
V
5
0.01
IS
±5.0
10.0
5
0.001
4.999
Supply
Current
Test
Conditions
1012
4.99
ISC
Unit
1012
VO low
VO high
Output Short
Circuit Current
Max
1012
10
Output
Voltage
Range
4701
Typ
±5.0 ±1.0
10.0 2.0
2.0
2.8
-0.3
-2.8
Min
1
-2.48
2.48
1
1000
490 1000
5.0
5.0
Advanced Linear Devices
490
mA
1000
5.0
µA
mW
VIN = 0V
No Load
Both amplifiers
VS = ±2.5V
2 of 9
OPERATING ELECTRICAL CHARACTERISTICS (cont'd)
TA = 25°C VS = ±2.5V unless otherwise specified
Min
4701A
Typ
Min
Max
Min
4701
Typ
Max
Unit
Test
Conditions
Symbol
Input
Capacitance
CIN
1
1
1
Bandwidth
BW
700
700
700
KHz
Slew Rate
SR
0.7
0.7
0.7
V/µs
AV = +1
RL = 100KΩ
Rise time
tr
0.2
0.2
0.2
µs
RL = 100KΩ
20
20
20
%
RL = 100KΩ
CL = 50pF
Overshoot
Factor
Max
4701B
Typ
Parameter
pF
Settling
Time
ts
10.0
10.0
10.0
µs
0.1%
AV = -1
CL = 50pF RL = 100KΩ
Channel
Separation
CS
120
120
120
dB
AV = 100
TA = 25°C VS = ±5.0V unless otherwise specified
Min
4701A
Typ
PSRR
83
83
83
dB
RS ≤ 100KΩ
Common Mode
Rejection Ratio
CMRR
83
83
83
dB
RS ≤ 100KΩ
Large Signal
Voltage Gain
AV
250
250
250
V/mV
RL = 100KΩ
Output Voltage
Range
VO low
VO high
V
V
RL = 100KΩ
Bandwidth
BW
1.0
1.0
1.0
MHz
Slew Rate
SR
1.0
1.0
1.0
V/µs
-4.90
4.90
-4.98
4.98
Max
-4.90
Min
-4.98
4.90 4.98
Max
-4.90
Unit
Test
Conditions
Power Supply
Rejection Ratio
-4.98
4.98
Min
4701
Typ
Symbol
4.90
Max
4701B
Typ
Parameter
AV = +1
CL = 50pF
VS = ± 2.5V -55°C ≤ TA ≤ +125°C unless otherwise specified
4701DA
Typ
Max
Unit
6.0
15.0
mV
8.0
8.0
8.0
nA
10.0
10.0
10.0
nA
VOS
3.0
Input Offset
Current
IOS
Input Bias
Current
IB
Power Supply
Rejection Ratio
PSRR
60
75
60
75
60
75
dB
RS ≤ 100KΩ
Common Mode
Rejection Ratio
CMRR
60
83
60
83
60
83
dB
RS ≤ 100KΩ
Large Signal
Voltage Gain
AV
10
50
10
50
7
50
V/mV
RL ≤ 100KΩ
Output Voltage
Range
VO low
VO high
2.35
-2.47
2.45
2.35
-2.47
2.45
V
V
RL ≤ 100KΩ
-2.47
2.45
-2.40
Min
Test
Conditions
Input Offset
Voltage
2.35
Min
4701BDA
Typ Max
Symbol
ALD4701A/ALD4701B
ALD4701
Min
4701ADA
Typ Max
Parameter
-2.40
Advanced Linear Devices
-2.40
RS ≤ 100KΩ
3 of 9
Design & Operating Notes:
1. The ALD4701A/ALD4701B/ALD4701 CMOS operational amplifier uses
a 3 gain stage architecture and an improved frequency compensation
scheme to achieve large voltage gain, high output driving capability,
and better frequency stability. In a conventional CMOS operational
amplifier design, compensation is achieved with a pole splitting capacitor together with a nulling resistor. This method is, however, very bias
dependent and thus cannot accommodate the large range of supply
voltage operation as is required from a stand alone CMOS operational
amplifier. The ALD4701A/ALD4701B/ALD4701 is internally compensated for unity gain stability using a novel scheme that does not use a
nulling resistor. This scheme produces a clean single pole roll off in the
gain characteristics while providing for more than 70 degrees of phase
margin at the unity gain frequency.
2. The ALD4701A/ALD4701B/ALD4701 has complementary p-channel
and n-channel input differential stages connected in parallel to accomplish rail-to-rail input common mode voltage range. This means that
with the ranges of common mode input voltage close to the power
supplies, one of the two differential stages is switched off internally. To
maintain compatibility with other operational amplifiers, this switching
point has been selected to be about 1.5V below the positive supply
voltage. Since offset voltage trimming on the ALD4701A/ALD4701B/
ALD4701 is made when the input voltage is symmetrical to the supply
voltages, this internal switching does not affect a large variety of
applications such as an inverting amplifier or non-inverting amplifier
with a gain larger than 2.5 (5V operation), where the common mode
voltage does not make excursions above this switching point. The user
should however, be aware that this switching does take place if the
operational amplifier is connected as a unity gain buffer and should
make provision in his design to allow for input offset voltage variations.
3. The input bias and offset currents are essentially input protection diode
reverse bias leakage currents, and are typically less than 1pA at room
temperature. This low input bias current assures that the analog signal
from the source will not be distorted by input bias currents. Normally,
this extremely high input impedance of greater than 1012Ω would not be
a problem as the source impedance would limit the node impedance.
However, for applications where source impedance is very high, it may
be necessary to limit noise and hum pickup through proper shielding.
4. The output stage consists of class AB complementary output drivers,
capable of driving a low resistance load. The output voltage swing is
limited by the drain to source on-resistance of the output transistors as
determined by the bias circuitry, and the value of the load resistor.
When connected in the voltage follower configuration, the oscillation
resistant feature, combined with the rail to rail input and output feature,
makes an effective analog signal buffer for medium to high source
impedance sensors, transducers, and other circuit networks.
5. The ALD4701A/ALD4701B/ALD4701 operational amplifier has been
designed to provide full static discharge protection. Internally, the
design has been carefully implemented to minimize latch up. However,
care must be exercised when handling the device to avoid strong static
fields that may degrade a diode junction, causing increased input
leakage currents. In using the operational amplifier, the user is advised
to power up the circuit before, or simultaneously with, any input
voltages applied and to limit input voltages not to exceed 0.3V of the
power supply voltage levels.
6. The ALD4701A/ALD4701B/ALD4701, with its micropower operation,
offers numerous benefits in reduced power supply requirements, less
noise coupling and current spikes, less thermally induced drift, better
overall reliability due to lower self heating, and lower input bias current.
It requires practically no warm up time as the chip junction heats up to
only 0.4°C above ambient temperature under most operating conditions.
TYPICAL PERFORMANCE CHARACTERISTICS
INPUTS GROUNDED
OUTPUT UNLOADED
1600
COMMON MODE INPUT VOLTAGE RANGE
AS A FUNCTION OF SUPPLY VOLTAGE
±7
+25°C
COMMON MODE INPUT
VOLTAGE RANGE (V)
SUPPLY CURRENT (µA)
SUPPLY CURRENT AS A FUNCTION
OF SUPPLY VOLTAGE
-25°C
1200
TA = -55°C
800
+125°C
400
+70°C
±6
±4
±3
±2
±1
0
0
0
±1
±2
±3
±4
SUPPLY VOLTAGE (V)
±5
0
±6
±3
±4
±5
±6
±7
10
VS = ±2.5V
TA = 25°C
INPUT BIAS CURRENT (pA)
10000
100
VS = ±2.5V
1000
100
10
1.0
0.1
100K
1M
10M
-50
-25
0
25
50
75
100
125
AMBIENT TEMPERATURE (°C)
LOAD RESISTANCE (Ω)
ALD4701A/ALD4701B
ALD4701
±2
INPUT BIAS CURRENT AS A FUNCTION
OF AMBIENT TEMPERATURE
1000
1
10K
±1
SUPPLY VOLTAGE (V)
OPEN LOOP VOLTAGE GAIN AS A
FUNCTION OF LOAD RESISTANCE
OPEN LOOP VOLTAGE
GAIN (V/mV)
TA = 25°C
±5
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4 of 9
TYPICAL PERFORMANCE CHARACTERISTICS (cont'd)
OPEN LOOP VOLTAGE GAIN AS A FUNCTION
OF SUPPLY VOLTAGE AND TEMPERATURE
±6
OUTPUT VOLTAGE SWING (V)
OPEN LOOP VOLTAGE
GAIN (V/mV)
1000
OUTPUT VOLTAGE SWING AS A FUNCTION
OF SUPPLY VOLTAGE
100
10
-55°C ≤ TA ≤ +125°C
RL = 100KΩ
±4
±3
±2
±1
1
0
±2
±4
±6
0
±8
±1
±2
±3
±4
±5
±6
±7
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
INPUT OFFSET VOLTAGE AS A FUNCTION
OF AMBIENT TEMPERATURE
REPRESENTATIVE UNITS
OPEN LOOP VOLTAGE GAIN AS A FUNCTION
OF FREQUENCY
120
OPEN LOOP VOLTAGE
GAIN (dB)
+5
+4
VS = ±2.5V
+3
+2
+1
0
-1
-2
VS = ±2.5V
TA = 25°C
100
-3
-4
80
60
0
40
45
20
90
0
135
180
-20
1
-5
-50
-25
0
+25
+50
+75
10
+100 +125
100
1K
10K 100K
FREQUENCY (Hz)
1M
PHASE SHIFT IN DEGREES
INPUT OFFSET VOLTAGE (mV)
-55°C ≤ TA ≤ +125°C
RL = 100KΩ
±5
10M
AMBIENT TEMPERATURE (°C)
INPUT OFFSET VOLTAGE (mV)
INPUT OFFSET VOLTAGE AS A FUNCTION
OF COMMON MODE INPUT VOLTAGE
LARGE - SIGNAL TRANSIENT
RESPONSE
15
VS = ±2.5V
TA = 25°C
10
2V/div
VS = ±1.0V
TA = 25°C
RL = 100KΩ
CL = 50pF
500mV/div
5µs/div
5
0
-5
-10
-15
-2
-1
0
+1
+2
+3
COMMON MODE INPUT VOLTAGE (V)
LARGE - SIGNAL TRANSIENT
RESPONSE
SMALL - SIGNAL TRANSIENT
RESPONSE
5V/div
VS = ±2.5V
TA = 25°C
RL = 100KΩ
CL = 50pF
100mV/div
VS = ±2.5V
TA = 25°C
RL = 100KΩ
CL = 50pF
2V/div
5µs/div
20mV/div
2µs/div
ALD4701A/ALD4701B
ALD4701
Advanced Linear Devices
5 of 9
TYPICAL APPLICATIONS
RAIL-TO-RAIL VOLTAGE FOLLOWER/BUFFER
TRANSCONDUCTANCE AMPLIFIER
5V
~ 1012Ω
ZIN =
VOUT
RIN = 1012Ω
0.1µF
-
+5V
+
VIN
RL
VOUT
IOUT
+
VIN
RL = R2
1/4 ALD4701
0≤ VIN ≤ 5V
VIN
Min
0.0
0.0
1K
10K
HIGH INPUT IMPEDANCE RAIL-TO-RAIL PRECISION
DC SUMMING AMPLIFIER
1/4 ALD4701
VOUT
Max
2.00
2.45
Min Max
0.0 4.00
0.0 4.90
R2
IOUT = VIN
R2
PHOTO DETECTOR CURRENT TO
VOLTAGE CONVERTER
V+ = +2.5V
RF = 5M
10M
V1
+
V2
10M
0.1µF
I
1/4 ALD4701
VOUT
10M
-
10M
0.1µF
V3
V- ≤ VIN ≤ V+
V4
VOUT = 1 X RF
RL = 100K
+
-2.5V
V- ≤ VOUT ≤ V+
V- = - 2.5V
10M
+2.5V
-
PHOTODIODE
1/4 ALD4701
10M
VOUT = V1 + V2 - V3 - V4
RIN = 10MΩ Accuracy limited by resistor tolerances and input offset voltage
RAIL-TO-RAIL WINDOW COMPARATOR
WIEN BRIDGE OSCILLATOR (RAIL-TO-RAIL)
SINE WAVE GENERATOR
+5V
-
+5V
100K
VOUT
1/4 ALD4701
+
.01µF
2
10K
-5V
C = .01µF
VREF (HIGH) 3
8
1/4 ALD4701
+
1
1/4 74 C00
VOUT
VIN
5
+
7
10K
10K
R = 10K
100K
VREF (LOW) 6
-
4
1/4 ALD4701
~
f=
~ 1.6KHZ
1
=
2πRC
VOUT (LOW) for VREF (LOW) < VIN < VREF (HIGH)
FUNCTION GENERATOR
0.1µF
100K
2 -
4
.01µF
+
54K
0.002µF
0.002µF
1
10K
6 7
11
3
220K
100K
+2.5V
100K
9 8
+
-2.5V
5
Square
Square
Wave
Wave
1/4 ALD4701
14
+
10
100K
27K
27K 13 -
+
Triangle
Triangle
Wave
Wave
1/4 ALD4701
VOUT
12
10K
100K
Sine Wave
27K
-2X GAIN
1/4 ALD4701
1/4 ALD4701
ALD4701A/ALD4701B
ALD4701
Advanced Linear Devices
6 of 9
SOIC-14 PACKAGE DRAWING
14 Pin Plastic SOIC Package
Millimeters
E
S (45°)
Dim
Min
A
1.35
Max
1.75
Min
0.053
Max
0.069
A1
0.10
0.25
0.004
0.010
b
0.35
0.45
0.014
0.018
C
0.18
0.25
0.007
0.010
D-14
8.55
8.75
0.336
0.345
E
3.50
4.05
0.140
0.160
1.27 BSC
e
D
A
Inches
0.050 BSC
H
5.70
6.30
0.224
0.248
L
0.60
0.937
0.024
0.037
ø
0°
8°
0°
8°
S
0.25
0.50
0.010
0.020
A1
e
b
S (45°)
H
L
ALD4701A/ALD4701B
ALD4701
C
ø
Advanced Linear Devices
7 of 9
PDIP-14 PACKAGE DRAWING
14 Pin Plastic DIP Package
Millimeters
E
E1
D
S
A2
A1
A
L
Inches
Dim
A
Min
Max
Min
3.81
5.08
0.105
Max
0.200
A1
0.38
1.27
0.015
0.050
A2
1.27
2.03
0.050
0.080
b
0.89
1.65
0.035
0.065
b1
0.38
0.51
0.015
0.020
c
0.20
0.30
0.008
0.012
D-14
17.27
19.30
0.680
0.760
E
5.59
7.11
0.220
0.280
E1
7.62
8.26
0.300
0.325
e
2.29
2.79
0.090
0.110
e1
7.37
7.87
0.290
0.310
L
2.79
3.81
0.110
0.150
S-14
1.02
2.03
0.040
0.080
ø
0°
15°
0°
15°
e
b
b1
c
e1
ALD4701A/ALD4701B
ALD4701
ø
Advanced Linear Devices
8 of 9
CERDIP-14 PACKAGE DRAWING
14 Pin CERDIP Package
Millimeters
E E1
D
A1
s
A
L
L1
L2
b
b1
e
Inches
Dim
A
Min
Max
Min
3.55
5.08
0.140
Max
0.200
A1
1.27
2.16
0.050
0.085
b
0.97
1.65
0.038
0.065
b1
0.36
0.58
0.014
0.023
C
0.20
0.38
0.008
0.015
D-14
--
19.94
--
0.785
E
5.59
7.87
0.220
0.310
E1
7.73
8.26
0.290
0.325
e
2.54 BSC
0.100 BSC
e1
7.62 BSC
0.300 BSC
L
3.81
5.08
0.150
0.200
L1
3.18
--
0.125
--
L2
0.38
1.78
0.015
0.070
S
--
2.49
--
0.098
Ø
0°
15°
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15°
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ALD4701A/ALD4701B
ALD4701
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Advanced Linear Devices
9 of 9
工商网监
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