3961

3961 DUAL FULL-BRIDGE PWM MOTOR DRIVER 3961 Designed for pulse-width modulated (PWM) current control of bipolar stepper motors, the A3961S— is capable of continuous output currents to ±800 mA and operating voltages to 45 V. Internal fixed off-time PWM current-control circuitry can be used to regulate the maximum load current to a desired value. An internal precision voltage reference is provided to improve motor peak current control accuracy. The peak load current limit is set by the user’s selection of an external resistor divider and current-sensing resistors. The fixed off-time pulse duration is set by user-selected external RC timing networks. The capacitor in the RC timing network also determines a user-selectable blanking window that prevents false triggering of the PWM current control circuitry during switching transitions. This eliminates the need for two external RC filter networks on the current-sensing comparator inputs. Data Sheet 29319.26 DUAL FULL-BRIDGE PWM MOTOR DRIVER OUT 1 1B E1 2 24 23 OUT 2B E2 Note the A3961SB (DIP) and the A3961SLB (SOIC) are electrically identical and share a common terminal number assignment. ABSOLUTE MAXIMUM RATINGS Load Supply Voltage, VBB . . . . . . . . . . 45 V Output Current, IOUT . . . . . . . . . . ±800 mA* Logic Supply Voltage, VCC . . . . . . . . . 7.0 V Logic Input Voltage Range, VIN . . . . . . . . . . . -0.3 V to VCC + 0.3 V Sense Voltage, VSENSE . . . . . . . . . . . . 1.0 V Reference Output Current, IREF OUT . . . . . . . . . . . . . . . . . . . 1.0 mA Package Power Dissipation, PD . . . . . . . . . . . . . . . . . . . . See Graph Operating Temperature Range, TA . . . . . . . . . . . . . . . . . -20˚C to +85˚C Junction Temperature, TJ . . . . . . . +150˚C† Storage Temperature Range, TS . . . . . . . . . . . . . . . . -55˚C to +150˚C * Output current rating may be limited by duty cycle, ambient temperature, and heat sinking. Under any set of conditions, do not exceed the specified current rating or a junction temperature of 150˚C. † Fault conditions that produce excessive junction temperature will activate device thermal shutdown circuitry. These conditions can be tolerated but should be avoided. T C UY DL ON RO PE DC EN UE IN ER TF NE OR CR IS O DF — SENSE 1 3 OUT1A 4 VBB1 5 22 SENSE 2 21 OUT 2A V BB2 20 GROUND 6 19 GROUND GROUND 7 VREFOUT 8 VREFIN 9 18 GROUND 17 I FULL/PD 16 V CC RC1 10 15 RC 2 PHASE1 11 14 PHASE 2 ENABLE1 12 13 ENABLE 2 For each bridge the PHASE input controls load current polarity by selecting the appropriate source and sink driver pair. For each bridge the ENABLE input, when held high, disables the output drivers. Special power-up sequencing is not required. Internal circuit protection includes thermal shutdown with hysteresis, transient-suppression diodes, and crossover-current protection. The A3961S— is supplied in a choice of two power packages: 24-pin dual-in-line plastic package with copper heat-sink tabs and 24-lead plastic SOIC with copper heat-sink tabs. In both packages the power tab is at ground potential and needs no electrical isolation. FEATURES s s s s s s s ±800 mA Continuous Output Current Rating 45 V Output Voltage Rating Internal PWM Current Control, Saturated Sink Drivers Internally Generated Precision 2.5 V Reference Internal Transient-Suppression Diodes Internal Thermal-Shutdown Circuitry Crossover-Current Protection, UVLO Protection Always order by complete part number: PART NUMBER A3961SB A3961SLB PACKAGE 24-Pin DIP 24-Lead SOIC RθJA 40°C/W 55°C/W RθJT 6°C/W 6°C/W 3961 DUAL FULL-BRIDGE PWM MOTOR DRIVER ALLOWABLE PACKAGE POWER DISSIPATION IN WATTS 5 RθJT = 6.0°C/W TRUTH TABLE ENABLE PHASE X H L OUTA Off H L OUTB Off L H 4 3 SUFFIX 'B', R θJA = 40°C/W H L L 2 1 X = Irrelevant SUFFIX 'LB', R θJA = 55°C/W 0 25 50 75 100 TEMPERATURE IN °C 125 150 Dwg. GP-049A FUNCTIONAL BLOCK DIAGRAM AND TYPICAL BIPOLAR STEPPER MOTOR APPLICATION MOTOR SUPPLY 2 MOTOR SUPPLY 1 C BB V BB1 LOGIC SUPPLY C cc V cc GND C BB2 V BB2 OUT 1A OUT 1B OUT 2A OUT 2B ENABLE 1 PHASE 1 CONTROL LOGIC AND LEVEL SHIFT BLANKING TIME AND SOURCE DRIVER T OFF CONTROL UVLO AND TSD VOLTAGE REFERENCE CONTROL LOGIC AND LEVEL SHIFT BLANKING TIME AND SOURCE DRIVER T OFF CONTROL ENABLE 2 PHASE 2 RC1 + _ + _ RC 2 SENSE 1 RT1 CT1 E1 I FULL/PD REF OUT R1 REFIN R2 E2 RS2 SENSE 2 CT2 RT2 E2 RS1 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright ©1995, 1996, Allegro MicroSystems, Inc. 3961 DUAL FULL-BRIDGE PWM MOTOR DRIVER ELECTRICAL CHARACTERISTICS at TA = +25°C, VBB = 45 V, VCC = 4.75 V to 5.25 V, VSENSE = 0 V, 30 kΩ & 1000 pF RC to Ground (unless noted otherwise) Limits Characteristic Symbol Test Conditions Min. Typ. Max. Units Output Drivers Load Supply Voltage Range Output Leakage Current VBB ICEX Operating, IOUT = ±800 mA, L = 3 mH VOUT = VBB VOUT = 0 V Output Saturation Voltage VCE(SAT) Source Driver, IOUT = -500 mA Source Driver, IOUT = -750 mA Source Driver, IOUT = -800 mA Sink Driver, IOUT = +500 mA Sink Driver, IOUT = +750 mA Sink Driver, IOUT = +800 mA Clamp Diode Forward Voltage (Sink or Source) VF IF = 500 mA IF = 750 mA IF = 800 mA Motor Supply Current (No Load) IBB(ON) IBB(OFF) VENABLE = 0.8 V VENABLE = 2.4 V 5.0 — — — — — — — — — — — — — —