3968_03

3968 A3968SLB (SOIC) OUT1A INPUT1A INPUT1B GROUND SENSE 1 OUT 1B LOAD SUPPLY REFERENCE 1 2 3 4 5 6 7 8 V REF VBB V CC RC LOGIC LOGIC VBB 16 15 14 13 12 11 10 9 OUT 2A INPUT2A INPUT2B GROUND SENSE 2 OUT 2B LOGIC SUPPLY RC DUAL FULL-BRIDGE PWM MOTOR DRIVER WITH BRAKE The A3968SA and A3968SLB are designed to bidirectionally control two dc motors. Each device includes two H-bridges capable of continuous output currents of ±650 mA and operating voltages to 30 V. Motor winding current can be controlled by the internal fixed-frequency, pulse-width modulated (PWM), current-control circuitry. The peak load current limit is set by the user’s selection of a reference voltage and current-sensing resistors. Except for package style and pinout, the two devices are identical. The fixed-frequency pulse duration is set by a user-selected external RC timing network. The capacitor in the RC timing network also determines a user-selectable blanking window that prevents false triggering of the PWM current-control circuitry during switching transitions. To reduce on-chip power dissipation, the H-bridge power outputs have been optimized for low saturation voltages. The sink drivers feature the Allegro® patented Satlington® output structure. The Satlington outputs combine the low voltage drop of a saturated transistor and the high peak current capability of a Darlington. For each bridge, the INPUTA and INPUTB terminals determine the load current polarity by enabling the appropriate source and sink driver pair. When a logic low is applied to both INPUTs of a bridge, the braking function is enabled. In brake mode, both source drivers are turned OFF and both sink drivers are turned ON, thereby dynamically braking the motor. When a logic high is applied to both INPUTs of a bridge, all output drivers are disabled. Special power-up sequencing is not required. Internal circuit protection includes thermal shutdown with hysteresis, ground-clamp and flyback diodes, and crossover-current protection. The A3968SA is supplied in a 16-pin dual in-line plastic package. The A3968SLB is supplied in a 16-pin plastic SOIC with copper heat sink tabs. The power tab is at ground potential and needs no electrical isolation. The LB package is available in a lead (Pb) free version (100% matte tin leadframe). Data Sheet 29319.29E Dwg. PP-066 ABSOLUTE MAXIMUM RATINGS Load Supply Voltage, VBB ................... 30 V Output Current, IOUT (peak) .......... ±750 mA (continuous) .............................. ±650 mA Logic Supply Voltage, VCC ................. 7.0 V Input Voltage, Vin ..... -0.3 V to VCC + 0.3 V Sense Voltage, VS ................................ 1.0 V Package Power Dissipation (TA = 25°C), PD A3968SA ..................................... 1.8 W* A3968SLB ................................... 1.4 W* Operating Temperature Range, TA ................................... -20°C to +85°C Junction Temperature, TJ ................................................. +150°C Storage Temperature Range, TS ................................. -55°C to +150°C Output current rating may be limited by duty cycle, ambient temperature, and heat sinking. Under any set of conditions, do not exceed the specified current rating or a junction temperature of 150°C. * Per SEMI G42-88 Specification, Thermal Test Board Standardization for Measuring Junctionto-Ambient Thermal Resistance of Semiconductor Packages. FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ±650 mA Continuous Output Current 30 V Output Voltage Rating Internal Fixed-Frequency PWM Current Control Satlington Sink Drivers Brake Mode User-Selectable Blanking Window Internal Ground-Clamp & Flyback Diodes Internal Thermal-Shutdown Circuitry Crossover-Current Protection and UVLO Protection Part Number A3968SLB-T A3968SLBTR-T * Pb-free* Yes Yes RθJA (°C/W) 90 90 RθJT (°C/W) 6 6 Package 16-Lead SOIC 16-Lead SOIC Packing 47 per tube 1000 per reel Pb-based variants are being phased out of the product line. The variants cited in this footnote are in production but have been determined to be LAST TIME BUY. This classification indicates that sale of this device is currently restricted to existing customer applications. The variants should not be purchased for new design applications because obsolescence in the near future is probable. Samples are no longer available. Status change: October 31, 2006. Deadline for receipt fo LAST TIME BUY orders: April 27, 2007. These variants include: A3968SA, A3968SLB, and A3968SLBTR. 3968 DUAL FULL-BRIDGE PWM MOTOR DRIVER WITH BRAKE FUNCTIONAL BLOCK DIAGRAM (one-half of circuit shown) LOGIC SUPPLY LOAD SUPPLY OUTA OUTB INPUTA V CC + V BB UVLO & TSD INPUTB SOURCE ENABLE BLANKING GATE CURRENT-SENSE COMPARATOR CONTROL LOGIC SENSE TO OTHER BRIDGE ÷4 PWM LATCH R Q S + – TO OTHER BRIDGE GROUND RC OSC TO OTHER BRIDGE RS RT CT REFERENCE Dwg. FP-036-4 A3968SA (DIP) SENSE 1 OUT 1B LOAD SUPPLY REFERENCE RC LOGIC SUPPLY OUT 2B SENSE 2 1 16 INPUT1B INPUT1A OUT 1A GROUND GROUND OUT 2A INPUT 2A INPUT 2B TRUTH TABLE INPUTA L L H H INPUTB L H L H OUTA L L H Z OUTB L H L Z Description Brake mode “Forward” “Reverse” Disable 2 3 4 5 6 7 8 V REF RC V LOGIC 15 14 V BB 13 12 11 Z = High impedance CC LOGIC 10 9 Dwg. PP-066-3 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright © 1997, 2003 Allegro MicroSystems, Inc. 3968 DUAL FULL-BRIDGE PWM MOTOR DRIVER WITH BRAKE ELECTRICAL CHARACTERISTICS at TA = +25°C, VBB = 30 V, VCC = 4.75 V to 5.5 V, VREF = 2 V, VS = 0 V, 56 kΩ & 680 pF RC to Ground (unless noted otherwise) Limits Characteristic Output Drivers Load Supply Voltage Range Output Leakage Current VBB ICEX Operating, IOUT = ±650 mA, L = 3 mH VOUT = 30 V VOUT = 0 V Output Saturation Voltage VCE(SAT) Source Driver, IOUT = -400 mA Source Driver, IOUT = -650 mA Sink Driver, IOUT = +400 mA, VS = 0.5 V Sink Driver, IOUT = +650 mA, VS = 0.5 V Clamp Diode Forward Voltage VF IF = 400 mA IF = 650 mA Motor Supply Current (No Load) IBB(ON) IBB(OFF) Both bridges ON (forward or reverse) All INPUTs = 2.4 V VCC — — — — — — — — — — —