A1184
Standard Two-Wire Field-Programmable Chopper-Stabilized
Unipolar Hall-Effect Switches
Discontinued Product
This device is no longer in production. The device should not be
purchased for new design applications. Samples are no longer available.
Date of status change: October 31, 2011
Recommended Substitutions:
• for the A1184ELHLT-T and A1184LLHLT-T use the A1194LLHLX-T
• for the A1184EUA-T and A1184LUA-T use the A1194LUA-T
NOTE: For detailed information on purchasing options, contact your
local Allegro field applications engineer or sales representative.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, revisions to the anticipated product life cycle plan
for a product to accommodate changes in production capabilities, alternative product availabilities, or market demand. The
information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringements of patents or other rights of third parties which may result from its use.
A1184
Standard Two-Wire Field-Programmable Chopper-Stabilized
Unipolar Hall-Effect Switches
Features and Benefits
Description
▪ Chopper stabilization
▫ Low switchpoint drift over operating
temperature range
▫ Low sensitivity to stress
▪ Field programmable for optimized switchpoints
▪ On-chip protection
▫ Supply transient protection
▫ Reverse-battery protection
▫ On-board voltage regulator
▫ 3.5 to 24 V operation
The A1184 device is a standard, two-wire, unipolar, Hall effect
switch. The operate point, BOP, can be field-programmed,
after final packaging of the device and placement into the
application. This advanced feature allows the optimization of
the device switching performance, by effectively accounting
for variations caused by mounting tolerances for the device
and the target magnet.
This device is produced on the Allegro MicroSystems advanced
BiCMOS wafer fabrication process, which implements a
high-frequency, chopper-stabilization technique that
achieves magnetic stability and eliminates the offsets
that are inherent in single-element devices exposed to harsh
application environments. Commonly found in a number of
automotive applications, the A1184 is utilized in sensing: seat
track position, seat belt buckle presence, hood/trunk latching,
and shift selector position.
Packages: 3 pin SOT23W (suffix LH), and
3 pin SIP (suffix UA)
Two-wire unipolar switches are particularly advantageous
in price-sensitive applications, because they require one
less wire than the more traditional open-collector output
switches. Additionally, the system designer gains inherent
diagnostics because output current normally flows in either
Continued on the next page…
Not to scale
Functional Block Diagram
V+
VCC
Program/Lock
Programming
Logic
Offset
Regulator
Clock/Logic
Amp
Sample and Hold
Dynamic Offset
Cancellation
0.01 uF
Low-Pass
Filter
GND
Package UA Only
A1184-DS, Rev. 8
GND
Standard Two-Wire Field-Programmable
Chopper-Stabilized Unipolar Hall Effect Switch
A1184
Description (continued)
of two narrowly-specified ranges. Any output current level outside
of these two ranges is a fault condition. The A1184 also features
on-chip transient protection, and a Zener clamp to protect against
overvoltage conditions on the supply line.
The output current of the A1184 switches HIGH in the presence of
a south polarity magnetic field of sufficient strength; and switches
LOW otherwise, including when there is no significant magnetic
field present.
Both devices are offered in two package styles: LH, a SOT-23W
miniature low-profile package for surface-mount applications, and
UA, a three-lead ultramini Single Inline Package (SIP) for throughhole mounting. Each package is available in a lead (Pb) free version
(suffix, –T) with 100% matte tin plated leadframe.
Factory-programmed versions are also available. Refer to: A1140,
A1141, A1142, A1143, A1145, and A1146.
Selection Guide
Part Number
Packing1
A1184ELHLT-T
7-in. reel, 3000 pieces/reel
Surface mount
Bulk, 500 pieces/bag
SIP through hole
7-in. reel, 3000 pieces/reel
Surface mount
Bulk, 500 pieces/bag
SIP through hole
A1184EUA-T
A1184LLHLT-T
A1184LUA-T
Mounting
Ambient, TA
(°C)
Output
South (+) Field2
Supply Current at
Low Output, ICC(L)
(mA)
High
5 to 6.9
–40 to 85
–40 to 150
1Contact Allegro
for additional packing options.
2South (+) magnetic fields must be of sufficient strength.
Absolute Maximum Ratings
Characteristic
Symbol
Notes
Rating
Units
Supply Voltage
VCC
28
V
Reverse Supply Voltage
VRCC
–18
V
Magnetic Flux Density
B
Unlimited
G
Range E
–40 to 85
ºC
Range L
Operating Ambient Temperature
TA
–40 to 150
ºC
Maximum Junction Temperature
TJ(max)
165
ºC
Tstg
–65 to 170
ºC
Storage Temperature
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
2
Standard Two-Wire Field-Programmable
Chopper-Stabilized Unipolar Hall Effect Switch
A1184
ELECTRICAL CHARACTERISTICS over the operating voltage and temperature range, unless otherwise specified
Characteristic
Symbol
Supply Voltage1
Supply Current2
Test Conditions
Min.
Typ.
Max.
Units
3.5
–
24
V
VCC
Device powered on
ICC(L)
B BOP
12
–
17
mA
Supply Zener Clamp Voltage
VZ(supply)
ICC = ICC(L)(max) + 3 mA; TA = 25°C
28
–
40
V
Supply Zener Clamp Current3
IZ(supply)
VZ(supply) = 28 V
–
–
9.9
mA
Reverse Supply Current
IRCC
VRCC = –18 V
–
–
–1.6
mA
Output Slew Rate4
di/dt
No bypass capacitor; capacitance of the
oscilloscope performing the measurement
= 20 pF
–
36
–
mA/μs
–
200
–
kHz
After factory trimming; with and without
bypass capacitor (CBYP = 0.01 μF)
–
–
25
μs
ton ≤ ton(max); VCC slew rate ≥ 25 mV/μs
–
HIGH
–
–
Chopping Frequency
fC
Power-On Time5
ton
Power-On State6,7
POS
1V
CC represents
2Relative values
the generated voltage between the VCC pin and the GND pin.
of B use the algebraic convention, where positive values indicate south magnetic polarity, and negative values indicate north magnetic
polarity; therefore greater B values indicate a stronger south polarity field (or a weaker north polarity field, if present).
3I
ZSUPPLY(max) = ICCL(max) + 3 mA.
4Measured without bypass capacitor between VCC and GND. Use of a bypass capacitor results in slower current change.
5Measured with and without bypass capacitor of 0.01 μF. Adding a larger bypass capacitor causes longer Power-On Time.
6POS is defined as true only with a V
CC slew rate of 25 mV / μs or greater. Operation with a VCC slew rate less than 25 mV / μs can permanently harm
device performance.
7POS is undefined for t > t or B
on
RP < B < BOP .
MAGNETIC CHARACTERISTICS1 over the operating voltage and temperature range, unless otherwise specified
Characteristic
Symbol
Programmable Operate Point Range
BOPrange
Initial Operate Point Range
Switchpoint Step Size2
Number of Programming Bits
Min.
Typ.
Max.
Units
ICC = ICC(H)
300
–
600
G
BOPinit
VCC = 12 V
–
262
300
G
BRES
VCC = 5 V, TA = 25°C
8
16
24
G
Switchpoint setting
–
5
–
Bit
Programming locking
–
1
–
Bit
–
–
±20
G
5
15
30
G
–
Temperature Drift of BOP
∆BOP
Hysteresis
BHYS
Test Conditions
BHYS = BOP – BRP
1Relative
values of B use the algebraic convention, where positive values indicate south magnetic polarity, and negative values indicate north magnetic
polarity; therefore greater B values indicate a stronger south polarity field (or a weaker north polarity field, if present).
2The range of values specified for B
RES is a maximum, derived from the cumulative programming bit errors.
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
3
Standard Two-Wire Field-Programmable
Chopper-Stabilized Unipolar Hall Effect Switch
A1184
Characteristic Data
ICC(L) versus Ambient Temperature
at Various Levels of VCC
(A1184)
ICC(H) versus Ambient Temperature
at Various Levels of VCC
(A1184)
20
10
18
VCC (V)
6
3.5
12.0
24.0
4
ICC(H) (mA)
ICC(L) (mA)
8
VCC (V)
16
3.5
12.0
24.0
14
12
2
0
10
-50
0
50
100
150
200
-50
0
Ambient Temperature, TA (°C)
150
200
Hysteresis versus Ambient Temperature
at Various Levels of VCC
(A1184)
30
700
600
25
400
300
200
100
0
VCC (V)
BHYS (G)
BOPinit
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
500
BOP (G)
100
Ambient Temperature, TA (°C)
Average BOP Bits versus Ambient Temperature
(A1184)
-50
50
20
3.5
12.0
24.0
15
10
5
0
50
100
150
200
-50
0
50
100
150
200
Ambient Temperature, TA (°C)
Ambient Temperature, TA (°C)
Device Qualification Program
Contact Allegro MicroSystems for information.
EMC (Electromagnetic Compatibility) Requirements
Contact your local representative for EMC results.
Test Name
Reference Specification
ESD – Human Body Model
AEC-Q100-002
ESD – Machine Model
AEC-Q100-003
Conducted Transients
ISO 7637-2
Direct RF Injection
ISO 11452-7
Bulk Current Injection
ISO 11452-4
TEM Cell
ISO 11452-3
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
4
Standard Two-Wire Field-Programmable
Chopper-Stabilized Unipolar Hall Effect Switch
A1184
THERMAL CHARACTERISTICS may require derating at maximum conditions, see application information
Characteristic
Symbol
RθJA
Package Thermal Resistance
Test Conditions*
Value Units
Package LH, 1-layer PCB with copper limited to solder pads
228
ºC/W
Package LH, 2-layer PCB with 0.463 in.2 of copper area each side
connected by thermal vias
110
ºC/W
Package UA, 1-layer PCB with copper limited to solder pads
165
ºC/W
*Additional thermal information available on Allegro Web site.
Maximum Allowable VCC (V)
Power Derating Curve
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
VCC(max)
2-layer PCB, Package LH
(RθJA = 110 ºC/W)
1-layer PCB, Package UA
(RθJA = 165 ºC/W)
1-layer PCB, Package LH
(RθJA = 228 ºC/W)
20
40
60
80
100
VCC(min)
120
140
160
180
Temperature (ºC)
Power Dissipation, PD (m W)
Power Dissipation versus Ambient Temperature
1900
1800
1700
1600
1500
1400
1300
1200
1100
1000
900
800
700
600
500
400
300
200
100
0
2l
(R aye
rP
θJ
C
A =
11 B, P
0 º ac
1-la
C/ ka
W
(R yer PC
) ge L
θJA =
B
H
165 , Pac
ºC/ kage
W)
UA
1-lay
er P
(R
CB,
θJA =
228 Packag
ºC/W
e LH
)
20
40
60
80
100
120
Temperature (°C)
140
160
180
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
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5
A1184
Standard Two-Wire Field-Programmable
Chopper-Stabilized Unipolar Hall Effect Switch
Functional Description
Operation
The output, ICC, of the A1184 device switches high after the
magnetic field at the Hall element exceeds the operate point
threshold, BOP. When the magnetic field is reduced to below the
release point threshold, BRP, the device output goes low. The differences between the magnetic operate and release point is called
the hysteresis of the device, BHYS. This built-in hysteresis allows
clean switching of the output even in the presence of external
mechanical vibration and electrical noise. (See figure 1).
I+
ICC
Switch to Low
Switch to High
ICC(H)
ICC(L)
BRP
B–
BOP
0
B+
BHYS
Figure 1. On the horizontal axis, the B+ direction indicates
increasing south polarity magnetic field strength, and the
B– direction indicates decreasing south polarity field strength
(including the case of increasing north polarity).
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115 Northeast Cutoff
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6
Standard Two-Wire Field-Programmable
Chopper-Stabilized Unipolar Hall Effect Switch
A1184
Chopper Stabilization Technique
A limiting factor for switchpoint accuracy when using Hall
effect technology is the small signal voltage developed across
the Hall element. This voltage is proportionally small relative to
the offset that can be produced at the output of the Hall element
device. This makes it difficult to process the signal and maintain
an accurate, reliable output over the specified temperature and
voltage range.
Chopper stabilization is a unique approach used to minimize
Hall offset on the chip. The Allegro technique, dynamic
quadrature offset cancellation, removes key sources of the output
drift induced by temperature and package stress. This offset
reduction technique is based on a signal modulation-demodulation process. The undesired offset signal is separated from the
magnetically induced signal in the frequency domain through
modulation. The subsequent demodulation acts as a modulation
process for the offset causing the magnetically induced signal to
recover its original spectrum at base band while the DC offset
becomes a high frequency signal. Then, using a low-pass filter,
the signal passes while the modulated DC offset is suppressed.
The chopper stabilization technique uses a 200 kHz high frequency clock. For demodulation process, a sample-and-hold
technique is used, where the sampling is performed at twice
the chopper frequency (400KHz). The sampling demodulation
process produces higher accuracy and faster signal processing
capability. Using this chopper stabilization approach, the chip is
desensitized to the effects of temperature and stress. This technique produces devices that have an extremely stable quiescent
Hall output voltage, is immune to thermal stress, and has precise
recoverability after temperature cycling. This technique is made
possible through the use of a BiCMOS process which allows the
use of low-offset and low-noise amplifiers in combination with
high-density logic integration and sample-and-hold circuits.
The repeatability of switching with a magnetic field is slightly
affected using a chopper technique. The Allegro high frequency
chopping approach minimizes the affect of jitter and makes it
imperceptible in most applications. Applications that may notice
the degradation are those that require the precise sensing of alternating magnetic fields such as ring magnet speed sensing. For
those applications, Allegro recommends the “low jitter” family
of digital devices.
Regulator
Hall Element
Amp
Sample and
Hold
Clock/Logic
Low-Pass
Filter
Figure 2. Chopper stabilization circuit (dynamic quadrature offset cancellation)
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115 Northeast Cutoff
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7
A1184
Standard Two-Wire Field-Programmable
Chopper-Stabilized Unipolar Hall Effect Switch
Application Information
For additional general application information, visit the Allegro
MicroSystems Web site at www. allegromicro.com.
Typical Application Circuit
The A118x family of devices must be protected by an external
bypass capacitor, CBYP, connected between the supply, VCC,
and the ground, GND, of the device. CBYP reduces both external
noise and the noise generated by the chopper-stabilization function. As shown in figure 3, a 0.01 μF capacitor is typical.
V+
VCC
A118x
Installation of CBYP must ensure that the traces that connect it to
the A118x pins are no greater than 5 mm in length.
All high-frequency interferences conducted along the supply
lines are passed directly to the load through CBYP, and it serves
only to protect the A118x internal circuitry. As a result, the load
ECU (electronic control unit) must have sufficient protection,
other than CBYP, installed in parallel with the A118x.
A series resistor on the supply side, RS (not shown), in combination with CBYP, creates a filter for EMI pulses. (Additional
information on EMC is provided on the Allegro MicroSystems
Web site.)
When determining the minimum VCC requirement of the A118x
device, the voltage drops across RS and the ECU sense resistor,
RSENSE, must be taken into consideration. The typical value for
RSENSE is approximately 100 Ω.
B
GND
CBYP
0.01 uF
GND
B
A
A
Package UA Only
B
Maximum separation 5 mm
RSENSE
ECU
Figure 3. Typical application circuit
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115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
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8
Standard Two-Wire Field-Programmable
Chopper-Stabilized Unipolar Hall Effect Switch
A1184
Power Derating
The device must be operated below the maximum junction
temperature of the device, TJ(max). Under certain combinations of
peak conditions, reliable operation may require derating supplied power or improving the heat dissipation properties of the
application. This section presents a procedure for correlating
factors affecting operating TJ. (Thermal data is also available on
the Allegro MicroSystems Web site.)
The Package Thermal Resistance, RJA, is a figure of merit summarizing the ability of the application and the device to dissipate
heat from the junction (die), through all paths to the ambient air.
Its primary component is the Effective Thermal Conductivity,
K, of the printed circuit board, including adjacent devices and
traces. Radiation from the die through the device case, RJC, is
relatively small component of RJA. Ambient air temperature,
TA, and air motion are significant external factors, damped by
overmolding.
The effect of varying power levels (Power Dissipation, PD), can
be estimated. The following formulas represent the fundamental
relationships used to estimate TJ, at PD.
PD = VIN × IIN
(1)
T = PD × RJA (2)
TJ = TA + ΔT
Example: Reliability for VCC at TA = 150°C, package UA, using
minimum-K PCB.
Observe the worst-case ratings for the device, specifically:
RJA = 165°C/W, TJ(max) = 165°C, VCC(max) = 24 V, and
ICC(max) = 17 mA.
Calculate the maximum allowable power level, PD(max). First,
invert equation 3:
Tmax = TJ(max) – TA = 165 °C – 150 °C = 15 °C
This provides the allowable increase to TJ resulting from internal
power dissipation. Then, invert equation 2:
PD(max) = Tmax ÷ RJA = 15°C ÷ 165 °C/W = 91 mW
Finally, invert equation 1 with respect to voltage:
VCC(est) = PD(max) ÷ ICC(max) = 91 mW ÷ 17 mA = 5 V
The result indicates that, at TA, the application and device can
dissipate adequate amounts of heat at voltages ≤VCC(est).
Compare VCC(est) to VCC(max). If VCC(est) ≤ VCC(max), then reliable operation between VCC(est) and VCC(max) requires enhanced
RJA. If VCC(est) ≥ VCC(max), then operation between VCC(est) and
VCC(max) is reliable under these conditions.
(3)
For example, given common conditions such as: TA= 25°C,
VCC = 12 V, ICC = 4 mA, and RJA = 140 °C/W, then:
PD = VCC × ICC = 12 V × 4 mA = 48 mW
T = PD × RJA = 48 mW × 140 °C/W = 7°C
TJ = TA + T = 25°C + 7°C = 32°C
A worst-case estimate, PD(max), represents the maximum allowable power level (VCC(max), ICC(max)), without exceeding TJ(max),
at a selected RJA and TA.
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115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
9
Standard Two-Wire Field-Programmable
Chopper-Stabilized Unipolar Hall Effect Switch
A1184
Programming Protocol
V+
The operate switchpoint, BOP , can be field-programmed. To do
so, a coded series of voltage pulses through the VCC pin is used
to set bitfields in onboard registers. The effect on the device
output can be monitored, and the registers can be cleared and
set repeatedly until the required BOP is achieved. To make the
setting permanent, bitfield-level solid state fuses are blown, and
finally, a device-level fuse is blown, blocking any further coding. It is not necessary to program the release switchpoint, BRP ,
because the difference between BOP and BRP , referred to as the
hysteresis, BHYS , is fixed.
The range of values between BOP(min) and BOP(max) is scaled to
31 increments. The actual change in magnetic flux (G) represented by each increment is indicated by BRES (see the Operating
Characteristics table; however, testing is the only method for
verifying the resulting BOP). For programming, the 31 increments are individually identified using 5 data bits, which are
physically represented by 5 bitfields in the onboard registers.
By setting these bitfields, the corresponding calibration value is
programmed into the device.
Three voltage levels are used in programming the device: a low
voltage, VPL , a minimum required to sustain register settings; a
mid-level voltage, VPM , used to increment the address counter
in the device; and a high voltage, VPH , used to separate sets of
VPM pulses (when short in duration) and to blow fuses (when
long in duration). A fourth voltage level, essentially 0 V, is used
to clear the registers between pulse sequences. The pulse values
are shown in the Programming Protocol Characteristics table and
in figure 4.
VPH
VPM
VPL
Td(P)
0
Td(0)
Td(1)
t
Figure 4. Pulse amplitudes and durations
Additional information on device programming and programming products is available on www. allegromicro.com. Programming hardware is available for purchase, and programming
software is available free of charge.
Code Programming. Each bitfield must be individually set. To
do so, a pulse sequence must be transmitted for each bitfield that
is being set to 1. If more than one bitfield is being set to 1, all
pulse sequences must be sent, one after the other, without allowing VCC to fall to zero (which clears the registers).
The same pulse sequence is used to provisionally set bitfields as
is used to permanently set bitfield-level fuses. The only difference is that when provisionally setting bitfields, no fuse-blowing
pulse is sent at the end of the pulse sequence.
PROGRAMMING PROTOCOL CHARACTERISTICS, over operating temperature range, unless otherwise noted
Characteristic
Symbol
Min.
Typ.
Max.
Units
4.5
5.0
5.5
V
VPM
11.5
12.5
13.5
V
VPH
25.0
26.0
27.0
V
VPL
Programming Voltage1
Programming Current2
Pulse Width
Test Conditions
Minimum voltage range during programming
IPP
tr = 11 μs; 5 V → 26 V; CBYP = 0.1 μF
-
190
-
mA
td(0)
OFF time between programming bits
20
-
-
μs
td(1)
Pulse duration for enable and addressing
sequences
20
-
-
μs
td(P)
Pulse duration for fuse blowing
100
300
-
μs
Pulse Rise Time
tr
VPL to VPM; VPL to VPH
5
-
20
μs
Pulse Fall Time
tf
VPM to VPL; VPH to VPL
5
-
100
μs
1Programming voltages are measured at the VCC pin.
2A bypass capacitor with a minimum capacitance of 0.1
provide the current necessary to blow the fuse.
μF must be connected from VCC to the GND pin of the A118x device in order to
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115 Northeast Cutoff
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10
Standard Two-Wire Field-Programmable
Chopper-Stabilized Unipolar Hall Effect Switch
A1184
The pulse sequences consist of the following groups of pulses:
1. An enable sequence.
2. A bitfield address sequence.
3. When permanently setting the bitfield, a long VPH fuse-blowing pulse. (Note: Blown bit fuses cannot be reset.)
4. When permanently setting the bitfield, the level of VCC must
be allowed to drop to zero between each pulse sequence, in
order to clear all registers. However, when provisionally setting bitfields, VCC must be maintained at VPL between pulse
sequences, in order to maintain the prior bitfield settings while
preparing to set additional bitfields.
Bitfields that are not set are evaluated as zeros. The bitfield-level
fuses for 0 value bitfields are never blown. This prevents inad-
vertently setting the bitfield to 1. Instead, blowing the devicelevel fuse protects the 0 bitfields from being accidentally set in
the future.
When provisionally trying the calibration value, one pulse
sequence is used, using decimal values. The sequence for setting
the value 510 is shown in figure 5.
When permanently setting values, the bitfields must be set individually, and 510 must be programmed as binary 101. Bit 3 is
set to 1 (0001002, which is 410), then bit 1 is set to 1 (0000012,
which is 110). Bit 2 is ignored, and so remains 0.Two pulse
sequences for permanently setting the calibration value 5 are
shown in figure 6. The final VPH pulse is maintained for a longer
period, enough to blow the corresponding bitfield-level fuse.
V+
VPH
VPM
VPL
0
Enable
Address
Try 510
Optional
Monitoring
Clear
t
Figure 5. Pulse sequence to provisionally try calibration value 5.
V+
VPH
VPM
VPL
Address
0
Enable
Address
Encode 001002 (410)
Blow
Enable
Blow
Encode 000012 (110)
Figure 6. Pulse sequence to permanently encode calibration value 5 (101 binary, or
bitfield address 3 and bitfield address 1).
t
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11
A1184
Standard Two-Wire Field-Programmable
Chopper-Stabilized Unipolar Hall Effect Switch
V+
Enabling Addressing Mode. The first segment of code is a
keying sequence used to enable the bitfield addressing mode. As
shown in figure 7, this segment consists of one short VPH pulse,
one VPM pulse, and one short VPH pulse, with no supply interruptions. This sequence is designed to prevent the device from
being programmed accidentally, such as by noise on the supply
line.
VPH
VPM
VPL
0
t
Figure 7. Addressing mode enable pulse sequence
V+
VPH
Address 1
Address 2
Address n ( ≤ 31)
Address Selection. After addressing mode is enabled, the
VPM
target bitfield address, is indicated by a series of VPM pulses, as
shown in figure 8.
VPL
0
t
Figure 8. Pulse sequence to select addresses
V+
Falling edge of final BOP address digit
VPH
Lock Bit Programming. After the desired BOP calibration value
is programmed, and all of the corresponding bitfield-level fuses
are blown, the device-level fuse should be blown. To do so, the
lock bit (bitfield address 32) should be encoded as 1 and have
its fuse blown. This is done in the same manner as permanently
setting the other bitfields, as shown in figure 9.
VPM
VPL
32 pulses
0
Enable
Address
Blow
Encode Lock Bit
Figure 9. Pulse sequence to encode lock bit
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
t
12
Standard Two-Wire Field-Programmable
Chopper-Stabilized Unipolar Hall Effect Switch
A1184
Package LH, 3-Pin (SOT-23W)
+0.12
2.98 –0.08
1.49 D
4°±4°
3
A
+0.020
0.180–0.053
0.96 D
+0.10
2.90 –0.20
+0.19
1.91 –0.06
2.40
0.70
D
0.25 MIN
1.00
2
1
0.55 REF
0.25 BSC
0.95
Seating Plane
Gauge Plane
B
PCB Layout Reference View
Branded Face
8X 10° REF
1.00 ±0.13
NNT
+0.10
0.05 –0.05
0.95 BSC
1
C
0.40 ±0.10
N = Last two digits of device part number
T = Temperature code
For Reference Only; not for tooling use (reference dwg. 802840)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A
Active Area Depth, 0.28 mm REF
B
Reference land pattern layout
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances
C
Branding scale and appearance at supplier discretion
D
Hall element, not to scale
Standard Branding Reference View
Pin-out Drawings
Package LH, 3-pin SOT
Package UA, 3-pin SIP
3
1. VCC
2. No connection
3. GND
1. VCC
2. GND
3. GND
NC
1
2
1
2
3
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
13
Standard Two-Wire Field-Programmable
Chopper-Stabilized Unipolar Hall Effect Switch
A1184
Package UA, 3-Pin SIP
+0.08
4.09 –0.05
45°
B
C
E
2.04
1.52 ±0.05
1.44 E
Mold Ejector
Pin Indent
+0.08
3.02 –0.05
E
Branded
Face
45°
1
2.16
MAX
D Standard Branding Reference View
= Supplier emblem
N = Last two digits of device part number
T = Temperature code
0.79 REF
A
0.51
REF
NNT
1
2
3
+0.03
0.41 –0.06
15.75 ±0.51
For Reference Only; not for tooling use (reference DWG-9049)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A
Dambar removal protrusion (6X)
B Gate burr area
C Active Area Depth, 0.50 mm REF
+0.05
0.43 –0.07
D
Branding scale and appearance at supplier discretion
E
Hall element, not to scale
1.27 NOM
Copyright ©2004-2008, Allegro MicroSystems, Inc.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the
information being relied upon is current.
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use;
nor for any infringement of patents or other rights of third parties which may result from its use.
For the latest version of this document, visit our website:
www.allegromicro.com
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
14
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