A1220, A1221, and A1222
Chopper Stabilized Precision Hall Effect Latches
Features and Benefits
▪ ▪ ▪ ▪ ▪ ▪ ▪ ▪ Symmetrical latch switchpoints Resistant to physical stress Superior temperature stability Output short-circuit protection Operation from unregulated supply down to 3 V Reverse battery protection Solid-state reliability Small package sizes
Description
The A1220, A1221, and A1222 Hall-effect sensor ICs are extremely temperature-stable and stress-resistant devices especially suited for operation over extended temperature ranges to 150°C. Superior high-temperature performance is made possible through dynamic offset cancellation, which reduces the residual offset voltage normally caused by device overmolding, temperature dependencies, and thermal stress. Each device includes on a single silicon chip a voltage regulator, Hall-voltage generator, small-signal amplifier, chopper stabilization, Schmitt trigger, and a short-circuit protected open-collector output to sink up to 25 mA. A south pole of sufficient strength turns the output on. A north pole of sufficient strength is necessary to turn the output off. An onboard regulator permits operation with supply voltages of 3 to 24 V. The advantage of operating down to 3 V is that the device can be used in 3-V applications or with additional external resistance in series with the supply pin for greater protection against high voltage transient events.
Packages:
3-pin SOT23W (suffix LH)
3-pin SIP (suffix UA)
Two package styles provide magnetically optimized packages for most applications. Package type LH is a modified 3-pin SOT23W surface mount package while UA is a three-pin ultramini SIP for through hole mounting. Both packages are lead (Pb) free, with 100% matte tin plated leadframes.
Not to scale
Functional Block Diagram
VCC
Regulator To All Subcircuits
Amp
Sample and Hold
Dynamic Offset Cancellation
Low-Pass Filter
VOUT
Control
Current Limit
GND
A1220-DS, Rev. 8
A1220, A1221 and A1222
Selection Guide
Part Number A1220ELHLX-T A1220ELHLT-T2 A1220EUA-T A1220LLHLX-T A1220LLHLT-T2 A1220LUA-T A1221ELHLX-T A1221ELHLT-T2 A1221EUA-T A1221LLHLX-T A1221LLHLT-T2 A1221LUA-T A1222ELHLT-T A1222ELHLX-T2 A1222LLHLT-T A1222LLHLX-T2 A1222LUA-T
1Contact Allegro 2Available
Chopper Stabilized Precision Hall Effect Latches
Packing1 Mounting 3-pin SOT23W surface mount 3-pin SOT23W surface mount 3-pin SIP through hole 3-pin SOT23W surface mount 3-pin SOT23W surface mount 3-pin SIP through hole 3-pin SOT23W surface mount 3-pin SOT23W surface mount 3-pin SIP through hole 3-pin SOT23W surface mount 3-pin SOT23W surface mount 3-pin SIP through hole 3-pin SOT23W surface mount 3-pin SOT23W surface mount 3-pin SOT23W surface mount 3-pin SOT23W surface mount 3-pin SIP through hole –40ºC to 150ºC –40ºC to 85ºC –150 150 –40ºC to 150ºC –40ºC to 85ºC –90 90 –40ºC to 150ºC –40ºC to 85ºC –40 40 Ambient, TA BRP (Min) BOP (Max)
13-in. reel, 10000 pieces/reel 7-in. reel, 3000 pieces/reel Bulk, 500 pieces/bag 13-in. reel, 10000 pieces/reel 7-in. reel, 3000 pieces/reel Bulk, 500 pieces/bag 13-in. reel, 10000 pieces/reel 7-in. reel, 3000 pieces/reel Bulk, 500 pieces/bag 13-in. reel, 10000 pieces/reel 7-in. reel, 3000 pieces/reel Bulk, 500 pieces/bag 7-in. reel, 3000 pieces/reel 13-in. reel, 10000 pieces/reel 7-in. reel, 3000 pieces/reel 13-in. reel, 10000 pieces/reel Bulk, 500 pieces/bag
for additional packing options. through authorized Allegro distributors only.
Absolute Maximum Ratings
Characteristic Forward Supply Voltage Reverse Supply Voltage Output Off Voltage Continuous Output Current Reverse Output Current Operating Ambient Temperature Maximum Junction Temperature Storage Temperature
GND
Symbol VCC VRCC VOUT IOUT IROUT TA TJ(max) Tstg Range E Range L
Notes
Rating 26.5 –30 26 25 –50 –40 to 85 –40 to 150 165 –65 to 170
Units V V V mA mA ºC ºC ºC ºC
Pin-out Diagrams
Package UA
3
Package LH
1 VCC
2 VOUT
1 VCC
2 GND
3 VOUT
Terminal List Name VCC VOUT GND
Description Connects power supply to chip Output from circuit Ground
Number Package LH Package UA 1 1 2 3 3 2
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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A1220, A1221 and A1222
Chopper Stabilized Precision Hall Effect Latches
ELECTRICAL CHARACTERISTICS Valid valid over full operating voltage and ambient temperature ranges; unless otherwise noted
Characteristics
Electrical Characteristics Forward Supply Voltage Output Leakage Current Output Saturation Voltage Output Current Limit Power-On Time3 Chopping Frequency Output Rise Time3,4 Output Fall Time3,4 Supply Current Reverse Supply Current Supply Zener Clamp Voltage Zener Impedance Magnetic Characteristics A1220 Operate Point BOP A1221 A1222 A1220 Release Point BRP A1221 A1222 A1220 Hysteresis
1Typical
Symbol
VCC IOUTOFF VOUT(SAT) IOM tPO fC tr tf ICC(ON) ICC(OFF) IRCC VZ IZ
Test Conditions
Operating, TJ < 165°C VOUT = 24 V, B < BRP IOUT = 20 mA, B > BOP B > BOP VCC > 3.0 V, B < BRP(min) – 10 G, B > BOP(max) + 10 G RL = 820 Ω, CL = 20 pF RL = 820 Ω, CL = 20 pF B > BOP, VCC = 12 V B < BRP, VCC = 12 V VRCC = –30 V ICC = 5 mA; TA = 25°C ICC = 5 mA; TA = 25°C
Min.
3 – – 30 – – – – – – – 28 – 5 15 70 –40 –90 –150 10 30 140
Typ.1
– – 185 – – 800 0.2 0.1 – – – – 50 22 50 110 –23 –50 –110 45 100 220
Max.
24 10 500 60 25 – 2 2 4 4 –5 – – 40 90 150 –5 –15 –70 80 180 300
Unit2
V μA mV mA μs kHz μs μs mA mA mA V Ω G G G G G G G G G
BHYS
A1221 A1222
(BOP – BRP)
data are are at TA = 25°C and VCC = 12 V, and are for initial design estimations only. 21 G (gauss) = 0.1 mT (millitesla). 3Guaranteed by device design and characterization. 4C = oscilloscope probe capacitance. L
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
3
A1220, A1221 and A1222
Chopper Stabilized Precision Hall Effect Latches
THERMAL CHARACTERISTICS may require derating at maximum conditions, see application information
Characteristic Symbol Test Conditions Package LH, 1-layer PCB with copper limited to solder pads Package Thermal Resistance RθJA Package LH, 2-layer PCB with 0.463 in.2 of copper area each side connected by thermal vias Package UA, 1-layer PCB with copper limited to solder pads Value Units 228 110 165 ºC/W ºC/W ºC/W
25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 20 40
Power Derating Curve TJ(max) = 165ºC; ICC = ICC(max)
VCC(max)
Maximum Allowable VCC (V)
Package LH, 2-layer PCB (R JA = 110 ºC/W) Package UA, 1-layer PCB (R JA = 165 ºC/W) Package LH, 1-layer PCB (R JA = 228 ºC/W) VCC(min)
60 80 100 120 140 160 180
Power Dissipation versus Ambient Temperature
1900 1800 1700 1600 1500 1400 1300 1200 1100 1000 900 800 700 600 500 400 300 200 100 0 20
Power Dissipation, PD (mW)
Pa (R cka ge JA = 1 LH 10 , 2Pac ºC lay /W er (R kage PC ) UA JA = B , 1165 ºC/ layer W) PC B
Pac k (R age LH ,1 JA = 2 28 º -layer PCB C/W )
40
60
80 100 120 Temperature (°C)
140
160
180
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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A1220, A1221 and A1222
Chopper Stabilized Precision Hall Effect Latches
Characteristic Performance
A1220, A1221, and A1222 Electrical Characteristics
Average Supply Current (On) versus Temperature
6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 0 20 40 60 80 100 120 140 160 TA (°C)
Average Supply Current (On) versus Supply Voltage
6.0 5.5 5.0
ICC(AV) (mA)
Icc(AV)(mA)
3.0V 3.8V 4.2V 12V 24V
4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 2 6 10 14 VCC (V) 18 22 26
150°C 25°C -40°C
Average Supply Current (Off) versus Temperature
6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 0 20 40 60 80 100 120 140 160 TA (°C)
Average Supply Current (Off) versus Supply Voltage
6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 2 6 10 14 VCC (V) 18 22 26
ICC(AV) (mA)
3.0V 3.8V 4.2V 12V 24V
Icc(AV)(mA)
150°C 25°C -40°C
Saturation Voltage versus Temperature
300 250
VOUT(SAT) (mV)
300 250
Saturation Voltage versus Supply Voltage
200 150 100 50 0 -60 -40 -20 0 20 40 60 80 100 120 140 160 TA (°C)
2.6V 3.0V 3.8V 4.2V 12V 24V
VOUT(SAT) (mV)
200 150 100 50 0 0 2 4 6 8 10 12 14 16 18 20 22 24 26 VCC (V)
150°C 25°C -40°C
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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A1220, A1221 and A1222
Chopper Stabilized Precision Hall Effect Latches
A1220 Magnetic Characteristics
Operate Point versus Temperature
40 35 30 (V) 3.0 3.8 4.2 12 24 40 35 30
Operate Point versus Supply Voltage
BOP (G)
BOP (G)
25 20 15 10 5 0 -60 -40 -20 0 20 40 60 80 100 120 140 160 TA (°C)
25 20 15 10 5 0 2 6 10 14 VCC (V) 18 22 26
(°C) -40 25 150
Release Point versus Temperature
0 -5 -10 -15 (V) 3.0 3.8 4.2 12 24 0 -5 -10 -15
Release Point versus Supply Voltage
-20 -25 -30 -35 -40 -60 -40 -20 0 20 40 60 TA (°C) 80 100 120 140 160
-20 -25 -30 -35 -40 2 6 10 14 VCC (V) 18 22 26
(°C) -40 25 150
BRP (G)
Switchpoint Hysteresis versus Temperature
80 75 70 65 60 55 50 45 40 35 30 25 20 15 10 5 0 -60 -40 -20 0 20 40 60 80 100 120 140 160 TA (°C)
80 75 70 65 60 55 50 45 40 35 30 25 20 15 10 5 0 2
BRP (G)
Switchpoint Hysteresis versus Supply Voltage
(V) 3.0 3.8 4.2 12 24
BHYS (G)
BHYS (G)
(°C) -40 25 150
6
10
14 VCC (V)
18
22
26
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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A1220, A1221 and A1222
Chopper Stabilized Precision Hall Effect Latches
A1221 Magnetic Characteristics
Operate Point versus Temperature
90 80 70 60 50 40 30 20 10 0 -60 -40 -20 0 20 40 60 80 100 120 140 160 TA (°C) (V) 2.6 12 24 90 80 70 60 50 40 30 20 10 0 2
Operate Point versus Supply Voltage
(°C) -40 25 150
BOP (G)
BOP (G)
6
10
14 VCC (V)
18
22
26
Release Point versus Temperature
0 -10 -20 -30 (V) 2.6 12 24 0 -10 -20 -30
Release Point versus Supply Voltage
-40 -50 -60 -70 -80 -90 -60 -40 -20 0 20 40 60 TA (°C) 80 100 120 140 160
-40 -50 -60 -70 -80 -90 2 6 10 14 VCC (V) 18 22 26
(°C) -40 25 150
BRP (G)
Switchpoint Hysteresis versus Temperature
180 170 160 150 140 130 120 110 100 90 80 70 60 50 40 30 -60 -40 -20 0 20 40 60 80 100 120 140 160 TA (°C) 180 170 160 150 140 130 120 110 100 90 80 70 60 50 40 30
2
BRP (G)
Switchpoint Hysteresis versus Supply Voltage
(V) 2.6 12 24
(°C) -40 25 150
BHYS (G)
BHYS (G)
6
10
14 VCC (V)
18
22
26
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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A1220, A1221 and A1222
Chopper Stabilized Precision Hall Effect Latches
A1222 Magnetic Characteristics
Operate Point versus Temperature
150 140 130 120 180 170 160 150 140
Operate Point versus Supply Voltage
BOP (G)
BOP (G)
110 100 90 80 70 -60
(V) 2.6 24
130 120 110 100 90 80 70
(°C) -40 25 150
-40
-20
0
20
40
60
80
100 120 140 160
2
6
10
14 VCC (V)
18
22
26
TA (°C)
Release Point versus Temperature
-70 -80 -90 -70 -80 -90 -100 (V) 2.6 24 -110 -120 -130 -140 -150 -160 -140 -150 -60 -40 -20 0 20 40 60 TA (°C) 80 100 120 140 160 -170 -180 2
Release Point versus Supply Voltage
BRP (G)
-110 -120 -130
BRP (G)
-100
(°C) -40 25 150
6
10
14 VCC (V)
18
22
26
Switchpoint Hysteresis versus Temperature
300 280 260 300 280 260 (V) 2.6 24
BHYS (G)
Switchpoint Hysteresis versus Supply Voltage
BHYS (G)
240 220 200 180 160 140 -60
240 220 200 180 160 140
(°C) -40 25 150
-40
-20
0
20
40
60
80
100 120 140 160
2
6
10
14 VCC (V)
18
22
26
TA (°C)
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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A1220, A1221 and A1222
Chopper Stabilized Precision Hall Effect Latches
Functional Description
Operation The output of these devices switches low (turns on) when a magnetic field perpendicular to the Hall element exceeds the operate point threshold, BOP (see panel A of figure 1). After turn-on, the output voltage is VOUT(SAT) . The output transistor is capable of sinking current up to the short circuit current limit, IOM, which is a minimum of 30 mA. When the magnetic field is reduced below the release point, BRP , the device output goes high (turns off). The difference in the magnetic operate and release points is the hysteresis, BHYS , of the device. This built-in hysteresis allows clean switching of the output even in the presence of external mechanical vibration and electrical noise. Removal of the magnetic field will leave the device output latched on if the last crossed switchpoint is BOP, or latched off if the last crossed switch point is BRP. Powering-on the device in the hysteresis range (less than BOP and higher than BRP) will give an indeterminate output state. The correct state is attained after the first excursion beyond BOP or BRP . Applications It is strongly recommended that an external bypass capacitor be connected (in close proximity to the Hall element) between the supply and ground of the device to reduce both external noise and noise generated by the chopper stabilization technique. As is shown in panel B of figure 1, a 0.1 μF capacitor is typical. Extensive applications information for Hall effect devices is available in: • Hall-Effect IC Applications Guide, Application Note 27701 • Guidelines for Designing Subassemblies Using Hall-Effect Devices, Application Note 27703.1 • Soldering Methods for Allegro’s Products – SMT and ThroughHole, Application Note 26009 All are provided in Allegro Electronic Data Book, AMS-702, and the Allegro Web site, www.allegromicro.com.
V+ Switch to High Switch to Low
VS
VCC
VCC CBYP 0.1 μF A122x VOUT
RL
VOUT
Output
VOUT(SAT) 0 BRP B– 0 B+ BOP
GND
BHYS
(A)
(B)
Figure 1. Switching behavior of latches. In panel A, on the horizontal axis, the B+ direction indicates increasing south polarity magnetic field strength, and the B– direction indicates decreasing south polarity field strength (including the case of increasing north polarity). This behavior can be exhibited when using a circuit such as that shown in panel B.
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
9
A1220, A1221 and A1222
Chopper Stabilized Precision Hall Effect Latches
Chopper Stabilization Technique When using Hall effect technology, a limiting factor for switchpoint accuracy is the small signal voltage developed across the Hall element. This voltage is disproportionally small relative to the offset that can be produced at the output of the Hall element. This makes it difficult to process the signal while maintaining an accurate, reliable output over the specified operating temperature and voltage ranges. Chopper stabilization is a unique approach used to minimize Hall offset on the chip. The patented Allegro technique, namely Dynamic Quadrature Offset Cancellation, removes key sources of the output drift induced by thermal and mechanical stresses. This offset reduction technique is based on a signal modulationdemodulation process. The undesired offset signal is separated from the magnetic field-induced signal in the frequency domain, through modulation. The subsequent demodulation acts as a modulation process for the offset, causing the magnetic field induced signal to recover its original spectrum at baseband, while the dc offset becomes a high-frequency signal. The magnetic sourced signal then can pass through a low-pass filter, while the modulated DC offset is suppressed. This configuration is illustrated in figure 2.
The chopper stabilization technique uses a 400 kHz high frequency clock. For demodulation process, a sample and hold technique is used, where the sampling is performed at twice the chopper frequency (800 kHz). This high-frequency operation allows a greater sampling rate, which results in higher accuracy and faster signal-processing capability. This approach desensitizes the chip to the effects of thermal and mechanical stresses, and produces devices that have extremely stable quiescent Hall output voltages and precise recoverability after temperature cycling. This technique is made possible through the use of a BiCMOS process, which allows the use of low-offset, low-noise amplifiers in combination with high-density logic integration and sample-and-hold circuits. The repeatability of magnetic field-induced switching is affected slightly by a chopper technique. However, the Allegro high frequency chopping approach minimizes the affect of jitter and makes it imperceptible in most applications. Applications that are more likely to be sensitive to such degradation are those requiring precise sensing of alternating magnetic fields; for example, speed sensing of ring-magnet targets. For such applications, Allegro recommends its digital device families with lower sensitivity to jitter. For more information on those devices, contact your Allegro sales representative.
Regulator
Clock/Logic Hall Element Amp Low-Pass Filter
Figure 2. Model of chopper stabilization technique
Sample and Hold
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
10
A1220, A1221 and A1222
Chopper Stabilized Precision Hall Effect Latches
Power Derating The device must be operated below the maximum junction temperature of the device, TJ(max). Under certain combinations of peak conditions, reliable operation may require derating supplied power or improving the heat dissipation properties of the application. This section presents a procedure for correlating factors affecting operating TJ. (Thermal data is also available on the Allegro MicroSystems website.) The Package Thermal Resistance, RJA, is a figure of merit summarizing the ability of the application and the device to dissipate heat from the junction (die), through all paths to the ambient air. Its primary component is the Effective Thermal Conductivity, K, of the printed circuit board, including adjacent devices and traces. Radiation from the die through the device case, RJC, is relatively small component of RJA. Ambient air temperature, TA, and air motion are significant external factors, damped by overmolding. The effect of varying power levels (Power Dissipation, PD), can be estimated. The following formulas represent the fundamental relationships used to estimate TJ, at PD. PD = VIN × IIN T = PD × RJA TJ = TA + ΔT (1) (2) (3)
A worst-case estimate, PD(max), represents the maximum allowable power level (VCC(max), ICC(max)), without exceeding TJ(max), at a selected RJA and TA. Example: Reliability for VCC at TA = 150°C, package LH, using a minimum-K PCB. Observe the worst-case ratings for the device, specifically: RJA = 228°C/W, TJ(max) = 165°C, VCC(max) = 24 V, and ICC(max) = 4 mA. Calculate the maximum allowable power level, PD(max). First, invert equation 3: Tmax = TJ(max) – TA = 165 °C – 150 °C = 15 °C This provides the allowable increase to TJ resulting from internal power dissipation. Then, invert equation 2: PD(max) = Tmax ÷ RJA = 15°C ÷ 228 °C/W = 66 mW Finally, invert equation 1 with respect to voltage: VCC(est) = PD(max) ÷ ICC(max) = 66 mW ÷ 4 mA = 16.4 V The result indicates that, at TA, the application and device can dissipate adequate amounts of heat at voltages ≤VCC(est). Compare VCC(est) to VCC(max). If VCC(est) ≤ VCC(max), then reliable operation between VCC(est) and VCC(max) requires enhanced RJA. If VCC(est) ≥ VCC(max), then operation between VCC(est) and VCC(max) is reliable under these conditions.
For example, given common conditions such as: TA= 25°C, VCC = 12 V, ICC = 1.6 mA, and RJA = 165 °C/W, then: PD = VCC × ICC = 12 V × 1.6 mA = 19 mW T = PD × RJA = 19 mW × 165 °C/W = 3°C TJ = TA + T = 25°C + 3°C = 28°C
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
11
A1220, A1221 and A1222
Chopper Stabilized Precision Hall Effect Latches
Package LH, 3-Pin (SOT-23W)
+0.12 2.98 –0.08 1.49 D 3
A
+4° 4° –0° +0.020 0.180–0.053
0.96 D +0.10 2.90 –0.20
D
+0.19 1.91 –0.06 0.25 MIN 1.00 1 2 0.55 REF 0.25 BSC Seating Plane Gauge Plane 8X 10° REF Branded Face
2.40 0.70
0.95
B
PCB Layout Reference View
1.00 ±0.13
NNT
+0.10 0.05 –0.05 0.95 BSC 0.40 ±0.10
1
C
Standard Branding Reference View N = Last two digits of device part number T = Temperature code
For Reference Only; not for tooling use (reference dwg. 802840) Dimensions in millimeters Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown
A B
Active Area Depth, 0.28 mm REF Reference land pattern layout All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and PCB layout tolerances Branding scale and appearance at supplier discretion Hall element, not to scale
C D
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
12
A1220, A1221 and A1222
Chopper Stabilized Precision Hall Effect Latches
Package UA, 3-Pin SIP
+0.08 4.09 –0.05
45°
E
B C 1.52 ±0.05 1.44 E Mold Ejector Pin Indent Branded Face 45° 1 D Standard Branding Reference View 0.79 REF A = Supplier emblem N = Last two digits of device part number T = Temperature code 2.04
+0.08 3.02 –0.05
E
NNT
2.16 MAX
0.51 REF
1
2
3 For Reference Only; not for tooling use (reference DWG-9049) Dimensions in millimeters Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown
15.75 ±0.51
+0.03 0.41 –0.06
A
Dambar removal protrusion (6X)
B Gate burr area C Active Area Depth, 0.50 mm REF D E Branding scale and appearance at supplier discretion Hall element, not to scale
+0.05 0.43 –0.07
1.27 NOM
Copyright ©2009, Allegro MicroSystems, Inc. The products described herein are manufactured under one or more of the following U.S. patents: 5,517,112; 5,619,137; 5,621,319; 7,425,821 and/ or other patents pending. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the failure of that life support device or system, or to affect the safety or effectiveness of that device or system. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use. For the latest version of this document, visit our website: www.allegromicro.com
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