A1308 and A1309
Linear Hall-Effect Sensor ICs with Analog Output
Available in a Miniature, Low-Profile Surface-Mount Package
FEATURES AND BENEFITS
• 5 V supply operation
• QVO temperature coefficient programmed at Allegro™ for
improved accuracy
• Miniature package options
• High-bandwidth, low-noise analog output
• High-speed chopping scheme minimizes QVO drift across
operating temperature range
• Temperature-stable quiescent voltage output and sensitivity
• Precise recoverability after temperature cycling
• Output voltage clamps provide short-circuit diagnostic
capabilities
• Undervoltage lockout (UVLO)
• Wide ambient temperature range: –40°C to 150°C (SOT-23W
and SIP -L temp range), –40°C to 125°C (SIP -K temp range)
• Immune to mechanical stress
• Enhanced EMC performance for stringent automotive
applications
PACKAGES:
3-pin ultramini SIP
1.5 mm × 4 mm × 3 mm
(suffix UA)
3-pin SOT-23W
2 mm × 3 mm × 1 mm
(suffix LH)
DESCRIPTION
New applications for linear output Hall-effect sensors, such
as displacement and angular position, require higher accuracy
and smaller package sizes. The Allegro A1308 and A1309
linear Hall-effect sensor ICs have been designed specifically
to meet both requirements. These temperature-stable devices
are available in both surface-mount and through-hole packages.
The accuracy of each device is enhanced via end-of-line
optimization. Each device features nonvolatile memory to
optimize device sensitivity and the quiescent voltage output
(QVO: output in the absence of a magnetic field) for a given
application or circuit. This A1308 and A1309 optimized
performance is sustained across the full operating temperature
range by programming the temperature coefficient for both
sensitivity and QVO at Allegro end-of-line test.
These ratiometric Hall-effect sensor ICs provide a voltage
output that is proportional to the applied magnetic field. The
quiescent voltage output is adjusted around 50% of the supply
voltage.
The features of these linear devices make them ideal for use in
automotive and industrial applications requiring high accuracy,
and they operate across an extended temperature range,
–40°C to 150°C (SOT-23W and SIP -L temperature range) or
–40°C to 125°C (SIP -K temperature range).
Each BiCMOS monolithic circuit integrates a Hall element,
temperature-compensating circuitry to reduce the intrinsic
Continued on the next page…
Not to scale
Functional Block Diagram
V+
CBYPASS
Tuned Filter
Dynamic Offset
Cancellation
VCC
Sensitivity and
Sensitivity TC
VOUT
Offset and
Offset TC
GND
A1308-9-DS, Rev. 9
MCO-0000134
November 14, 2018
A1308 and
A1309
Linear Hall-Effect Sensor ICs with Analog Output
Available in a Miniature, Low-Profile Surface-Mount Package
DESCRIPTION (continued)
sensitivity drift of the Hall element, a small-signal high-gain amplifier,
a clamped low-impedance output stage, and a proprietary dynamic
offset cancellation technique.
The A1308 and A1309 sensor ICs are offered in two package styles.
The LH is a SOT-23W style, miniature, low-profile package for
surface-mount applications. The UA is a 3-pin, ultramini, single
inline package (SIP) for through-hole mounting. Both packages are
lead (Pb) free, with 100% matte-tin leadframe plating.
SELECTION GUIDE
Part Number
Output
Polarity
Sensitivity
(typ) (mV/G)
Operating Ambient
Temperature Range
(TA) (°C)
Packing [1]
A1308KUATN-1-T
Forward
1.3
–40 to 125
4,000 pieces per reel
3-pin SIP through hole
A1308KUATN-2-T
Forward
2.5
–40 to 125
4,000 pieces per reel
3-pin SIP through hole
A1308KUATN-3-T
Forward
3.125
–40 to 125
4,000 pieces per reel
3-pin SIP through hole
A1308KUATN-5-T
Forward
5
–40 to 125
4,000 pieces per reel
3-pin SIP through hole
Package
A1308LLHLX-05-T
Forward
0.5
–40 to 150
10,000 pieces per reel
3-pin SOT-23W surface mount
A1308LLHLX-1-T
Forward
1.3
–40 to 150
10,000 pieces per reel
3-pin SOT-23W surface mount
A1308LLHLX-2-T
Forward
2.5
–40 to 150
10,000 pieces per reel
3-pin SOT-23W surface mount
A1308LLHLX-3-T
Forward
3.125
–40 to 150
10,000 pieces per reel
3-pin SOT-23W surface mount
A1308LLHLX-5-T
Forward
5
–40 to 150
10,000 pieces per reel
3-pin SOT-23W surface mount
A1308LUA-9-T
Forward
9
-40 to 150
500 pieces per bag
3-pin SIP through hole
A1309KUATN-9-T
Forward
9
–40 to 125
4,000 pieces per reel
3-pin SIP through hole
A1309LLHLX-9-T
Forward
9
–40 to 150
10,000 pieces per reel
3-pin SOT-23W surface mount
A1309LLHLX-RP9-T
Reverse
–9
–40 to 150
10,000 pieces per reel
3-pin SOT-23W surface mount
A1309LUA-2-T
Forward
2.5
–40 to 150
500 pieces per bag
3-pin SIP through hole
[1] Contact Allegro
for additional packing options.
ABSOLUTE MAXIMUM RATINGS
Rating
Unit
Forward Supply Voltage
Characteristic
Symbol
VCC
Notes
8
V
V
Reverse Supply Voltage
VRCC
–0.1
Forward Output Voltage
VOUT
7
V
Reverse Output Voltage
VROUT
–0.1
V
Output Source Current
IOUT(SOURCE)
VOUT to GND
2
mA
IOUT(SINK)
VCC to VOUT
10
mA
Output Sink Current
Range K
–40 to 125
°C
Range L
–40 to 150
°C
TJ(max)
165
°C
Tstg
–65 to 170
°C
Operating Ambient Temperature
TA
Maximum Junction Temperature
Storage Temperature
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955 Perimeter Road
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2
A1308 and
A1309
Linear Hall-Effect Sensor ICs with Analog Output
Available in a Miniature, Low-Profile Surface-Mount Package
PINOUT DIAGRAMS AND TERMINAL LIST TABLE
LH Package
Pinout
UA Package
Pinout
3
1
2
1
2
Terminal List Table
Name
Number
Description
LH
UA
VCC
1
1
Input power supply; tie to GND
with bypass capacitor
VOUT
2
3
Output signal
GND
3
2
Ground
3
THERMAL CHARACTERISTICS: May require derating at maximum conditions; see application information
Characteristic
Symbol
Test Conditions
Package LH, 1-layer PCB with copper limited to solder pads
Package Thermal Resistance
RθJA
Package LH, 2-layer PCB with 0.463
connected by thermal vias
in.2
of copper area each side
Package UA, 1-layer PCB with copper limited to solder pads
Value
Units
228
°C/W
110
°C/W
165
°C/W
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955 Perimeter Road
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3
A1308 and
A1309
Linear Hall-Effect Sensor ICs with Analog Output
Available in a Miniature, Low-Profile Surface-Mount Package
OPERATING CHARACTERISTICS: Valid through TA , CBYPASS = 0.1 µF, VCC = 5 V, unless otherwise noted
Characteristics
Symbol
Test Conditions
Min.
Typ.
Max.
Unit [1]
ELECTRICAL CHARACTERISTICS
Supply Voltage
Undervoltage
VCC
4.5
5.0
5.5
V
VUVLOHI
K temp. option tested at TA = 25°C to 125°C
(device powers on); L temp. option tested at TA =
25°C to 150°C (device powers on)
–
–
3
V
VUVLOLO
K temp. option tested at TA = 25°C to 125°C
(device powers off); L temp. option tested at TA =
25°C to 150°C (device powers off)
2.5
–
–
V
Threshold [2]
Supply Current
ICC
No load on VOUT
–
9
11.5
mA
Power-On Time [3][4]
tPO
TA = 25°C, CL(PROBE) = 10 pF
–
50
–
µs
tVCC
TA = 25°C
0.005
–
100
ms
VCCOFF
TA = 25°C
0
–
0.55
V
µs
VCC Ramp
Time [3][4]
VCC Off Level [3][4]
Clamp [3][4]
Delay to
tCLP
TA = 25°C, CL = 10 nF
–
30
–
Supply Zener Clamp Voltage
VZ
TA = 25°C, ICC = 14.5 mA
6
7.3
–
V
Small signal –3 dB
–
20
–
kHz
TA = 25°C
–
400
–
kHz
VCC = 5 V, TA = 25°C, CBYPASS = open,
Sens ≥ 1.3 mV/G, no load on VOUT
–
1.7
–
G
VCC = 5 V, TA = 25°C, CBYPASS = open,
Sens = 0.5 mV/G, no load on VOUT
–
2.8
–
G
VCC = 5 V, TA = 25°C, CBYPASS = open,
Sens ≥ 1.3 mV/G, no load on VOUT
–
1.5
–
mG/√Hz
VCC = 5 V, TA = 25°C, CBYPASS = open,
Sens = 0.5 mV/G, no load on VOUT
–
2.5
–
mG/√Hz
–
3
–
Ω
Internal Bandwidth [3]
BWi
Chopping Frequency [3][5]
fC
OUTPUT CHARACTERISTICS
Output Referred
Noise [3][6]
Input Referred RMS Noise
VN
Density [3]
DC Output Resistance [3]
Output Load
Resistance [3]
Output Load Capacitance [3]
Output Voltage Clamp [7][8]
VNRMS
ROUT
RL
VOUT to GND
4.7
–
–
kΩ
CL
VOUT to GND
–
–
10
nF
VCLPHIGH
TA = 25°C, RL = 10 kΩ (VOUT to GND)
4.35
4.5
4.65
V
VCLPLOW
TA = 25°C, RL = 10 kΩ (VOUT to VCC)
0.40
0.55
0.70
V
A1308KUA-1-T
1.17
1.3
1.43
mV/G
A1308KUA-2-T
2.4
2.5
2.6
mV/G
A1308KUA-3-T
3.025
3.125
3.225
mV/G
A1308KUA-5-T
4.85
5
5.15
mV/G
A1308LLHLX-1-T
1.17
1.3
1.43
mV/G
A1308LLHLX-2-T
Sensitivity
Sens
2.4
2.5
2.6
mV/G
3.025
3.125
3.225
mV/G
A1308LLHLX-5-T
4.85
5
5.15
mV/G
A1308LUA-9-T
8.73
9
9.27
mV/G
A1309KUA-9-T
8.73
9
9.27
mV/G
A1309LLHLX-9-T
8.73
9
9.27
mV/G
A1309LLHLX-RP9-T
–9.27
–9
–8.73
mV/G
2.4
2.5
2.6
mV/G
A1308LLHLX-3-T
A1309LUA-2-T
TA = 25°C
Continued on the next page…
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955 Perimeter Road
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www.allegromicro.com
4
A1308 and
A1309
Linear Hall-Effect Sensor ICs with Analog Output
Available in a Miniature, Low-Profile Surface-Mount Package
OPERATING CHARACTERISTICS (continued): Valid through TA , CBYPASS = 0.1 µF, VCC = 5 V, unless otherwise noted
Characteristics
Symbol
Test Conditions
Min.
Typ.
Max.
Unit [1]
OUTPUT CHARACTERISTICS (continued)
Quiescent Voltage Output (QVO)
Sensitivity Temperature Coefficient
VOUT(Q)
TA = 25°C
2.488
2.5
2.512
V
TCSens
Programmed at TA = 125°C (K temp. option) or
150°C (L temp. option), calculated relative to
Sens at 25°C
0.08
0.12
0.16
%/°C
LinERR
–
±1.5
–
%
SymERR
–
±1.5
–
%
–
±1.5
–
%
ERROR COMPONENTS
Linearity Sensitivity Error
Symmetry Sensitivity Error
Ratiometry Quiescent Voltage
Output Error [9]
Ratiometry Sensitivity Error [9]
Ratiometry Clamp Error [10]
RatVOUT(Q) Across supply voltage range (relative to VCC = 5 V)
RatSens
Across supply voltage range (relative to VCC = 5 V)
–
±1.5
–
%
RatVOUTCLP
TA = 25°C, across supply voltage range (relative
to VCC = 5 V)
–
±1.5
–
%
A1308KUA-1-T
–15
0
15
mV
A1308KUA-2-T
–10
0
10
mV
–10
0
10
mV
–20
0
10
mV
DRIFT CHARACTERISTICS
A1308KUA-3-T
TA = 125°C
A1308KUA-5-T
Typical Quiescent Voltage Output Drift
Across Temperature Range
∆VOUT(Q)
A1309KUA-9-T
–20
0
10
mV
A1308LLHLX-05-T
–15
0
15
mV
A1308LLHLX-1-T
–15
0
15
mV
A1308LLHLX-2-T
–20
–
0
mV
A1308LLHLX-3-T
–20
–
0
mV
A1308LLHLX-5-T
Sensitivity Drift Due to
Package Hysteresis [11]
∆SensPKG
TA = 150°C
–30
–
0
mV
A1308LUA-9-T
–20
–
0
mV
A1309LLHLX-9-T
–30
–
0
mV
A1309LLHLX-RP9-T
–30
–
0
mV
A1309LUA-2-T
–10
–
10
mV
–
±2
–
%
TA = 25°C, after temperature cycling
[1] 1
G (gauss) = 0.1 mT (millitesla),
power-up, the output of the device is held low until VCC exceeds VUVLOHI. After the device is powered, the output remains valid until VCC drops
below VUVLOLO , when the output is pulled low.
[3] Determined by design and characterization, not evaluated at final test.
[4] See the Characteristic Definitions section.
[5] f varies as much as approximately ±20% across the full operating ambient temperature range and process.
C
[6] Output Referred Noise is calculated as 6 sigma (6 standard deviations) from characterization of a small sample of devices. Conversion of noise from
gauss to mV(P-P) can be done by: Noise (G) × Sensitivity (mV/G) = Noise (mV(P-P)).
[7] V
CLPLOW and VCLPHIGH scale with VCC due to ratiometry.
[8] Parameter is tested at wafer probe only.
[9] Percent change from actual value at V
CC = 5 V, for a given temperature.
[10] Percent change from actual value at V
CC = 5 V, TA = 25°C.
[11] Sensitivity drift through the life of the part, ΔSens
LIFE , can have a typical error value ±3% in addition to package hysteresis effects.
[2] On
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5
A1308 and
A1309
Linear Hall-Effect Sensor ICs with Analog Output
Available in a Miniature, Low-Profile Surface-Mount Package
CHARACTERISTIC DEFINITIONS
Power-On Time. When the supply is ramped to its operating
voltage, the device output requires a finite time to react to an
input magnetic field. Power-On Time, tPO , is defined as the time
it takes for the output voltage to begin responding to an applied
magnetic field after the power supply has reached its minimum
specified operating voltage, VCC(min), as shown in Figure 1.
Delay to Clamp. A large magnetic input step may cause the
clamp to overshoot its steady-state value. The Delay to Clamp,
tCLP , is defined as the time it takes for the output voltage to settle
within 1% of its steady-state value, after initially passing through
its steady-state voltage, as shown in Figure 2.
Quiescent Voltage Output Drift Across Temperature
Range. Due to internal component tolerances and thermal
considerations, the Quiescent Voltage Output, VOUT(Q), may
drift due to temperature changes within the Operating Ambient
Temperature, TA. For purposes of specification, the Quiescent
Voltage Output Drift Across Temperature Range, ∆VOUT(Q) (mV),
is defined as:
V
VOUT
90% VOUT
t2
tPO
t1= time at which power supply reaches
minimum specified operating voltage
t2= time at which output voltage settles
within ±10% of its steady-state value
under an applied magnetic field
0
+t
Figure 1: Definition of Power-On Time, tPO
VOUT
tCLP
t1
t2
t1= time at which output voltage initially
reaches steady-state clamp voltage
t2= time at which output voltage settles to
within 1% of steady-state clamp voltage
Magnetic Input Signal
Magnetic Input Signal
VCLPHIGH
(1)
VOUT(B+) – VOUT(B–)
(2)
(B+) – (B–)
where B+ is the magnetic flux density in a positive field (south
polarity) and B– is the magnetic flux density in a negative field
(north polarity).
VCC(min)
t1
∆VOUT(Q) = VOUT(Q)(TA) –VOUT(Q)(25°C)
Sensitivity. The amount of the output voltage change is proportional to the magnitude and polarity of the magnetic field applied.
This proportionality is specified as the magnetic sensitivity,
Sens (mV/G), of the device and is defined as:
VCC
VCC(typ)
Device Output, VOUT (V)
Quiescent Voltage Output. In the quiescent state (no significant magnetic field: B = 0 G), the output, VOUT(Q), is at a constant ratio to the supply voltage, VCC, across the entire operating
ranges of VCC and Operating Ambient Temperature, TA.
time (µs)
Figure 2: Definition of Delay to Clamp, tCLP
Sens =
Sensitivity Temperature Coefficient. The device sensitivity changes as temperature changes, with respect to its Sensitivity Temperature Coefficient, TCSENS. TCSENS is programmed
at 150°C (L temperature device) or at 125°C (K temperature
device), and calculated relative to the baseline sensitivity programming temperature of 25°C. TCSENS is defined as:
1
SensT2 – SensT1
TCSens =
100
×
(%/°C)
(3)
SensT1
T2–T1
where T1 is the baseline Sens programming temperature of 25°C,
and T2 is the TCSENS programming temperature of 150°C (L
temperature device) or 125°C (K temperature device).
The ideal value of Sens across the full ambient temperature
range, SensIDEAL(TA), is defined as:
SensIDEAL(TA) = SensT1 × [100 (%) + TCSENS (TA –T1)] (4)
Sensitivity Drift Across Temperature Range. Secondorder sensitivity temperature coefficient effects cause the
magnetic sensitivity, Sens, to drift from its ideal value across the
operating ambient temperature range, TA. For purposes of specifi-
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A1308 and
A1309
Linear Hall-Effect Sensor ICs with Analog Output
Available in a Miniature, Low-Profile Surface-Mount Package
cation, the Sensitivity Drift Across Temperature Range, ∆SensTC,
is defined as:
SensTA – SensIDEAL(TA)
∆SensTC =
× 100 (%) (5)
Sens
IDEAL(TA)
Sensitivity Drift Due to Package Hysteresis. Package
stress and relaxation can cause the device sensitivity at TA = 25°C
to change during and after temperature cycling. This change in
sensitivity follows a hysteresis curve. For purposes of specification, the Sensitivity Drift Due to Package Hysteresis, ∆SensPKG,
is defined as:
Sens(25°C)(2) – Sens(25°C)(1)
∆SensPKG =
Sens(25°C)(1)
× 100
(%) (6)
where Sens(25°C)(1) is the programmed value of sensitivity
at TA = 25°C, and Sens(25°C)(2) is the value of sensitivity at
TA = 25°C after temperature cycling TA up to 150°C (L temperature device) or 125°C (K temperature device), down to –40°C,
and back up to 25°C.
Linearity Sensitivity Error. The A1308 and A1309 are
designed to provide linear output in response to a ramping
applied magnetic field. Consider two magnetic fields, B1 and B2.
Ideally, the sensitivity of a device is the same for both fields, for
a given supply voltage and temperature. Linearity error is present
when there is a difference between the sensitivities measured at
B1 and B2.
Linearity Sensitivity Error, LINERR , is calculated separately for
positive (LinERR+) and negative (LinERR– ) applied magnetic
fields. LINERR (%) is measured and defined as:
Sens(B+)(2)
× 100
LinERR+ = 1–
Sens(B+)(1)
(%)
Sens(B–)(2)
× 100
LinERR– = 1–
Sens(B–)(1)
(%)
where:
SensBx =
|VOUT(Bx) – VOUT(Q)|
Bx
(7)
The output voltage clamps, VCLPHIGH and VCLPLOW , limit the
operating magnetic range of the applied field in which the device
provides a linear output. The maximum positive and negative
applied magnetic fields in the operating range can be calculated:
BMAX(+) =
BMAX(–) =
Sens
Ratiometry Error. The A1308 and A1309 provide ratiometric
output. This means that the Quiescent Voltage Output, VOUT(Q) ,
magnetic sensitivity, Sens, and clamp voltages, VCLPHIGH and
VCLPLOW , are proportional to the supply voltage, VCC. In other
words, when the supply voltage increases or decreases by a
certain percentage, each characteristic also increases or decreases
by the same percentage. Error is the difference between the
measured change in the supply voltage relative to 5 V and the
measured change in each characteristic.
The ratiometric error in quiescent voltage output, RatVOUT(Q)
(%), for a given supply voltage, VCC, is defined as:
(8)
|B(+)(2)| > |B(+)(1)| and |B(–)(2)| > |B(–)(1)|
VOUT(Q)(VCC) / VOUT(Q)(5V)
× 100
RatVOUT(Q) = 1–
VCC / 5 (V)
(%)
(12)
(9)
Sens(VCC) / Sens(5V)
× 100 (%)
RatSens = 1–
VCC / 5 (V)
(13)
The ratiometric error in the clamp voltages, RatVOUTCLP (%), for
a given supply voltage, VCC, is defined as:
The effective linearity error is:
LinERR = max(|LinERR+| , |LinERR– |)
VOUT(Q) – VCLPLOW
The ratiometric error in magnetic sensitivity, RatSens (%), for a
given supply voltage, VCC, is defined as:
and Bx are positive and negative magnetic fields, with respect to
the quiescent voltage output, such that
(10)
Sens
Symmetry Sensitivity Error. The magnetic sensitivity of the
device is constant for any two applied magnetic fields of equal
magnitude and opposite polarities. Symmetry error, SymERR (%),
is measured and defined as:
Sens(B+)
× 100 (%)
SymERR = 1–
(11)
Sens(B–)
where SensBx is as defined in equation 10, and B+ and B– are
positive and negative magnetic fields such that |B+| = |B–|.
VCLPHIGH – VOUT(Q)
VCLP(VCC) / VCLP(5V)
× 100
RatVOUTCLP = 1–
VCC / 5 (V)
where VCLP is either VCLPHIGH or VCLPLOW .
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(%)
(14)
7
A1308 and
A1309
Linear Hall-Effect Sensor ICs with Analog Output
Available in a Miniature, Low-Profile Surface-Mount Package
Undervoltage Lockout. The A1308 and A1309 provide an
undervoltage lockout feature which ensures that the device outputs a VOUT signal only when VCC is above certain thresholds .
The undervoltage lockout feature provides a hysteresis of operation to eliminate indeterminate output states.
VCC Ramp Time. The time taken for VCC to ramp from 0 V to
VCC(typ), 5 V (see Figure 4).
VCC Off Level. For applications in which the VCC pin of the
A1308 or A1309 is being power-cycled (for example using a
multiplexer to toggle the part on and off), the specification of
VCC Off Level, VCCOFF , determines how high a VCC off voltage
can be tolerated while still ensuring proper operation and startup
of the device (see Figure 4).
VCC
VUVLOHI
VUVLOLOW
VOUT
time
Figure 3: Definition of Undervoltage Lockout
VCC(typ)
Supply Voltage, VCC (V)
The output of the A1308 and A1309 is held low (GND) until
VCC exceeds VUVLOHI . After VCC exceeds VUVLOHI , the device
VOUT output is enabled, providing a ratiometric output voltage that is proportional to the input magnetic signal and VCC . If
VCC should drop back down below VUVLOLO after the device is
powered up, the output would be pulled low (see Figure 3) until
VUVLOHI is reached again and VOUT would be reenabled.
+V
tVCC
VCCOFF
0
time
Figure 4: Definition of VCC Ramp Time, tVCC
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8
A1308 and
A1309
Linear Hall-Effect Sensor ICs with Analog Output
Available in a Miniature, Low-Profile Surface-Mount Package
APPLICATION INFORMATION
A1308
A1309
VOUT
VCC
5V
0.1 µF
RL
GND
4.7 nF
Figure 5: Typical Application Circuit
Chopper Stabilization Technique
When using Hall-effect technology, a limiting factor for
switchpoint accuracy is the small signal voltage developed across
the Hall element. This voltage is disproportionally small relative
to the offset that can be produced at the output of the Hall sensor
IC. This makes it difficult to process the signal while maintaining an accurate, reliable output over the specified operating
temperature and voltage ranges. Chopper stabilization is a unique
approach used to minimize Hall offset on the chip. Allegro
employs a technique to remove key sources of the output drift
induced by thermal and mechanical stresses. This offset reduction
technique is based on a signal modulation-demodulation process.
The undesired offset signal is separated from the magnetic fieldinduced signal in the frequency domain, through modulation.
The subsequent demodulation acts as a modulation process for
the offset, causing the magnetic field-induced signal to recover
its original spectrum at baseband, while the DC offset becomes a
high-frequency signal. The magnetic-sourced signal then can pass
through a low-pass filter, while the modulated DC offset is suppressed. In addition to the removal of the thermal and mechanical
stress-related offset, this novel technique also reduces the amount
of thermal noise in the Hall sensor IC while completely removing
the modulated residue resulting from the chopper operation. The
chopper stabilization technique uses a high-frequency sampling
clock. For demodulation process, a sample-and-hold technique
is used. This high-frequency operation allows a greater sampling
rate, which results in higher accuracy and faster signal-processing
capability. This approach desensitizes the chip to the effects
of thermal and mechanical stresses, and produces devices that
have extremely stable quiescent Hall output voltages and precise
recoverability after temperature cycling. This technique is made
possible through the use of a BiCMOS process, which allows the
use of low-offset, low-noise amplifiers in combination with highdensity logic integration and sample-and-hold circuits.
Regulator
Clock/Logic
Hall Element
Amp
Anti-aliasing Tuned
LP Filter
Filter
Figure 6: Chopper Stabilization Technique
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
9
A1308 and
A1309
Linear Hall-Effect Sensor ICs with Analog Output
Available in a Miniature, Low-Profile Surface-Mount Package
Package LH, 3-Pin (SOT-23W)
+0.12
2.98 –0.08
1.49 D
4°±4°
3
A
+0.020
0.180–0.053
0.96 D
+0.10
2.90 –0.20
+0.19
1.91 –0.06
2.40
0.70
D
0.25 MIN
1.00
2
1
0.55 REF
0.25 BSC
0.95
Seating Plane
Gauge Plane
8X 10° REF
B
PCB Layout Reference View
C
Branding Reference View
Branded Face
1.00 ±0.13
0.95 BSC
+0.10
0.05 –0.05
0.40 ±0.10
For Reference Only; not for tooling use (reference DWG-2840)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A
Active Area Depth, 0.28 mm REF
B
Reference land pattern layout
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances
C
Branding scale and appearance at supplier discretion
D
Hall element, not to scale
NNN
1
Part Number
A1308LLHLX-05-T
A1308LLHLX-1-T
A1308LLHLX-2-T
A1308LLHLX-3-T
A1308LLHLX-5-T
A1309LLHLX-9-T
A1309LLHLX-RP9-T
NNN
308
308
308
308
308
309
09R
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
10
A1308 and
A1309
Linear Hall-Effect Sensor ICs with Analog Output
Available in a Miniature, Low-Profile Surface-Mount Package
Package UA, 3-Pin SIP
+0.08
4.09 –0.05
45°
B
C
E
+0.08
3.02 –0.05
2.04
1.52 ±0.05
1.44
E
10°
Mold Ejector
Pin Indent
E
Branded
Face
A
1.02
MAX
45°
0.79 REF
NNN
1
1
2
D Standard Branding Reference View
3
= Supplier emblem
N = Last three digits of device part number
+0.03
0.41 –0.06
14.99 ±0.25
+0.05
0.43 –0.07
For Reference Only; not for tooling use (reference DWG-9065)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A
Dambar removal protrusion (6X)
B
Gate and tie bar burr area
C
Active Area Depth, 0.50 mm REF
D
Branding scale and appearance at supplier discretion
E
Hall element (not to scale)
1.27 NOM
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
11
A1308 and
A1309
Linear Hall-Effect Sensor ICs with Analog Output
Available in a Miniature, Low-Profile Surface-Mount Package
Revision History
Number
Date
Description
–
June 27, 2014
Initial release
1
June 27, 2014
Updated product offerings
2
November 13, 2015
Updated product offerings
3
March 30, 2016
Updated product offerings
4
April 19, 2016
Updated product offerings
5
September 2, 2016
Updated product offerings
6
December 9, 2016
Updated product offerings
Updated product offerings
7
January 4, 2017
8
June 6, 2017
9
November 14, 2018
Updated product offerings and Figure 3
Added A1309LUA-2-T and A1308LUA-9-T part options
Copyright ©2018, Allegro MicroSystems, LLC
Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to
permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that
the information being relied upon is current.
Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of
Allegro’s product can reasonably be expected to cause bodily harm.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its
use; nor for any infringement of patents or other rights of third parties which may result from its use.
Copies of this document are considered uncontrolled documents.
For the latest version of this document, visit our website:
www.allegromicro.com
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
12
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