A3241 and A3242
Chopper-Stabilized Unipolar Hall-Effect Switches
Discontinued Product
This device is no longer in production. The device should not be
purchased for new design applications. Samples are no longer available.
Date of status change: August 1, 2011
Recommended Substitutions:
For existing customer transition, and for new customers or new applications, refer to the A1122.
NOTE: For detailed information on purchasing options, contact your
local Allegro field applications engineer or sales representative.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, revisions to the anticipated product life cycle plan
for a product to accommodate changes in production capabilities, alternative product availabilities, or market demand. The
information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringements of patents or other rights of third parties which may result from its use.
A3241 and A3242
Chopper-Stabilized Unipolar Hall-Effect Switches
Features and Benefits
Description
▪ Chopper stabilization
▫ Superior temperature stability
▫ Extremely low switchpoint drift
▫ Insensitive to physical stress
▪ Reverse battery protection
▪ Output short circuit protection
▪ Solid state reliability
▪ Small size
▪ Robust EMC capability
▪ High ESD ratings (HBM)
The A3241 and A3242 integrated circuits are unipolar Halleffect switches with digital outputs. These devices are suited
for operation over extended temperature ranges, up to +150°C.
Superior high-temperature performance is made possible
through an Allegro® dynamic offset cancellation, which
reduces the residual offset voltage normally caused by
device overmolding, temperature excursions, and thermal
stress.
Packages: 3 pin SOT23W (suffix LH), and
3 pin SIP (suffix UA)
The A3241 and A3242 Hall-effect switches include the
following on a single silicon chip: voltage regulator, Hallvoltage generator, small-signal amplifier, chopper stabilization,
Schmitt trigger, and a short circuit protected open-drain output.
Advanced BiCMOS wafer fabrication processing is used to
take advantage of low-voltage requirements, component
matching, very low input-offset errors, and small component
geometries.
The integrated voltage regulator permits operation from 3.6 to
24 V. The unipolar family members operate with a sufficient
south polarity field only, turning off in the absence of such a
south polarity field.
Continued on the next page…
Not to scale
Functional Block Diagram
VCC
Regulator
Amp
Low-Pass
Filter
Amp
Sample and Hold
Dynamic Offset
Cancellation
To All Subcircuits
VOUT
Control
Current Limit
BOP
–
–
500
mV
Output Current Limit
IOM
B > BOP
30
–
60
mA
Power-On Time
tPO
VCC > VCC(MIN)
–
–
50
μs
–
200
–
kHz
Output On Voltage
Chopping Frequency
fc
Output Rise Time2
tr
RLOAD = 820 Ω, CS = 20 pF
–
–
1
μs
Output Fall Time2
tf
RLOAD = 820 Ω, CS = 20 pF
–
–
1
μs
ICCON
B > BOP
–
1.5
3.5
mA
ICCOFF
B < BRP
–
1.5
3.5
mA
VRCC = –18 V
–
–
–2
mA
VZSupply
ICC = 6.5 mA; TA = 25°C
28
–
–
V
IZSupply
VS = 28 V
–
–
6.5
mA
A3241
50
95
135
G
A3242
120
150
200
G
A3241
40
70
110
G
A3242
110
125
190
G
Supply Current
Reverse Battery Current
Supply Zener Clamp Voltage
Supply Zener
Current3
IRCC
Magnetic Characteristics4
Operate Point
BOP
Release Point
BRP
Hysteresis
BHYS
A3241
A3242
BOP – BRP
10
25
42
G
10
25
40
G
1
Maximum voltage must be adjusted for power dissipation and junction temperature, see Power Derating section.
2 C = oscilloscope probe capacitance.
S
3 Maximum current limit is equal to the maximum I
CC(MAX) + 3 mA.
4 Magnetic flux density, B, is indicated as a negative value for north-polarity magnetic fields, and as a positive value for south-polarity magnetic fields.
This so-called algebraic convention supports arithmetic comparison of north and south polarity values, where the relative strength of the field is indicated
by the absolute value of B, and the sign indicates the polarity of the field (for example, a –100 G field and a 100 G field have equivalent strength, but
opposite polarity).
DEVICE QUALIFICATION PROGRAM
Contact Allegro for information.
EMC (Electromagnetic Compatibility) REQUIREMENTS
Contact Allegro for information.
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
3
A3241 and
A3242
Chopper-Stabilized Unipolar Hall Effect Switches
Characteristic Data
Supply Current (On) versus Supply Voltage
5.0
5.0
4.0
4.0
3.0
VCC (V)
24
3.6
2.0
ICCON (mA)
ICCON (mA)
Supply Current (On) versus Ambient Temperature
1.0
TA (°C)
–40
25
150
3.0
2.0
1.0
0.0
0
-50
0
50
100
150
0
5
10
TA (°C)
20
25
Supply Current (Off) versus Supply Voltage
5.0
5.0
4.0
4.0
3.0
VCC (V)
24
3.6
2.0
ICCOFF (mA)
ICCOFF (mA)
Supply Current (Off) versus Ambient Temperature
TA (°C)
-40°C
–40
25°C
25
150°C
150
3.0
2.0
1.0
1.0
0
0.0
-50
0
50
100
0
150
5
10
15
20
25
VCC (V)
TA (°C)
Output Voltage (On) versus Ambient Temperature
Output Voltage (On) versus Supply Voltage
500
500
450
450
400
400
350
VCC (V)
24
3.6
300
250
200
150
VOUT(SAT) (mV)
V OUT(SAT) (mV)
15
VCC (V)
350
250
200
150
100
100
50
50
0
TA (°C)
150°C
–40
25°C
25
-40°C
150
300
0
-50
0
50
TA (°C)
100
150
0
5
10
15
20
25
VCC (V)
Continued on the next page...
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
4
A3241 and
A3242
Chopper-Stabilized Unipolar Hall Effect Switches
Operate Point versus Supply Voltage
(A3241)
Operate Point versus Ambient Temperature
(A3241)
130
130
120
120
110
100
VCC (V)
24
3.6
90
BOP (G)
BOP (G)
110
TA (°C)
–40
25
150
100
90
80
80
70
70
60
60
50
50
-50
0
50
100
0
150
5
10
110
110
100
100
90
90
VCC (V)
24
3.6
80
70
BRP (G)
BRP [G]
20
25
Release Point versus Supply Voltage
(A3241)
Release Point versus Ambient Temperature
(A3241)
TA (°C)
–40
25
150
80
70
60
60
50
50
40
40
-50
0
50
100
0
150
5
10
15
20
25
VCC (V)
TA (°C)
Hysteresis versus Supply Voltage
(A3241)
Hysteresis versus Ambient Temperature
(A3241)
40
40
35
35
VCC (V)
24
3.6
30
25
BHYS (G)
BHYS (G)
15
VCC (V)
TA (°C)
30
TA (°C)
–40
25
150
25
20
20
15
15
10
10
-50
0
50
TA (°C)
100
150
0
5
10
15
20
25
VCC (V)
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
5
A3241 and
A3242
Chopper-Stabilized Unipolar Hall Effect Switches
Operate Point versus Supply Voltage
(A3242)
200
200
190
190
180
180
170
VCC (V)
24
3.6
160
150
BOP (G)
BOP (G)
Operate Point versus Ambient Temperature
(A3242)
170
TA (°C)
–40
25
150
160
150
140
140
130
130
120
120
-50
0
50
100
150
0
5
10
TA (°C)
190
190
180
180
170
170
160
VCC (V)
24
3.6
150
140
BRP (G)
BRP (G)
20
25
Release Point versus Supply Voltage
(A3242)
Release Point versus Ambient Temperature
(A3242)
160
TA (°C)
–40
25
150
150
140
130
130
120
120
110
110
-50
0
50
100
0
150
5
10
15
20
25
VCC (V)
TA (°C)
Hysteresis versus Supply Voltage
(A3242)
Hysteresis versus Ambient Temperature
(A3242)
40
40
35
35
VCC (V)
24
3.6
25
30
BHYS (G)
30
BHYS (G)
15
VCC (V)
TA (°C)
–40
25
150
25
20
20
15
15
10
10
-50
0
50
TA (°C)
100
150
0
5
10
15
20
25
VCC (V)
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
6
A3241 and
A3242
Chopper-Stabilized Unipolar Hall Effect Switches
THERMAL CHARACTERISTICS may require derating at maximum conditions, see application information
Characteristic
Symbol
RθJA
Package Thermal Resistance
Test Conditions
Package LH-3, 1-layer PCB with copper limited to
solder pads
Package LH-3, 2-layer PCB with 0.926 in2 on each
side, connected by thermal vias
Package UA, 1-layer PCB with copper limited to
solder pads
Value
Units
110
ºC/W
228
ºC/W
165
ºC/W
Maximum Allowable V CC (V)
Power Derating Curve
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
V CC(max)
1-layer PCB, Package LH
(R θJA= 110 °C/W)
1-layer PCB, Package UA
(R θJA= 165 °C/W)
2-layer PCB, Package LH
(R θJA= 228 °C/W)
V CC(min)
20
40
60
80
100
120
140
160
180
Temperature (°C)
Power Dissipation, PD (m W)
Power Dissipation versus Ambient Temperature
1900
1800
1700
1600
1500
1400
1300
1200
1100
1000
900
800
700
600
500
400
300
200
100
0
1l
(R aye
rP
θJ
C
A =
11 B, P
0 º ac
1-la
C/ ka
W
(R yer P
) ge L
CB
θJA =
H
,
165 Pac
ºC/ kage
W)
UA
2-la
y
(R er PCB
,
θJA =
228 Packa
ºC/W ge L
H
)
20
40
60
80
100
120
Temperature (°C)
140
160
180
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
7
A3241 and
A3242
Chopper-Stabilized Unipolar Hall Effect Switches
Functional Description
Operation
The output of these devices switches low (turns on) when a
magnetic field (south polarity) perpendicular to the Hall element exceeds the operate point threshold, BOP. After turn-on, the
output voltage is VOUT(SAT). The output transistor is capable of
sinking current up to the short circuit current limit, IOM, which
is a minimum of 30 mA. When the magnetic field is reduced
below the release point, BRP, the device output goes high (turns
off). The difference in the magnetic operate and release points is
the hysteresis, Bhys, of the device. This built-in hysteresis allows
clean switching of the output even in the presence of external
mechanical vibration and electrical noise.
Applications
It is strongly recommended that an external bypass capacitor be
connected (in close proximity to the Hall element) between the
supply and ground of the device to reduce both external noise
and noise generated by the chopper stabilization technique. As is
shown in Panel B of figure 1, a 0.1μF capacitor is typical.
Powering-on the device in the hysteresis region, less than BOP
and higher than BRP, allows an indeterminate output state. The
correct state is attained after the first excursion beyond BOP or
BRP.
• Soldering Methods for Allegro’s Products – SMT and ThroughHole, AN26009
Extensive applications information on magnets and Hall-effect
devices is available in:
• Hall-Effect IC Applications Guide, AN27701,
• Hall-Effect Devices: Gluing, Potting, Encapsulating, Lead
Welding and Lead Forming, AN27703.1
All are provided in Allegro Electronic Data Book, AMS-702 and
the Allegro Web site: www.allegromicro.com
(B)
(A)
VS
V+
VCC
VCC
Switch to Low
Switch to High
VCC
CBYP
0.1 µF
VOUT(SAT)
0
BRP
0
BOP
B–
A324x
RLOAD
VOUT
Output
GND
B+
BHYS
Figure 1: Switching Behavior of Unipolar Switches. In Panel A, on the horizontal axis, the B+ direction indicates increasing south polarity
magnetic field strength, and the B– direction indicates decreasing south polarity field strength (including the case of increasing north
polarity). This behavior can be exhibited when using a circuit such as that shown in panel B.
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
8
Chopper-Stabilized Unipolar Hall Effect Switches
Chopper Stabilization Technique
When using Hall-effect technology, a limiting factor for
switchpoint accuracy is the small signal voltage developed
across the Hall element. This voltage is disproportionally small
relative to the offset that can be produced at the output of the
Hall element. This makes it difficult to process the signal while
maintaining an accurate, reliable output over the specified operating temperature and voltage ranges.
Chopper stabilization is a unique approach used to minimize
Hall offset on the chip. The Allegro technique, namely Dynamic
Quadrature Offset Cancellation, removes key sources of the
output drift induced by thermal and mechanical stresses. This
offset reduction technique is based on a signal modulationdemodulation process. The undesired offset signal is separated
from the magnetic-field-induced signal in the frequency domain,
through modulation. The subsequent demodulation acts as a
modulation process for the offset, causing the magnetic-fieldinduced signal to recover its original spectrum at baseband,
while the DC offset becomes a high-frequency signal. The
magnetic-field-induced signal then can pass through a low-pass
filter, while the modulated DC offset is suppressed. This configuration is illustrated in figure 2.
The chopper stabilization technique uses a 200 kHz high-frequency clock. For demodulation process, a sample and hold
technique is used, where the sampling is performed at twice the
chopper frequency (400 kHz). This high-frequency operation
allows a greater sampling rate, which results in higher accuracy
and faster signal-processing capability. This approach desensitizes the chip to the effects of thermal and mechanical stresses,
and produces devices that have extremely stable quiescent Hall
output voltages and precise recoverability after temperature
cycling. This technique is made possible through the use of a
BiCMOS process, which allows the use of low-offset, low-noise
amplifiers in combination with high-density logic integration and
sample-and-hold circuits.
The repeatability of magnetic-field-induced switching is affected
slightly by a chopper technique. However, the Allegro highfrequency chopping approach minimizes the affect of jitter and
makes it imperceptible in most applications. Applications that
are more likely to be sensitive to such degradation are those
requiring precise sensing of alternating magnetic fields; for
example, speed sensing of ring-magnet targets. For such applications, Allegro recommends its digital device families with lower
sensitivity to jitter. For more information on those devices,
contact your Allegro sales representative.
Regulator
Hall Element
Amp
Low-Pass
Filter
Clock/Logic
Sample and
Hold
A3241 and
A3242
Figure 2. Chopper Stabilization Circuit (Dynamic Quadrature Offset Cancellation)
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
9
A3241 and
A3242
Chopper-Stabilized Unipolar Hall Effect Switches
Power Derating
The device must be operated below the maximum junction
temperature of the device, TJ(max). Under certain combinations of
peak conditions, reliable operation may require derating supplied power or improving the heat dissipation properties of the
application. This section presents a procedure for correlating
factors affecting operating TJ. (Thermal data is also available on
the Allegro MicroSystems Web site.)
The Package Thermal Resistance, RJA, is a figure of merit summarizing the ability of the application and the device to dissipate
heat from the junction (die), through all paths to the ambient air.
Its primary component is the Effective Thermal Conductivity,
K, of the printed circuit board, including adjacent devices and
traces. Radiation from the die through the device case, RJC, is
relatively small component of RJA. Ambient air temperature,
TA, and air motion are significant external factors, damped by
overmolding.
The effect of varying power levels (Power Dissipation, PD), can
be estimated. The following formulas represent the fundamental
relationships used to estimate TJ, at PD.
PD = VIN × IIN
(1)
T = PD × RJA (2)
TJ = TA + ΔT
Example: Reliability for VCC at TA = 150°C, package LH, using a
low-K PCB.
Observe the worst-case ratings for the device, specifically:
RJA = 228 °C/W, TJ(max) = 165°C, VCC(max) = 24 V, and
ICC(max) = 5 mA.
Calculate the maximum allowable power level, PD(max). First,
invert equation 3:
Tmax = TJ(max) – TA = 165 °C – 150 °C = 15 °C
This provides the allowable increase to TJ resulting from internal
power dissipation. Then, invert equation 2:
PD(max) = Tmax ÷ RJA = 15°C ÷ 228 °C/W = 65.8 mW
Finally, invert equation 1 with respect to voltage:
VCC(est) = PD(max) ÷ ICC(max) = 65.8 mW ÷ 5 mA = 13.2 V
The result indicates that, at TA, the application and device can
dissipate adequate amounts of heat at voltages ≤VCC(est).
Compare VCC(est) to VCC(max). If VCC(est) ≤ VCC(max), then reliable operation between VCC(est) and VCC(max) requires enhanced
RJA. If VCC(est) ≥ VCC(max), then operation between VCC(est) and
VCC(max) is reliable under these conditions.
(3)
For example, given common conditions such as: TA= 25°C,
VCC = 12 V, ICC = 1.5 mA, and RJA = 165 °C/W, then:
PD = VCC × ICC = 12 V × 1.5 mA = 18 mW
T = PD × RJA = 18 mW × 165 °C/W = 3°C
TJ = TA + T = 25°C + 3°C = 28°C
A worst-case estimate, PD(max), represents the maximum allowable power level (VCC(max), ICC(max)), without exceeding TJ(max),
at a selected RJA and TA.
10
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
A3241 and
A3242
Chopper-Stabilized Unipolar Hall Effect Switches
Package LH, 3-Pin (SOT-23W)
+0.12
2.98 –0.08
1.49 D
4°±4°
3
A
+0.020
0.180–0.053
0.96 D
+0.10
2.90 –0.20
+0.19
1.91 –0.06
2.40
0.70
D
0.25 MIN
1.00
2
1
0.55 REF
0.25 BSC
0.95
Seating Plane
Gauge Plane
B
PCB Layout Reference View
Branded Face
8X 10° REF
1.00 ±0.13
+0.10
0.05 –0.05
0.95 BSC
0.40 ±0.10
NNT
1
C
N = Last two digits of device part number
T = Temperature code
For Reference Only; not for tooling use (reference dwg. 802840)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A
Active Area Depth, 0.28 mm REF
B
Reference land pattern layout
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances
C
Branding scale and appearance at supplier discretion
D
Hall element, not to scale
Standard Branding Reference View
Package LH
Package UA
3
1
2
1
2
3
Terminal List
Name
Description
Number
Package LH
Package UA
Connects power supply to chip
1
1
VOUT
Output from circuit
2
3
GND
Ground
3
2
VCC
11
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
A3241 and
A3242
Chopper-Stabilized Unipolar Hall Effect Switches
Package UA, 3-Pin SIP
+0.08
4.09 –0.05
45°
B
C
E
2.04
1.52 ±0.05
1.44 E
Mold Ejector
Pin Indent
+0.08
3.02 –0.05
E
Branded
Face
45°
1
2.16
MAX
D Standard Branding Reference View
= Supplier emblem
N = Last two digits of device part number
T = Temperature code
0.79 REF
A
0.51
REF
NNT
1
2
3
+0.03
0.41 –0.06
15.75 ±0.51
For Reference Only; not for tooling use (reference DWG-9049)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A
Dambar removal protrusion (6X)
B Gate burr area
C Active Area Depth, 0.50 mm REF
+0.05
0.43 –0.07
D
Branding scale and appearance at supplier discretion
E
Hall element, not to scale
1.27 NOM
Copyright ©2005-2010, Allegro MicroSystems, Inc.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the
information being relied upon is current.
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use;
nor for any infringement of patents or other rights of third parties which may result from its use.
For the latest version of this document, visit our website:
www.allegromicro.com
12
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
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www.allegromicro.com
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