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A3958SLBTR-T

A3958SLBTR-T

  • 厂商:

    ALLEGRO(埃戈罗)

  • 封装:

    SOIC24

  • 描述:

    IC MOTOR DRIVER 4.5V-5.5V 24SOIC

  • 数据手册
  • 价格&库存
A3958SLBTR-T 数据手册
A3958 DMOS Full-Bridge PWM Motor Driver Features and Benefits Description ▪ ±2 A, 50 V continuous output rating ▪ Low rDS(on) outputs (270 mΩ, typical) ▪ Programmable mixed, fast, and slow current-decay modes ▪ Serial interface controls chip functions ▪ Synchronous rectification for low power dissipation ▪ Internal UVLO and thermal-shutdown circuitry ▪ Crossover-current protection Designed for pulse width modulated (PWM) current control of DC motors, the A3958 is capable of continuous output currents to ±2 A and operating voltages to 50 V. Internal fixed off-time PWM current-control timing circuitry can be programmed via a serial interface to operate in slow, fast, and mixed currentdecay modes. Packages: PHASE and ENABLE input terminals are provided for use in controlling the speed and direction of a DC motor with externally applied PWM-control signals. The ENABLE input can be programmed via the serial port to PWM the bridge in fast or slow current decay. Internal synchronous rectification control circuitry is provided to reduce power dissipation during PWM operation. Internal circuit protection includes thermal shutdown with hysteresis, and crossover-current protection. Special power-up sequencing is not required. Package B, 24-pin DIP with exposed tabs The A3958 is supplied in a choice of two power packages, a 24-pin plastic DIP with exposed thermal tabs (package suffix ‘B’), and a 24-pin SOIC with internally fused pins (package suffix ‘LB’). In both cases, the power pins are at ground potential and need no electrical isolation. Each package type is lead (Pb) free, with 100% matte tin leadframe. Package LB, 24-pin SOIC with internally fused pins Not to scale Functional Block Diagram VBB VDD LOAD SUPPLY CP CP1 CHARGE PUMP BANDGAP VDD CREG TSD CP2 + LOGIC SUPPLY CHARGE PUMP UNDERVOLTAGE & FAULT DETECT BANDGAP REGULATOR VREG CONTROL LOGIC OSC CLOCK DATA STROBE PHASE ENABLE SYNC RECT MODE SYNC RECT DISABLE PWM MODE INT PWM MODE EXT PHASE ENABLE GATE DRIVE OUTA MODE SENSE ZERO CURRENT DETECT FIXED OFF PROGRAMMABLE BLANK DECAY PWM TIMER SERIAL PORT OUTB SLEEP MODE CURRENT SENSE RANGE CS RS REFERENCE BUFFER & DIVIDER REF VREF RANGE Dwg. FP-048 29319.31F A3958 DMOS Full-Bridge PWM Motor Driver Selection Guide Part Number Packing Package A3958SB-T* 24-pin DIP with exposed thermal tabs 15 per Tube A3958SLBTR-T 24-pin SOICW with internally fused pins 1000 per reel Variant is in production but has been determined to be NOT FOR NEW DESIGN. This classification indicates that sale of the variant is currently restricted to existing customer applications. The variant should not be purchased for new design applications because obsolescence in the near future is probable. Samples are no longer available. Status change: May 4, 2009. Absolute Maximum Ratings Characteristic Symbol Notes Rating Units Load Supply Voltage VBB 50 V Logic Supply Voltage VDD 7.0 V Input Voltage VIN –0.3 to VCC + 0.3 V Sense Voltage VS 0.5 V Reference Voltage VREF 2.7 V Output Current IOUT Output current rating may be limited by duty cycle, ambient temperature, and heat sinking. Under any set of conditions, do not exceed the specified current rating or a junction temperature of 150°C. ±2.0 mA Package Power Dissipation PD B package, per SEMI G42-88 Specification, TA= 25°C 3.1 W Operating Ambient Temperature TA Maximum Junction Temperature TJ(max) Storage Temperature LB package, per SEMI G42-88 Specification, TA= 25°C Range S 1.6 W –20 to 85 ºC 150 ºC –55 to 150 ºC Value Units 40 ºC/W 77 ºC/W 6 ºC/W Fault conditions that produce excessive junction temperature will activate the device’s thermal shutdown circuitry. These conditions can be tolerated but should be avoided. Tstg Thermal Characteristics Characteristic Symbol Package Thermal Resistance, Junction to Ambient RθJA Package Thermal Resistance, Junction to Tab RθJT Test Conditions* B Package, single-layer PCB, 1 in.2 2-oz. exposed copper LB Package, single-layer PCB, minimal exposed copper area ALLOWABLE PACKAGE POWER DISSIPATION (W) *Additional thermal information available on Allegro website. 4 RQJT = 6.0oC/W 3 SUFFIX 'B', R QJA = 40oC/W 2 1 SUFFIX 'LB', R QJA = 77oC/W 0 25 50 75 100 TEMPERATURE IN o C 125 150 Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com Copyright © 2000, 2002 Allegro MicroSystems, Inc. 2 A3958 DMOS Full-Bridge PWM Motor Driver ELECTRICAL CHARACTERISTICS at TA = +25°C, VBB = 50 V, VDD = 5.0 V, VSENSE = 0.5 V, fPWM < 50 kHz (unless noted otherwise) Limits Characteristics Symbol Test Conditions Min. Typ. Max. Units Output Drivers Load Supply Voltage Range Output Leakage Current Output On Resistance Body Diode Forward Voltage Load Supply Current VBB IDSS rDS(on) VF IBB Operating 20 – 50 V During sleep mode 0 – 50 V VOUT = VBB –
A3958SLBTR-T 价格&库存

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