A3979SLP

A3979 Microstepping DMOS Driver with Translator Features and Benefits Description ▪ ▪ ▪ ▪ ▪ ▪ ▪ ▪ ▪ The A3979 is a complete microstepping motor driver with built-in translator, designed as a pin-compatible replacement for the successful A3977, with enhanced microstepping (1/16 step) precision. It is designed to operate bipolar stepper motors in full-, half-, quarter-, and sixteenth-step modes, with an output drive capacity of up to 35 V and ±2.5 A. The A3979 includes a fixed off-time current regulator that has the ability to operate in Slow, Fast, or Mixed decay modes. This current-decay control scheme results in reduced audible motor noise, increased step accuracy, and reduced power dissipation. ±2.5 A, 35 V output rating Low RDS(On) outputs: 0.28 Ω source, 0.22 Ω sink, typical Automatic current decay mode detection/selection 3.0 to 5.5 V logic supply voltage range Slow, Fast or Mixed current decay modes Home output Synchronous rectification for low power dissipation Internal UVLO and thermal shutdown circuitry Crossover-current protection Package: 28 lead TSSOP (suffix LP) with exposed thermal pad The translator is the key to the easy implementation of the A3979. It allows the simple input of one pulse on the STEP pin to drive the motor one microstep, which can be either a full step, half, quarter, or sixteenth, depending on the setting of the MS1 and MS2 logic inputs. There are no phase-sequence tables, high-frequency control lines, or complex interfaces to program. The A3979 interface is an ideal fit for applications where a complex microprocessor is unavailable or is overburdened. Internal synchronous-rectification control circuitry is provided to improve power dissipation during PWM operation. Internal circuit protection includes: thermal shutdown with hysteresis, UVLO (undervoltage lockout), and crossover-current protection. Special power-on sequencing is not required. The A3979 is supplied in a low-profile (height ≤1.20 mm), 28-pin TSSOP with exposed thermal pad. The package is lead (Pb) free, with 100% matte tin leadframe plating. Not to scale Pin-out Diagram SENSE1 1 28 VBB1 HOME 2 27 SLEEP DIR 3 26 ENABLE OUT1A 4 PFD 5 RC1 6 25 OUT1B AGND 7 REF 8 RC2 9 VDD 10 24 CP2 PWM Timer ÷8 Translator and Control Logic Charge Pump 23 CP1 22 VCP 21 PGND Reg 20 VREG 19 STEP OUT2A 11 18 OUT2B MS2 12 17 RESET MS1 13 16 SR SENSE2 14 15 VBB2 AGND and PGND must be connected together externally 26184.23F A3979 DMOS Microstepping Driver with Translator Selection Guide Part Number Packing A3979SLPTR-T 4000 pieces per reel Absolute Maximum Ratings Load Supply Voltage VBB Output Current IOUT Logic Supply Voltage VDD Logic Input Voltage Range Sense Voltage Reference Voltage Operating Ambient Temperature VIN Output current rating may be limited by duty cycle, ambient temperature, and heat sinking. Under any set of conditions, do not exceed the specified current rating or a junction temperature of 150°C. V ±2.5 A 7.0 V tW > 30 ns –0.3 to VDD + 0.3 V tW < 30 ns –1 to VDD + 1 V 0.5 V VSENSE VREF TA 35 Range S VDD V –20 to 85 °C Junction Temperature TJ(max) 150 °C Storage Temperature Tstg –55 to 150 °C Allegro MicroSystems, LLC 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 2 A3979 DMOS Microstepping Driver with Translator Functional Block Diagram 0.22 µF 0.22 µF CP2 VREG Logic Supply CP1 2V VDD UVLO and Fault Regulator Bandgap Charge Pump VCP Reference Supply 0.22 µF Load Supply REF DAC DMOS Full Bridge VBB1 RC1 >47 µF RT1 CT1 OUT1A 4 STEP OUT1B DIR PWM Timer: PWM Latch Blanking Mixed Decay RESET MS1 Translator MS2 SENSE1 RS1 Gate Drive HOME CS1 4 SLEEP Control Logic SR DMOS Full Bridge VBB2 ENABLE OUT2A VPFD PFD 0.1 µF RC2 RT2 OUT2B PWM Timer: PWM Latch Blanking Mixed Decay CT2 SENSE2 RS2 DAC CS2 Exposed Thermal Pad AGND PGND (Required) Allegro MicroSystems, LLC 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 3 A3979 DMOS Microstepping Driver with Translator ELECTRICAL CHARACTERISTICS at TA = 25°C, VBB = 35 V, VDD = 3.0 to 5.5 V (unless otherwise noted) Characteristics Output Drivers Symbol Load Supply Voltage Range VBB Output Leakage Current2 IDSS Output On Resistance RDS(On) Body Diode Forward Voltage VF Motor Supply Current IBB Control Logic Logic Supply Voltage Range VDD Logic Supply Current IDD Logic Input Voltage Logic Input Current2 Reference Input Voltage Range Reference Input Current HOME Output Voltage Mixed Decay Mode Trip Point Gain (Gm) Error3 STEP Pulse Width Blank Time Fixed Off-Time Crossover Dead Time Test Conditions Operating During Sleep mode VOUT = VBB VOUT = 0 V Source driver, IOUT = –2.5 A Sink driver, IOUT = 2.5 A Source diode, IF = –2.5 A Sink diode, IF = 2.5 A fPWM < 50 kHz Operating, outputs disabled Sleep mode Operating fPWM < 50 kHz Outputs off Sleep mode VIN(1) VIN(0) Min. Typ.1 Max. Units 8 0 – – – – – – – – – – –