A4480KLJTR-T

A4480 Wide Input 5 V, 50 mA, Automotive Regulator with Output Short-to-Battery Protection and Power OK FEATURES AND BENEFITS DESCRIPTION • Automotive AEC-Q100 qualified • Wide operating range of 3.5 to 28 V, with 40 V load dump rating • Linear regulator output with foldback short-circuit and short-to-battery protection • Boost function to maintain output when input is low • Power OK (POK) flag • High-voltage logic-level enable input (ENB) for microprocessor or ignition control • Pin-to-pin and pin-to-ground tolerant at every pin The A4480 is a wide input regulator with complete control, diagnostics, and protection features that address many requirements of automotive applications. It includes a boost function to allow operation with input voltages from 3.5 to 28 V, while maintaining a 5 V output voltage. The A4480 is able to supply up to 50 mA of load current. An enable pin (ENB) allows control of the regulator output. This pin is rated to operate at up to 40 V, so it can be connected directly to a car battery. Diagnostic output from the A4480 includes an open-drain Power OK (POK) output to alert the microprocessor that a fault has occurred. APPLICATIONS • Microcontroller power • Transceivers (CAN, LIN, etc.) power supplies • Sensors Protection features include input undervoltage lockout (UVLO), foldback overcurrent protection, output under/overvoltage protections (UV/OVP), and thermal shutdown (TSD). In addition, the output is protected from a short-to-battery event. PACKAGE The A4480 device is available in an 8-pin eSOIC package with exposed pad for enhanced thermal dissipation. It is lead (PB) free, with 100% matte tin leadframe plating. 8-pin SOIC with exposed thermal pad (suffix LJ) Not to scale VIN CP2 CP1 C2 VREG VIN C3 C1 Enable from µP or VIN A4480 IO Voltage or VOUT ENB GND VOUT VOUT C4 R1 POK Figure 1: Typical Application Circuit A4480-DS, Rev. 4 MCO-000191 July 21, 2021 Wide Input 5 V, 50 mA, Automotive Regulator with Output Short-to-Battery Protection and Power OK A4480 SELECTION GUIDE Part Number Temperature Range (°C) Package Leadframe Packing* A4480KLJTR-T –40 to 150 8-pin eSOIC with exposed thermal pad Matte Tin 3000 pieces per 7-in. reel *Contact Allegro for additional packing options. ABSOLUTE MAXIMUM RATINGS* Characteristic Symbol VIN, ENB, CP1 VCP2, VREG, VPOK Notes VIN, VENB, VCP1 VCP2, VREG, VPOK VOUT VOUT Independent of VIN Rating Unit −0.3 to 40 V −0.3 to 20 V −1 to 40 V Junction Temperature Range TJ −40 to 165 °C Storage Temperature Range Tstg −40 to 150 °C *Stresses beyond those listed in this table may cause permanent damage to the device. The absolute maximum ratings are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the Electrical Characteristics table is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. THERMAL CHARACTERISTICS*: May require derating at maximum conditions; see application section for optimization Characteristic Package Thermal Resistance (Junction to Ambient) Symbol RθJA Test Conditions* Value Unit eSOIC-8 with thermal pad (LJ) package on 4-layer PCB based on JEDEC standard 35 °C/W *Additional thermal information available on the Allegro website. Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 2 CP1 VIN CP2 Wide Input 5 V, 50 mA, Automotive Regulator with Output Short-to-Battery Protection and Power OK A4480 Charge Pump FOLDBACK VREG Short to VBAT Protection 5V LDO LDO2 VOUT Vcc ENB POK VOUT UV/OV OCP TSD GND Figure 2: Functional Block Diagram Pinout Diagram Terminal List Table Number 8 VREG VIN 1 CP1 2 CP2 3 POK 4 PAD 7 VOUT 6 GND 5 ENB Name Function 1 VIN Connection for input voltage. Connect a 2.2 µF capacitor from this pin to GND. Keep capacitor close to A4480. 2 CP1 Internal charge pump flying capacitor connection, connect a 0.47 µF ceramic capacitor from this pin to the CP2 pin. Keep capacitor close to A4480. 3 CP2 Internal charge pump flying capacitor connection, use a 0.47 µF capacitor to CP1. 4 POK Open-drain active-high Power OK signal. Use a 100 kΩ pull-up resistor to system IO rail or VOUT. 5 ENB Regulator active high enable input. Can be connected to VIN or logic level signal. 6 GND Ground pin. 7 VOUT Regulated output pin. It is recommended to use a 4.7 µF ceramic capacitor from this pin to GND. Keep capacitor close to A4480. 8 VREG Charge pump output which is input to internal linear regulator. Connect a 2.2 µF ceramic capacitor from this pin to GND. Keep capacitor close to A4480. Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 3 Wide Input 5 V, 50 mA, Automotive Regulator with Output Short-to-Battery Protection and Power OK A4480 ELECTRICAL CHARACTERISTICS [1]: Valid at 3.5 V ≤ VIN ≤ 28 V, −40°C ≤ TJ ≤ 150°C, unless otherwise specified Characteristics Symbol Test Conditions Min. Typ. Max. Units INPUT VOLTAGE Operating Input Voltage VIN ENB high and after VIN > 6.0 V 3.5 13.5 28 V VIN UVLO Start Voltage VIN(START) VIN rising, ENB high 3.1 – 3.45 V VIN UVLO Stop Voltage VIN(STOP) VIN falling, ENB high 2.6 – 2.9 V VIN UVLO Hysteresis VIN(HYS) VIN(START) – VIN(STOP) – 0.6 – V IQ VIN = 13.5 V, ENB high – 4 – mA IQ(SLEEP) VIN = 13.5 V, ENB low – 1 10 µA ENB high, 5 mA ≤ IOUT ≤ 50 mA, VIN = 3.95 V 5.25 – 7 V ENB high, 5 mA ≤ IOUT ≤ 33 mA, VIN = 3.5 V 5.25 – 7 V – 325 – kHz INPUT CURRENT Input Quiescent Current [1] Input Sleep Supply Current [1] CHARGE PUMP Output Voltage VREG Switching Frequency fSW Doubler to Pass Through Switchover VDOUBLER(H) VIN rising 7.8 – 8.65 V Pass Through to Step Down Switchover VSTEPDOWN(H) VIN rising 11.5 – 12.45 V Step Down to Pass Through Switchover VSTEPDOWN(L) VIN falling 10.5 – 11.7 V Pass Through to Doubler Switchover VDOUBLER(L) VIN falling 6.9 – 7.5 V 5 mA ≤ IOUT ≤ 50 mA, 3.95 V ≤ VIN ≤ 28 V 4.9 5.0 5.1 V 5 mA ≤ IOUT ≤ 33 mA, 3.5 V ≤ VIN < 3.95 V 4.9 5.0 5.1 V 3 – 10 µF tSTART COUT ≤ 4.7 µF, Load = 125 Ω ±5% (50 mA) 1.4 2.2 3.0 ms VENB(H) VENB rising – – 2.0 V VENB(L) VENB falling 5 V LINEAR REGULATOR Accuracy and Load Regulation Output Capacitance Range [2] Startup Time [2] VOUT COUT LOGIN ENABLE (ENB) INPUT ENB Threshold ENB Resistance ENB Filter/Deglitch Time 0.8 – – V RENB – 100 – kΩ td(EN,FILT) 10 15 20 µs Continued on next page... Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 4 Wide Input 5 V, 50 mA, Automotive Regulator with Output Short-to-Battery Protection and Power OK A4480 ELECTRICAL CHARACTERISTICS (continued) [1]: Valid at 3.5 V ≤ VIN ≤ 28 V, −40°C ≤ TJ ≤ 150°C, unless otherwise specified OVERCURRENT PROTECTION (OCP) Current Limit [1] ILIM VOUT = 5 V −60 −100 –140 mA IFBK VOUT = 0 V −15 −30 −45 mA Thermal Shutdown Threshold [2] TTSD TJ rising 165 − − °C Thermal Shutdown Hysteresis [2] THYS − 15 − °C 5.15 5.33 5.50 V Foldback Current [1] THERMAL PROTECTION (TSD) VOUT OV/UV PROTECTIONS VOUT OV Thresholds VOUT OV Hysteresis VOV(H) VOUT rising, VIN = 13.5 V VOV(L) VOUT falling, VIN = 13.5 V – 5.30 – V VOV(H) – VOV(L), VIN = 13.5 V 15 – 50 mV V VOV(HYS) VOUT UV Thresholds VOUT UV Hysteresis VUV(H) VOUT rising, VIN = 13.5 V – 4.71 – VUV(L) VOUT falling, VIN = 13.5 V 4.50 4.68 4.85 V VUV(H) – VUV(L), VIN = 13.5 V 15 – 50 mV VOUT rising, VIN = 13.5 V – 7.2 – V ENB high, VIN ≥ 3.5 V, IPOK = 1 mA – 150 400 mV VPOK = 3.3 V – – 35 µA Applies to undervoltage of the VOUT voltages 10 15 20 µs VUV(HYS) VOUT Output Disconnect Threshold VDISC POK OUTPUTS POK Output Low Voltage VPOK(L) POK Leakage Current [1] IPOK(LKG) OV and UV Filter/Deglitch [1] [2] Times [2] td(FILT) For input and output current specifications, negative current is defined as coming out of the node or pin (sourcing), positive current is defined as going into the node or pin (sinking). Ensured by design and characterization, not production tested. Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 5 Wide Input 5 V, 50 mA, Automotive Regulator with Output Short-to-Battery Protection and Power OK A4480 Figure 3: Output Current Derating versus Input Voltage VIN ENB VIN(STOP) VENB(H) VIN(START) td(EN,FILT) VENB(L) VDISC VOV(H) VUV(H) VOV(L) VUV(L) VOUT POK td(filt) td(filt) Figure 4: Timing Diagram (not to scale) Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 6 Wide Input 5 V, 50 mA, Automotive Regulator with Output Short-to-Battery Protection and Power OK A4480 D1 U1 1 VIN C1 2.2 µF GND 2 SW1 C2 0.47 µF 3 4 Optional* D2 BZX 84-C24 BAS 16 VIN VREG 8 CP1 VOUT CP2 POK A4480 PAD GND ENB C3 2.2 µF 7 VOUT 6 C4 4.7 µF 5 R1 100 kΩ GND POK ENB * Diodes D1 and D2 are only required if A4480 must be enabled when VIN is greater than 28 V. If A4480 is already enabled before VIN is greater than 28 V or if A4480 is off then operation to 40 V is possible without D1 and D2 diodes. Figure 5: Typical Application Schematic Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 7 Wide Input 5 V, 50 mA, Automotive Regulator with Output Short-to-Battery Protection and Power OK A4480 PERFORMANCE DATA 5.10 5.06 5.08 5.05 5.04 Output Voltage (V) Output Voltage (V) 5.06 5.04 5.02 5.00 4.98 4.96 5.03 5.02 5.01 5 4.94 Vin = 3.5V 4.99 Vin = 13V 4.92 4.90 3 8 13 18 23 28 4.98 0.00 Vin = 28V 0.01 Input Voltage (V) 80% 18 70% 16 60% 14 50% 40% 30% 20% 0% 0.00 Vin = 13V 0.01 0.02 0.03 Output Current (A) Typical Efficiency 0.04 0.05 0.04 12 10 8 6 4 Vin = 3.5V 10% 0.03 Load Regulation Temperature Rise (°C) Efficicency Line Regulation at 50 mA 0.02 Output Current (A) 2 0.05 0 0 5 10 15 20 25 30 Input Voltage (V) Estimated Temperature Rise Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 8 A4480 Wide Input 5 V, 50 mA, Automotive Regulator with Output Short-to-Battery Protection and Power OK PCB LAYOUT GUIDELINES The A4480 contains a switching charge pump circuit, so care must be taken when placing this part on the system PCB. The four decoupling capacitors (C1, C2, C3, and C4) must be placed as close to the A4480 as possible. Figure 6 below shows the recommend layout. The input capacitor C1 is placed next to pin 1 of the A4480 (U1). It connects directly to the pin 6 using copper on the top side of the PCB. The charge pump flying capacitor (C2) connects directly to pins 2 and 3 of A4480. The VREG capacitor connects to pins 8 and 6; top-side copper should only be used for this connection. The output capacitor (C4) connects to pins 7 and 8. Figure 6: Typical Layout of the A4480 The vias under the A4480 are recommended for improved thermal performance. The ground copper plane should be a large as possible to reduce the junction to ambient thermal impedance of the A4480. Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 9 Wide Input 5 V, 50 mA, Automotive Regulator with Output Short-to-Battery Protection and Power OK A4480 PACKAGE OUTLINE DRAWING For Reference Only – Not for Tooling Use (Reference Allegro DWG-0000380, Rev. 2 and JEDEC MS-012BA) Dimensions in millimeters – NOT TO SCALE Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown 4.90 ±0.10 8° 0° 8 0.25 0.17 B 3.90 ±0.10 2.41 NOM 6.00 ±0.20 A 1.04 REF 1 2 1.27 0.40 3.30 NOM 0.25 BSC Branded Face SEATING PLANE GAUGE PLANE C 8× 0.10 1.73 MAX C 0.51 0.31 SEATING PLANE XXXXXXXX Date Code Lot Number 0.15 0.00 1.27 BSC 1.27 0.65 D 8 Lines 1, 2 = 8 characters. Line 3 = 6 characters. 1.75 2.41 1 2 3.30 C Standard Branding Reference View Line 1: Part Number Line 2: Logo A, 4 digit Date Code Line 3: Characters 5, 6, 7, 8 of Assembly Lot Number 5.60 A Terminal #1 mark area B Exposed thermal pad (bottom surface) C Reference land pattern layout (reference IPC7351 SOIC127P600X175-9AM); all pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and PCB layout tolerances; when mounting on a multilayer PCB, thermal vias at the exposed thermal pad land can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5) D Branding scale and appearance at supplier discretion PCB Layout Reference View Figure 7: Package LJ, 8-Pin eSOIC Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 10 Wide Input 5 V, 50 mA, Automotive Regulator with Output Short-to-Battery Protection and Power OK A4480 Revision History Number Date Description – June 1, 2017 Initial release 1 July 10, 2017 Updated Charge Pump Output Voltage test conditions (page 4), Accuracy and Load Regulation test conditions (page 4), and Figure 3 (page 6). 2 July 5, 2018 Minor editorial updates 3 July 12, 2019 Minor editorial updates 4 July 21, 2021 Updated Package Outline Drawing (page 10) Copyright 2021, Allegro MicroSystems. Allegro MicroSystems reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of Allegro’s product can reasonably be expected to cause bodily harm. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use. Copies of this document are considered uncontrolled documents. For the latest version of this document, visit our website: www.allegromicro.com Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 11