A4985SETTR-T

A4985 DMOS Microstepping Driver with Translator and Overcurrent Protection Features and Benefits ▪ ▪ ▪ ▪ ▪ ▪ ▪ ▪ ▪ ▪ ▪ ▪ ▪ Low RDS(ON) outputs Automatic current decay mode detection/selection Mixed and Slow current decay modes Synchronous rectification for low power dissipation Internal UVLO Crossover-current protection 3.3 and 5 V compatible logic supply Thin profile QFN and TSSOP packages Thermal shutdown circuitry Short-to-ground protection Shorted load protection Low current Sleep mode, < 10 μA No smoke no fire (NSNF) compliance (ET package) Approximate size Description The A4985 is a complete microstepping motor driver with built-in translator for easy operation. It is designed to operate bipolar stepper motors in full-, half-, quarter-, and eighth-step modes. Step modes are selectable by MSx logic inputs. It has an output drive capacity of up to 35 V and ±1 A. The A4985 includes a fixed off-time current regulator which has the ability to operate in Slow or Mixed decay modes. The ET package meets customer requirements for no smoke no fire (NSNF) designs by adding no-connect pins between critical output, sense, and supply pins. So, in the case of a pin-to-adjacent-pin short, the device does not cause smoke or fire. Additionally, the device does not cause smoke or fire when any pin is shorted to ground or left open. The translator is the key to the easy implementation of the A4985. Simply inputting one pulse on the STEP input drives the motor one microstep. There are no phase sequence tables, high frequency control lines, or complex interfaces to program. The A4985 interface is an ideal fit for applications where a complex microprocessor is unavailable or is overburdened. During stepping operation, the chopping control in the A4985 automatically selects the current decay mode, Slow or Mixed. Continued on the next page… Packages: with exposed thermal pad 4 mm × 4 mm × 0.75 mm (ES package) 24-contact QFN with exposed thermal pad 5 mm × 5 mm × 0.90 mm (ET package) 24-pin TSSOP with exposed thermal pad (LP Package) 32-contact QFN Typical Application Diagram VDD 0.22 μF VREG ROSC VDD 5 kΩ Microcontroller or Controller Logic SLEEP STEP MS1 MS2 DIR ENABLE RESET VREF GND 0.1 μF 0.1 μF 0.22 μF CP1 CP2 VCP VBB1 VBB2 OUT1A 100 μF A4985 OUT1B SENSE1 OUT2A OUT2B SENSE2 GND 4985-DS A4985 DMOS Microstepping Driver with Translator and Overcurrent Protection Description (continued) In Mixed decay mode, the device is set initially to a fast decay for a proportion of the fixed off-time, then to a slow decay for the remainder of the off-time. Mixed decay current control results in reduced audible motor noise, increased step accuracy, and reduced power dissipation. Internal synchronous rectification control circuitry is provided to improve power dissipation during PWM operation. Internal circuit protection includes: thermal shutdown with hysteresis, undervoltage lockout (UVLO), and crossover-current protection. Special power-on sequencing is not required. The A4985 is supplied in three surface mount packages: two QFN packages, the 4 mm × 4 mm, 0.75 mm nominal overall height ES package, and the 5 mm × 5 mm × 0.90 mm ET package. The LP package is a 24-pin TSSOP. All three packages have exposed pads for enhanced thermal dissipation, and are lead (Pb) free (suffix –T), with 100% matte tin plated leadframes. Selection Guide Part Number A4985SESTR-T A4985SETTR-T A4985SLPTR-T Package 24-contact QFN with exposed thermal pad 32-contact QFN with exposed thermal pad 24-pin TSSOP with exposed thermal pad Packing 1500 pieces per 7-in. reel 1500 pieces per 7-in. reel 4000 pieces per 13-in. reel Absolute Maximum Ratings Characteristic Load Supply Voltage Output Current Logic Input Voltage Logic Supply Voltage VBBx to OUTx Sense Voltage Reference Voltage Operating Ambient Temperature Maximum Junction Storage Temperature VSENSE VREF TA TJ(max) Tstg Range S Symbol VBB IOUT VIN VDD Notes Rating 35 ±1 –0.3 to 5.5 –0.3 to 5.5 35 0.5 5.5 –20 to 85 150 –55 to 150 Units V A V V V V V ºC ºC ºC Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 2 A4985 DMOS Microstepping Driver with Translator and Overcurrent Protection Functional Block Diagram 0.22 F VREG ROSC CP1 0.1 F CP2 VDD Current Regulator OSC Charge Pump VCP 0.1 F DMOS Full Bridge REF DAC VBB1 OUT1A OUT1B PWM Latch Blanking Mixed Decay OCP SENSE1 Gate Drive Control Logic OCP STEP DIR RESET MS1 MS2 PWM Latch Blanking Mixed Decay DAC Translator DMOS Full Bridge VBB2 RS1 OUT2A OUT2B ENABLE SLEEP SENSE2 RS2 VREF Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 3 A4985 DMOS Microstepping Driver with Translator and Overcurrent Protection Symbol Test Conditions Operating During Sleep Mode Operating Source Driver, IOUT = –800 mA Sink Driver, IOUT = 800 mA Source Diode, IF = –800 mA Sink Diode, IF = 800 mA fPWM < 50 kHz Operating, outputs disabled Sleep Mode fPWM < 50 kHz Outputs off Sleep Mode Min. 8 0 3.0 – – – – – – – – – – VDD0.7 VIN = VDD0.7 – –20 –20 – – 5 0.7 20 23 0 –3 – – – 100 1.1 – – 2.7 – Typ.2 – – – 700 700 – – – – – – – – – –