A4986

A4986 DMOS Dual Full-Bridge PWM Motor Driver with Overcurrent Protection Features and Benefits ▪ ▪ ▪ ▪ ▪ ▪ ▪ ▪ ▪ ▪ ▪ Low RDS(ON) outputs Internal mixed current decay mode Synchronous rectification for low power dissipation Internal UVLO Crossover-current protection 3.3 and 5 V compatible logic supply Thin profile QFN and TSSOP packages Thermal shutdown circuitry Short-to-ground protection Shorted load protection Low current Sleep mode, < 10 μA Description The A4986 is a dual DMOS full-bridge stepper motor driver with parallel input communication and overcurrent protection. Each full-bridge output is rated up to 35 V and ±2 A. The A4986 includes fixed off-time pulse width modulation (PWM) current regulators, along with 2- bit nonlinear DACs (digital-to-analog converters) that allow stepper motors to be controlled in full, half, and quarter steps. The PWM current regulator uses the Allegro® patented mixed decay mode for reduced audible motor noise, increased step accuracy, and reduced power dissipation. Internal synchronous rectification control circuitry is provided to improve power dissipation during PWM operation. Package: The outputs are protected from shorted load and short-toground events, which protect the driver and associated circuitry from thermal damage or flare-ups. Other protection features include thermal shutdown with hysteresis, undervoltage lockout (UVLO) and crossover current protection. Special power-up sequencing is not required. The A4986 is supplied in a 24-pin TSSOP (LP) with exposed thermal pad for enhanced thermal performance. It has a 0.65 pitch and an overall package height of ≤1.2 mm. It is lead (Pb) free, with 100% matte tin leadframe plating. Approximate size 24-pin TSSOP with exposed thermal pad (LP Package) Typical Application Diagram VDD 0.22 μF VREG ROSC VDD Microcontroller or Controller Logic CP1 CP2 VCP VBB1 VBB2 OUT1A SLEEP IN01 IN02 PH1 IN11 IN12 PH2 VREF GND GND OUT2A OUT2B SENSE2 100 μF 0.1 μF 0.1 μF 0.22 μF A4986 OUT1B SENSE1 4986-DS A4986 DMOS Dual Full-Bridge PWM Motor Driver with Overcurrent Protection Selection Guide Part Number A4986SLPTR-T Package 24-pin TSSOP with exposed thermal pad Packing 4000 pieces per 13-in. reel Absolute Maximum Ratings Characteristic Load Supply Voltage Output Current Logic Input Voltage Logic Supply Voltage VBBx to OUTx Sense Voltage Reference Voltage Operating Ambient Temperature Maximum Junction Storage Temperature VSENSE VREF TA TJ(max) Tstg Range S Symbol VBB IOUT VIN VDD Notes Rating 35 ±2 –0.3 to 5.5 –0.3 to 5.5 35 0.5 5.5 –20 to 85 150 –55 to 150 Units V A V V V V V ºC ºC ºC Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 2 A4986 DMOS Dual Full-Bridge PWM Motor Driver with Overcurrent Protection Functional Block Diagram 0.1 μF Rosc VREG 0.22 μF REGULATOR OSC CHARGE PUMP VCP CP1 CP2 0.1 μF DMOS FULL-BRIDGE 1 VBB1 Sense2 To VBB2 - DAC OSC OCP + OUT1A PWM Latch BLANKING Mixed Decay VREF OUT1B VDD IN01 IN02 PH1 IN11 IN12 PH2 SLEEP CONTROL LOGIC GATE DRIVE SENSE1 DMOS FULL-BRIDGE 2 VBB2 OCP OUT2A PWM Latch BLANKING Mixed Decay OSC VCP VREG VREG OUT2B REF VREF Sense2 Sense2 GND GND SENSE2 - + VREF DAC Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 3 A4986 DMOS Dual Full-Bridge PWM Motor Driver with Overcurrent Protection Symbol Test Conditions Operating During Sleep Mode Operating Source Driver, IOUT = –1.5 A Sink Driver, IOUT = 1.5 A Source Diode, IF = –1.5 A Sink Diode, IF = 1.5 A fPWM < 50 kHz Operating, outputs disabled Sleep Mode fPWM < 50 kHz Outputs off Sleep Mode Min. 8 0 3.0 – – – – – – – – – – VDD0.7 VIN = VDD0.7 – –20 –20 – As a % of VDD OSC = VDD or GND ROSC = 25 kΩ – 5 0.7 20 23 0 –3 – – – 100 2.1 – – 2.7 – Typ.2 – – – 320 320 – – – – – – – – – –