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A4987

A4987

  • 厂商:

    ALLEGRO(埃戈罗)

  • 封装:

  • 描述:

    A4987 - DMOS Dual Full-Bridge PWM Motor Driver With Overcurrent Protection - Allegro MicroSystems

  • 数据手册
  • 价格&库存
A4987 数据手册
A4987 DMOS Dual Full-Bridge PWM Motor Driver With Overcurrent Protection Features and Benefits ▪ ▪ ▪ ▪ ▪ ▪ ▪ ▪ ▪ ▪ ▪ Low RDS(ON) outputs Internal mixed current decay mode Synchronous rectification for low power dissipation Internal UVLO Crossover-current protection 3.3 and 5 V compatible logic supply Thin profile QFN and TSSOP packages Thermal shutdown circuitry Short-to-ground protection Shorted load protection Low current Sleep mode, < 10 μA Description The A4987 is a dual DMOS full-bridge stepper motor driver with parallel input communication and overcurrent protection. Each full-bridge output is rated up to 35 V and ±1 A. The A4987 includes fixed off-time pulse width modulation (PWM) current regulators, along with 2- bit nonlinear DACs (digital-to-analog converters) that allow stepper motors to be controlled in full, half, and quarter steps. The PWM current regulator uses the Allegro® patented mixed decay mode for reduced audible motor noise, increased step accuracy, and reduced power dissipation. Internal synchronous rectification control circuitry is provided to improve power dissipation during PWM operation. The outputs are protected from shorted load and short-toground events, which protect the driver and associated circuitry from thermal damage or flare-ups. Other protection features include thermal shutdown with hysteresis, undervoltage lockout (UVLO) and crossover current protection. Special power-up sequencing is not required. The A4987 is supplied in two packages, a 24-contact QFN (ES) and a 24-pin TSSOP (LP). Both packages have exposed thermal pads for enhanced thermal performance. The 24-contact ES is 4 mm × 4 mm, with a nominal overall package height of 0.75 mm. The 24-pin LP is a TSSOP with 0.65 pitch and an overall package height of ≤1.2 mm. Both packages are lead (Pb) free, with 100% matte tin leadframe plating. Packages: 24-contact QFN 4 mm × 4 mm × 0.75 mm (ES package) Approximate size 24-pin TSSOP with exposed thermal pad (LP Package) Typical Application Diagram VDD 0.22 μF VREG ROSC VDD CP1 CP2 VCP 0.1 μF 0.1 μF 0.22 μF VBB1 VBB2 OUT1A 100 μF Microcontroller or Controller Logic SLEEP IN01 IN02 PH1 IN11 IN12 PH2 VREF A4987 OUT1B SENSE1 OUT2A OUT2B GND GND SENSE2 4987-DS, Rev. 5 A4987 DMOS Dual Full-Bridge PWM Motor Driver With Overcurrent Protection Selection Guide Part Number A4987SESTR-T A4987SLPTR-T Package 24-pin QFN with exposed thermal pad 24-pin TSSOP with exposed thermal pad Packing 1500 pieces per 7-in. reel 4000 pieces per 13-in. reel Absolute Maximum Ratings Characteristic Load Supply Voltage Output Current Logic Input Voltage Logic Supply Voltage Motor Outputs Voltage Sense Voltage Reference Voltage Operating Ambient Temperature Maximum Junction Storage Temperature VSENSE VREF TA TJ(max) Tstg Range S Symbol VBB IOUT VIN VDD Notes Rating 35 ±1 –0.3 to 5.5 –0.3 to 5.5 –2.0 to 37 –0.5 to 0.5 5.5 –20 to 85 150 –55 to 150 Units V A V V V V V ºC ºC ºC Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 2 A4987 DMOS Dual Full-Bridge PWM Motor Driver With Overcurrent Protection Functional Block Diagram 0.1 μF Rosc VREG 0.22 μF REGULATOR OSC CHARGE PUMP VCP CP1 CP2 0.1 μF DMOS FULL-BRIDGE 1 VBB1 Sense2 To VBB2 - DAC OSC OCP + OUT1A PWM Latch BLANKING Mixed Decay VREF OUT1B VDD IN01 IN02 PH1 IN11 IN12 PH2 SLEEP CONTROL LOGIC GATE DRIVE SENSE1 DMOS FULL-BRIDGE 2 VBB2 OCP OUT2A PWM Latch BLANKING Mixed Decay OSC VCP VREG VREG OUT2B REF VREF Sense2 Sense2 GND GND SENSE2 - + VREF DAC Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 3 A4987 DMOS Dual Full-Bridge PWM Motor Driver With Overcurrent Protection Symbol Test Conditions Operating During Sleep Mode Operating Source Driver, IOUT = –800 mA Sink Driver, IOUT = 800 mA Source Diode, IF = –800 mA Sink Diode, IF = 800 mA fPWM < 50 kHz Operating, outputs disabled Sleep Mode fPWM < 50 kHz Outputs off Sleep Mode Min. 8 0 3.0 – – – – – – – – – – VDD0.7 VIN = VDD0.7 – –20 –20 – – 5 0.7 20 23 0 –3 – – – 100 1.1 – – 2.7 – Typ.2 – – – 700 700 – – – – – – – – – –
A4987 价格&库存

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