A8285SLBTR

A8285 and A8287 LNB Supply and Control Voltage Regulator Features and Benefits Description • LNB selection and standby function • Provides up to 500 mA load current • Two-wire serial I2C interface • Built-in tone oscillator, factory-trimmed to 22 kHz; facilitates DiSEqC™ 2.0 encoding • Auxiliary modulation input • 22 kHz tone detector facilitates DiSEqC™ decoding (A8287 only) • Tracking switch-mode power converter for lowest dissipation • LNB overcurrent protection and diagnostics • Internal overtemperature protection • LNB voltages (16 possible levels) compatible with all common standards Intended for analog and digital satellite receivers, the LNB (low noise block) converter regulator is a monolithic linear and switching voltage regulator, specifically designed to provide power and interface signals to an LNB downconverter, via coaxial cable. The device uses a 2-wire bidirectional serial interface, compatible with the I2C (Inter-C bus) standard, that operates up to 400 kHz. The A8285 is supplied in a 16-lead plastic power SOIC with internally fused leads for thermal dissipation. The A8287 is supplied in a 24-lead plastic power SOIC with internally fused leads. Both devices are also available in lead (Pb) free versions, with 100% matte tine leadframe plating. Packages 16-pin SOIC (A8285) 24-pin SOIC (A8287) Functional Block Diagram V IN C10 100 nF L1 C1 33 µF VREG 220 nF C5 33 µH VIN C3 D1 Internal Regulator C2 LX VCP BOOST Feedback C4 100 µF 100 nF 100 nF BOOST Charge Pump OSC In VPUMP Boost Converter Overcurrent OSC DISABLE 100 mV EXTM R3 R4 R5 VDD Clock Divider LNB 22 kHz Tone Generator Tracking Regulator SDA ADD A8285-DS, Rev. F D2 L2 33 µH 1.5 µF C7 220 nF C6 TCAP Output Voltage Select SCL IRQ R1 15 Ω Fault Monitor Overcurrent TSD Undervoltage Overcurrent 6.8 nF C8 GM TOUT 220 Ω R2 TDI 10 nF C9 22 kHz Tone Detector R6 TDO VDD A8285 and A8287 LNB Supply and Control Voltage Regulator Selection Guide Part Number Pb-free Package Description A8285SLB A8285SLB-T – 16-pin SOIC Tone detect not provided Yes 16-pin SOIC Tone detect not provided – 24-pin SOIC All features Yes 24-pin SOIC All features A8287SLB A8287SLB-T Absolute Maximum Ratings Characteristic Load Supply Voltage Symbol Notes Rating Unit 16 V Internally Limited – LNB, BOOST –0.3 to 28 V TOUT –0.3 to 22 V EXTM –0.3 to 5 V VIN Output Current IOUT Output Voltage – Logic Input – Logic Output – Package Power DIssipation – Output current rating may be limited by duty cycle, ambient temperature, and heat sinking. Under any set of conditions, do not exceed the specified current rating or a junction temperature of +150°C Other See power dissipation information in the Application Information section –0.3 to 7 V –0.3 to 7 V – – Operating Temperature Ambient TA –20 to 85 ºC Junction TJ –20 to 150 ºC Storage TS –55 to 150 ºC Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 2 A8285 and A8287 LNB Supply and Control Voltage Regulator Tone detector and leads TDI and TDO are not provided in 16-pin package (A8285). ID C1 C2, C5,C10 C4 Characteristics 33 μF, 25 V, esr < 200 mΩ, Iripple > 350 mA Nichicon, part number UHC1E330MET 100 nF, 50 V, X5R or X7R 100 μF, 35 V, esr < 75 mΩ, Iripple> 800 mA C3,C6 220 nF, 50 V, X5R or X7R C7 1.5 μF, 50 V, X5R or X7R C8 6.8 nF, 50 V; Y5V, X5R, or X7R C9 10 nF (maximum), 50 V; Y5V, X5R, or X7R R1 15 , 1%, c W R2 220 , 1%, 2 W R3-R6 Suggested Manufacturer Nichicon, part number UHC1V101MPT Value determined by VDD, bus capacitance. etc. L1 33 μH, IDC > 1.3 A TDK, part number TSL0808-330K1R4 L2 33 μH, IDC > 0.5 A TDK, part number TSL0808-330K1R4 D1 1 A, 35 V or 40 V, Schottky diode Various, part number 1N5819; Sanken, part number AW04 D2 1 A, 100 V, 1N4002 Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 3 A8285 and A8287 LNB Supply and Control Voltage Regulator ELECTRICAL CHARACTERISTICS at TA = +25°C, VIN = 10 to 16 V (unless otherwise noted) Characteristics Symbol Set-point Accuracy, load and line regulation VO1 Relative to target voltage selected, with: ILOAD = 0 to 500 mA ICC Supply Current Boost Switch-On Resistance ICCEN Test Conditions Min. Typ. Max. Units -4.5 0 4.5 % ENB = Low, LNB output disabled – – 7 mA ENB = High, LNB output enabled, ILOAD = 0mA – – 15 mA – 400 500 m RDSBOOST TJ = 25 °C, ILOAD = 500mA Switching Frequency fo – 320 352 384 kHz Switch Current Limit – VIN = 12 V 2.0 3 4.0 A VBOOST – VLNB, no tone signal, ILOAD = 500 mA 400 600 800 mV –12.5 –10 –7.5 μA Linear Regulator Voltage Drop Slew Rate Current on TCAP VREG ICAP Charging Discharging 7.5 10 12.5 μA – 500 – μs Output Voltage Slew Period tslew VLNB = 13 to 18 V, TCAP = 6.8 nF, ILOAD = 500 mA Output Reverse Current IOR ENB = Low, VLNB = 28 V with C4 fully charged – 1 5 mA Ripple and Noise on LNB Output VRN See notes 1 and 2 – – 50 mVpp Overcurrent Limit ILIM High limit Low limit 550 400 700 500 850 600 mA mA Overcurrent Disable Time tDIS – 1.2 – 1.7 ms Protection Circuitry VIN Undervoltage Threshold UVOFF Guaranteed turn-off 8.65 9.15 9.65 V VIN Turn-On Threshold UVON Guaranteed turn-on 8.75 9.25 9.75 V – 77 85 93 %VLNB PNGreset – 82 90 98 %VLNB Power-Not-Good Flag Set Power-Not-Good Flag Reset PNGset Thermal Shutdown Threshold TJ See note 1 – 165 – °C Thermal Shutdown Hysteresis TJ See note 1 – 20 – °C Continued on next page Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 4 A8285 and A8287 LNB Supply and Control Voltage Regulator ELECTRICAL CHARACTERISTICS (continued) at TA = +25°C, VIN = 10 to 16 V (unless otherwise noted) Characteristics Symbol Test Conditions Min. Typ. Max. Units Tone Characteristics Tone Frequency fTONE – 20 22 24 kHz Tone Pull-Down Current ITONE – 30 40 50 mA tDEL Using EXTM pin – – 1 μs VIH – 2 – – V VIL IIL – – – –1 – – 0.8 1 V μA Tone Turn-On and Turn-Off Delays External Tone Logic Input Input Leakage Tone Detector Input Amplitude VTDI fIN = 22 kHz 260 – 1000 mV Tone Detector Frequency Capture fTDI 600 mVpp sinewave 17.6 – 26.4 kHz Tone Detector Input Impedance ZTDI See note 1 – 8.6 – k Tone Detector Output Voltage VOL Tone present, ILOAD = 3 mA – – 0.4 V Tone Detector Output Leakage IOL Tone absent, VO = 7 V – – 10 A Logic Input (SDA,SCL) Low Level VIL – – – 0.8 V Logic Input (SDA,SCL) High Level VIH – 2 – – V VHYS – – 150 – mV –10 VOUT + VD + ΔVREG. Note that worst case dissipation in this case occurs at maximum input voltage. PTOT = Pd_control + Pd_lin where: × Pd_control = 15 mA VIN Pd_lin = (VIN – VD – VOUT ) × ILOAD Step 4. Determine the thermal impedance required in the solution: Status (Read) Register Table 2 and it rises by 2.7 mΩ/ºC with respect to the specified figure, RDSBOOST(25ºC), when Tj equals 25ºC. Reserved RØJA = (TJ – TA) / PTOT The RØJA for one or two layer PCBs can be estimated from the RØJA vs. Area charts on the following page. Note: For maximum effectiveness, the PCB area underneath the IC should be filled copper and connected to pins 4 and 13 for A8285, and pins 6, 7, 18, and 19 for A8287. Where a PCB with two or more layers is used, apply thermal vias, placing them adjacent to each of the above pins, and underneath the IC. Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 12 A8285 and A8287 LNB Supply and Control Voltage Regulator Layout Considerations Recommended placement of critical components and tracking for the A8287 is shown in the PCB Layout digagram on the following page. It is recommended that the ground plane be separated into two areas, referred to as switcher and control, on each layer using a ground plane. With respect to the input connections, VIN and 0V, the two ground plane areas are isolated as shown by the dotted line and the ground plane areas are connected together at pins 6, 7, 18, and 19. This configuration minimizes the effects of the noise produced by the switcher on the noise-sensitive sections of the circuit. Power-related tracking from INPUT to L1, LNB (pin 17) to L2 then OUTPUT, LX (pin 20) to D1 and L1, VBOOST (pin 23) to C4 and D1 should be as short and wide as possible. Power components such as the boost diode D1, inductor L1, and input/ output capacitors C1, C9, and C4, should be located as close as possible to the IC. The DiSEqC inductor L2 should be located as far away from the boost inductor L1 to prevent potential magnetic crosstalk. The filter capacitor (VREG), charge pump capacitor (VCP), ac coupling tone detect capacitor (TDI), tone pull-down resistor (TOUT), and LNB output capacitor/protection diode (LNB) should be located directly next to the appropriate pin. Where a PCB with two or more layers is used, it is recommended that four thermal vias be deployed as shown in the PCB Layout diagram. Note that adding additional vias does not enhance the thermal characteristics. Example. Given: VIN = 12 V VOUT = 18 V ILOAD = 500 mA Two-layer PCB. Maximum ambient temperature = 70 ºC, Maximum allowed junction temperature= 110 ºC Assume: VD= 0.4 V and select ΔVREG= 0.7 V D = 1 – (12 / (18 + 0.4 + 0.7) = 0.37 × 0.5 / (0.89 × 12) = 843 mA RDSBOOST = 0.5 + (110 – 25) × 2.7 mΩ= 730 mΩ IPK = 18 Worst case losses can now be estimated: Pd_Rds = 0.8432 × 0.73 × 0.37 = 192 mW Pd_sw = 70 mW Pd_control = 15 mA Pd_lin = 0.7 × VIN = 180 mW × 0.5 = 350 mW and therefore PTOT = 0.192 + 0.07 + 0.18 + 0.35 = 0.792 W The thermal resistance required is: (110 – 70) / 0.792 = 50.5ºC/W Note: For the case of the A8287, the area of copper required on each layer is approximately 1.2 in2. RØJA vs. Area Charts A8285, 16-Pin SOIC A8287, 24-Pin SOIC 80 One side Copper Thermal Resistance One side Copper Two side Copper 90 80 70 60 50 (ºC /W) (0C/W) Thermal Resistance 0 Thermal Resistance Thermal Resistance (ºC /W) ( C/W) 100 Two side Copper 70 60 50 40 40 0 1 2 2 2 Area Area (in. (in ) ) 3 4 0 1 2 Area Area (in. (in2)2) 3 4 Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 13 A8285 and A8287 LNB Supply and Control Voltage Regulator PCB Layout Diagram VIN (INPUT) 0V Control 0V Tracking Switcher 0V 0V Plane C9 C2 Thermal Via Cut in 0V Plane C4 + C1 + C5 Note that to add additional connections, e.g. SCL, SDA, IRQ, VIN, EXTM, ADD, TDO, and TDI, some modifications to the control ground plane will be necessary. Refer to Functional Block diagram for circuit connections. C3 1 24 2 23 3 22 D1 4 21 + 5 20 6 19 7 18 8 17 9 16 10 15 11 14 12 C8 L1 R1 Control 0V L2 OUTPUT C7 C6 0V D2 + 13 Control 0V Power-on Reset I2C Sequence VIN VREG IRQ SDA S T ADR R A READ Master Responds to IRQ Reads Status VUV = 1 A READ N S P S T ADR W A WRITE A S P Master Writes Enables output VUV = 0 VUV reset Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 14 A8285 and A8287 LNB Supply and Control Voltage Regulator Overtemperature and Overcurrent I2C Sequences Response to Overtemperature fault condition using multiple byte read LNB Output Disabled TJMAX TJMAX-TJ Overtemperature TJ LNB ouput enabled IRQ S T SDA ADR R A READ A READ A READ A READ Master Responds to IRQ Reads Status continuously TSD = 1 DIS = 1 A READ N S P S T TSD = 0 DIS = 1 ADR W A WRITE A S P Master Writes Re-enables LNB output TSD reset Response to Overcurrent fault condition using single byte read LNB output disabled VLNB ILNB LNB output enabled IRQ SDA S T ADR R A READ N S P Master Responds to IRQ Reads Status OCP = 1 DIS = 1 S T ADR W A Master Writes Re-enables LNB output WRITE A S P S T ADR R A READ N S P Master Polls Reads Status OCP = 0 DIS = 0 OCP reset Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 15 A8285 and A8287 LNB Supply and Control Voltage Regulator Terminal List Table Pin Name Pin Description A8287SLB SOIC-24 A8285SLB SOIC-16 SCL I2C Clock Input 1 1 SDA I2C 2 2 Data Input/Output IRQ Interrupt Request GND Ground VREG VIN EXTM 3 3 4,5,6,7 4 Analog Supply 8 5 Supply Input Voltage 9 6 External Modulation Input 10 7 ADD Address Select 11 8 TDO Tone Detect Out 12 - TDI Tone Detect Input 13 - NC No Connection 14 9 TCAP Capacitor for setting the rise and fall time of the LNB output 15 10 TOUT Tone Generation 16 11 LNB Output voltage to LNB GND Ground LX GND BOOST VCP Inductor drive point 17 12 18,19 13 20 14 21,22 - Tracking supply voltage to linear regulator 23 15 Gate supply voltage 24 16 Ground Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 16 A8285 and A8287 LNB Supply and Control Voltage Regulator A8285SLB 16-Pin Batwing SOIC .406 10.31 .398 10.11 8º 0º 16 .011 0.28 .009 0.23 .299 7.59 .291 7.39 .040 1.02 .020 0.51 .414 10.52 .398 10.11 1 2 .020 0.51 .014 0.36 .104 2.64 .096 2.44 .050 1.27 BSC .026 0.66 REF .012 0.30 .004 0.10 Dimensions in inches Metric dimensions (mm) in brackets, for reference only Leads 4 and 13 are connected inside the device package. A8287SLB 24-Pin Batwing SOIC .606 15.39 .598 15.19 24 8º 0º 19 18 .011 0.28 .009 0.23 .299 7.59 .291 7.39 .040 1.02 .020 0.51 .414 10.52 .398 10.11 1 .020 0.51 .014 0.36 .026 0.66 REF 2 6 7 .050 1.27 BSC .104 2.64 .096 2.44 .012 0.30 .004 0.10 Dimensions in inches Metric dimensions (mm) in brackets, for reference only Leads 6, 7, 18 and 19 are connected intside the device package. NOTES: 1. Exact body and lead configuration at vendor’s option within limits shown. 2. Lead spacing tolerance is non-cumulative. 3. Supplied in standard sticks/tubes of 49 devices or add “TR” to part number for tape and reel. Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 17 A8285 and A8287 LNB Supply and Control Voltage Regulator I2C™ is a trademark of Philips Semiconductors. DiSEqC™ is a registered trademark of Eutelsat S.A. Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro products are not authorized for use as critical components in life-support devices or systems without express written approval. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use. Copyright©2003-2013 AllegroMicroSystems, LLC For the latest version of this document, visit our website: www.allegromicro.com Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 18