Preliminary Data Sheet Subject to Change without Notice January 21, 2004
A8285/A8287
Intended for analog and digital satellite receivers, the LNB (low noise block) converter regulator is a monolithic linear and switching voltage regulator, specifically designed to provide power and interface signals to an LNB downconverter, via coaxial cable. The device uses a 2-wire bidirectional serial interface, compatible with the I2C (Inter-C bus) standard, that operates up to 400 kHz. The A8285 is supplied in a 16-lead plastic power SOIC with copper batwing tabs (suffix LB). The A8287 is supplied in a 24-lead plastic power SOIC with copper batwing tabs (part number suffix LB).
Data Sheet 27448.003c
LNB Supply and Control Voltage Regulator
SCL
1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9
VCP BOOST LX GND LNB TOUT TCAP NC
A8285SlB SOIC
SDA IRQ GND VREG VIN
Scale 1:1
EXTM ADD
SCL
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
VCP BOOST GND GND LX GND GND LNB TOUT TCAP NC TDI
A8287SlB SOIC
SDA IRQ GND GND GND GND VREG VIN EXTM ADD TDO
Scale 1:1
FEATURES
LNB selection and standby function Provides up to 500 mA load current Two-wire serial I2C interface Built-in tone oscillator, factory-trimmed to 22 kHz; facilitates DiSEqC™ 2.0 encoding Auxiliary modulation input 22 kHz tone detector facilitates DiSEqC™ decoding (A8287 only) Tracking switch-mode power converter for lowest dissipation LNB overcurrent protection and diagnostics Internal overtemperature protection LNB voltages (16 possible levels) compatible with all common standards
ABSOLUTE MAXIMUM RATINGS
Load Supply Voltage, VIN....................................16 V Output Current, IOUT .................. Internally Limited* Output Voltage LNB, BOOST .....................–0.3 V to 28 V TOUT ................................. –0.3 V to 22 V Logic Input EXTM ...................................–0.3 V to 5 V Other .................................... –0.3 V to 7 V Logic Output ........................................ –0.3 V to 7 V Package Power Dissipation ………..See power dissipation information in the Application Information section Operating Temperature Ambient, TA ....................... –20°C to +85°C Junction, TJ....................... –20°C to +150°C Storage,TS ....................... –55°C to +150°C * Output current rating may be limited by duty cycle, ambient temperature, and heat sinking. Under any set of conditions, do not exceed the specified current rating or a junction temperature of +150°C.
Use the following complete part numbers when ordering:
Part Number A8287SLB A8285SLB Package 24-pin, batwing SOIC 16-pin, batwing SOIC Description All features Tone detect not provided
Data Sheet Preliminary 27448.003c
A8285/A8287 LNB Supply and Control Voltage Regulator
Functional Block Diagram
V IN C10 100 nF C1 33 uF L1 33 uH D1 C5 100 nF C2 100 nF C4 100 uF
VIN VREG C3 220 nF Internal Regulator OSC In Boost Converter
LX
VCP
BOOST
BOOST Feedback
Charge Pump VPUMP Overcurrent
OSC EXTM 100 mV
DISABLE
R1 15 Ω L2 220 uH 220 nF C7 220 nF C6
R3 R4 R5 VDD SDA SCL ADD
Clock Divider
22 kHz Tone Generator
LNB
Tracking Regulator
D2 TCAP
I C Interface
2
Output Voltage Select
GM TOUT TDI
6.8 nF C8 220Ω R2 10 nF C9 R6 TDO VDD
IRQ
Fault Monitor Overcurrent TSD Undervoltage
Overcurrent
22 kHz Tone Detector
Tone detector and leads TDI and TDO are not provided in 16-pin package (A8285).
ID
C1 C2, C5,C10 C4 C3,C6,C7 C8 C9 R1 R2 R3-R6 L1 L2 D1 D2
Characteristics
33 µF, 25 V, esr < 200 mΩ, Iripple > 350 mA 100 nF, 50 V, X5R or X7R 100 µF, 35 V, esr < 75 mΩ, Iripple> 800 mA 220 nF, 50 V, X5R or X7R 6.8 nF, 50 V; Y5V, X5R, or X7R 10 nF (maximum), 50 V; Y5V, X5R, or X7R 15 Ω, 1%, c W 220 Ω, 1%, 2 W Value determined by VDD, bus capacitance. etc. 33 µH, IDC > 1.3 A 220 µH, IDC > 0.5 A 1 A, 35 V or 40 V, Schottky diode 1 A, 100 V, 1N4002
Suggested Manufacturer
Nichicon, part number UHC1E330MET Nichicon, part number UHC1V101MPT
TDK, part number TSL0808-330K1R4; Coilcraft, part number DR0810-333 TDK, part number TSL0808-221KR54; Coilcraft, part number DR0810-224 Various, part number 1N5819; Sanken, part number AW04
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Data Sheet Preliminary 27448.003c
A8285/A8287 LNB Supply and Control Voltage Regulator
ELECTRICAL CHARACTERISTICS at TA = +25°C, VIN = 10 to 16 V (unless otherwise noted)
Characteristics Set-point Accuracy, load and line regulation Supply Current Boost Switch-On Resistance Switching Frequency Switch Current Limit Linear Regulator Voltage Drop Slew Rate Current on TCAP Output Voltage Slew Period Output Reverse Current Ripple and Noise on LNB Output Protection Circuitry Overcurrent Limit Overcurrent Disable Time VIN Undervoltage Threshold VIN Turn-On Threshold Power-Not-Good Flag Set Power-Not-Good Flag Reset Thermal Shutdown Threshold Thermal Shutdown Hysteresis ILIM tDIS UVOFF UVON PNGset High limit Low limit – Guaranteed turn-off Guaranteed turn-on – 550 400 1.2 8.65 8.75 77 82 – – 700 500 – 9.15 9.25 85 90 165 20 850 600 1.7 9.65 9.75 93 98 – – mA mA ms V V %VLNB %VLNB °C °C Symbol VO1 ICC ICCEN Test Conditions Relative to target voltage selected, with: ILOAD = 0 to 500 mA ENB = Low, LNB output disabled ENB = High, LNB output enabled, ILOAD = 0mA Min. -4.5 – – – 320 2.0 400 –12.5 7.5 – – – Typ. 0 – – 400 352 3 600 –10 10 500 1 – Max. 4.5 7 15 500 384 4.0 800 –7.5 12.5 – 5 50 Units % mA mA mΩ kHz A mV µA µA µs mA mVpp
RDSBOOST TJ = 25 °C, ILOAD = 500mA fo – ∆VREG ICAP tslew IOR VRN – VIN = 12 V VBOOST – VLNB, no tone signal, ILOAD = 500 mA Charging Discharging VLNB = 13 to 18 V, TCAP = 6.8 nF, ILOAD = 500 mA ENB = Low, VLNB = 28 V with C4 fully charged See notes 1 and 2
PNGreset – TJ ∆TJ See note 1 See note 1
Continued on next page
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Data Sheet Preliminary 27448.003c
A8285/A8287 LNB Supply and Control Voltage Regulator
ELECTRICAL CHARACTERISTICS (continued) at TA = +25°C, VIN = 10 to 16 V (unless otherwise noted)
Characteristics
Tone Characteristics
Symbol fTONE ITONE tDEL VIH VIL IIL VTDI fTDI ZTDI VOL IOL VIL VIH VHYS IIN VOL IOL fCLK tOF tBUF tHD:STA tSU:STA tLOW tHIGH tSU:DAT tHD:DAT tSU:STO – –
Test Conditions
Min. 20 30 – 2 – –1 260 17.6 – – –
Typ. 22 40 – – – – – – 8.6 – –
Max. 24 50 1 – 0.8 1 1000 26.4 – 0.4 10
Units kHz mA µs V V µA mV kHz kΩ V µA
Tone Frequency Tone Pull-Down Current Tone Turn-On and Turn-Off Delays External Tone Logic Input Input Leakage Tone Detector Input Amplitude Tone Detector Frequency Capture Tone Detector Input Impedance Tone Detector Output Voltage Tone Detector Output Leakage I C Interface
2
Using EXTM pin – – – fIN = 22 kHz 600 mVpp sinewave See note 1 Tone present, ILOAD = 3 mA Tone absent, VO = 7 V – – – VIN = 0 V to 7 V ILOAD = 3 mA VO = 0 V to 7 V – VIH to VIL See I2C Interface Timing Diagram See I2C Interface Timing Diagram See I2C Interface Timing Diagram See I C Interface Timing Diagram
2 2
Logic Input (SDA,SCL) Low Level Logic Input (SDA,SCL) High Level Input Hysteresis Logic Input Current Output Voltage (SDA, IRQ) Output Leakage (SDA, IRQ) SCL Clock Frequency Output Fall Time Bus Free Time Between Stop and Start Hold Time for Start Condition Setup Time for Start Condition SCL Low Time SCL High Time Data Setup Time Data Hold Time Setup Time for Stop Condition
– 2 – –10 – – 0 – 1.3 0.6 0.6 1.3 0.6 100 0 0.6
– – 150 VOUT + VD + ∆VREG. Note that worst case dissipation in this case occurs at maximum input voltage.
PTOT = Pd_control + Pd_lin
×[ I
LOAD
/ (0.89
×V
IN
)]
where: (c) Estimate boost RDS (RDSBOOST ) at maximum running junction temperature. RDSBOOST is a function of junction temperaPd_control = 15 mA
×V
IN
Pd_lin = (VIN – VD – VOUT )
×I
LOAD
Status (I2C Read) Register Table
Bit
0 1 2 3 4 5 6 7 VUV PNG DIS
Step 4. Determine the thermal impedance required in the solution:
RØJA = (TJ – TA) / PTOT
Name
TSD OCP Overcurrent Reserved Reserved
Function
Thermal Shutdown
The RØJA for one or two layer PCBs can be estimated from the RØJA vs. Area charts on the following page. Note: For maximum effectiveness, the PCB area underneath the IC should be filled copper and connected to pins 4 and 13 for A8285, and pins 6, 7, 18, and 19 for A8287. Where a PCB with two or more layers is used, apply thermal vias, placing them adjacent to each of the above pins, and underneath the IC.
Power Not Good LNB output disabled Reserved VIN Undervoltage
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Data Sheet Preliminary 27448.003c
A8285/A8287 LNB Supply and Control Voltage Regulator
Example. Given: VIN = 12 V VOUT = 18 V ILOAD = 500 mA Two-layer PCB. Maximum ambient temperature = 70 ºC, Maximum allowed junction temperature= 110 ºC Assume: VD= 0.4 V and select ∆VREG= 0.7 V
D = 1 – (12 / (18 + 0.4 + 0.7) = 0.37 IPK = 18 RDSBOOST
Note: For the case of the A8287, the area of copper required on each layer is approximately 1.2 in2. Layout Considerations Recommended placement of critical components and tracking for the A8287 is shown in the PCB Layout digagram on the following page. It is recommended that the ground plane be separated into two areas, referred to as switcher and control, on each layer using a ground plane. With respect to the input connections, VIN and 0V, the two ground plane areas are isolated as shown by the dotted line and the ground plane areas are connected together at pins 6, 7, 18, and 19. This configuration minimizes the effects of the noise produced by the switcher on the noise-sensitive sections of the circuit. Power-related tracking from INPUT to L1, LNB (pin 17) to L2 then OUTPUT, LX (pin 20) to D1 and L1, VBOOST (pin 23) to C4 and D1 should be as short and wide as possible. Power components such as the boost diode D1, inductor L1, and input/output capacitors C1, C9, and C4, should be located as close as possible to the IC. The DiSEqC inductor L2 should be located as far away from the boost inductor L1 to prevent potential magnetic crosstalk. The filter capacitor (VREG), charge pump capacitor (VCP), ac coupling tone detect capacitor (TDI), tone pull-down resistor (TOUT), and LNB output capacitor/protection diode (LNB) should be located directly next to the appropriate pin. Where a PCB with two or more layers is used, it is recommended that four thermal vias be deployed as shown in the PCB Layout diagram. Note that adding additional vias does not enhance the thermal characteristics.
× 0.5 / (0.89 × 12) = 843 mA = 0.5 + (110 – 25) × 2.7 mΩ= 730 mΩ × 0.73 × 0.37 = 192 mW ×V
IN
Worst case losses can now be estimated:
Pd_Rds = 0.8432
Pd_sw = 70 mW Pd_control = 15 mA Pd_lin = 0.7 = 180 mW
× 0.5 = 350 mW
and therefore
PTOT = 0.192 + 0.07 + 0.18 + 0.35 = 0.792 W
The thermal resistance required is:
(110 – 70) / 0.792 = 50.5ºC/W
RØJA vs. Area Charts A8285, 16-Pin SOIC
100
A8287, 24-Pin SOIC
80
One side Copper
Thermal Resistance
Thermal Resistance
Thermal Resistance ( C/W) (ºC /W)
90 80 70 60 50 40 0 1 2
(ºC /W) Thermal Resistance (0C/W)
One side Copper Two side Copper
70
Two side Copper
0
60
50
40
3 4
0
1
Area (in2) 2) Area (in.
2 Area (in2)2) Area (in.
3
4
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115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
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Data Sheet Preliminary 27448.003c
A8285/A8287 LNB Supply and Control Voltage Regulator
PCB Layout Diagram
0V Control 0V Switcher 0V VIN (INPUT) Tracking 0V Plane C9 C2 C4 + C5 1 2 3 4 5 24 23 22 21 20 19 18 17 16 15 14 C8 13 Control 0V
D2 D1
Thermal Via Cut in 0V Plane
C1
+
+
L1 R1
Note that to add additional connections, e.g. SCL, SDA, IRQ, VIN, EXTM, ADD, TDO, and TDI, some modifications to the control ground plane will be necessary. Refer to Functional Block diagram for circuit connections.
6 C3 7 8 9 10 11 12
Control 0V L2 C6 C7 0V OUTPUT
+
Power-on Reset I2C Sequence
VIN
VREG
IRQ SDA
S T ADR RA READ A READ N S P S T ADR WA W RITE A S P
Master Responds to IRQ Reads Status VUV = 1
Master Writes Enables output VUV = 0 VUV reset
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Data Sheet Preliminary 27448.003c
A8285/A8287 LNB Supply and Control Voltage Regulator
Overtemperature and Overcurrent I2C Sequences
Response to Overtemperature fault condition using multiple byte read
LNB Output Disabled
TJMAX TJMAX-∆TJ
Overtemperature
TJ
IRQ SDA
S T ADR RA READ A READ A READ A READ A READ TSD = 0 DIS = 1 TSD reset NS P S T ADR
LNB ouput enabled
WA
W RITE
AS P
Master Responds to IRQ Reads Status continuously TSD = 1 DIS = 1
Master Writes Re-enables LNB output
Response to Overcurrent fault condition using single byte read
LNB output disabled
VLNB
ILNB
LNB output enabled IRQ SDA
S T ADR RA READ NS P S T ADR WA W RITE AS P S T ADR RA READ NS P
Master Responds to IRQ Reads Status OCP = 1 DIS = 1
Master Writes Re-enables LNB output
Master Polls Reads Status OCP = 0 DIS = 0
OCP reset
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Data Sheet Preliminary 27448.003c
A8285/A8287 LNB Supply and Control Voltage Regulator
Terminal List Table
A8287SLB SOIC-24 1 2 3 4,5,6,7 8 9 10 11 12 13 14 15 16 17 18,19 20 21,22 23 24 A8285SLB SOIC-16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Pin Name SCL SDA IRQ GND VREG VIN EXTM ADD TDO TDI NC TCAP TOUT LNB GND LX GND BOOST VCP I2C Clock Input I2C Data Input/Output Interrupt Request Ground Analog Supply Supply Input Voltage External Modulation Input Address Select Tone Detect Out Tone Detect Input No Connection
Pin Description
Capacitor for setting the rise and fall time of the LNB output Tone Generation Output voltage to LNB Ground Inductor drive point Ground Tracking supply voltage to linear regulator Gate supply voltage
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Data Sheet Preliminary 27448.003c
A8285/A8287 LNB Supply and Control Voltage Regulator
A8285SLB 16-Pin Batwing SOIC
.406 10.31 .398 10.11 16 8” 0” .011 0.28 .009 0.23
.299 7.59 .291 7.39 .414 10.52 .398 10.11 .040 1.02 .020 0.51
1
2
.020 0.51 .014 0.36 .026 0.66 REF
.050 1.27 BSC
.104 2.64 .096 2.44 .012 0.30 .004 0.10
Dimensions in inches Metric dimensions (mm) in brackets, for reference only
Leads 4 and 13 are connected inside the device package.
A8287SLB 24-Pin Batwing SOIC
.606 15.39 .598 15.19 24 19 18 8” 0” .011 0.28 .009 0.23
.299 7.59 .291 7.39 .414 10.52 .398 10.11 .040 1.02 .020 0.51
1
2
6
7
.020 0.51 .014 0.36 .026 0.66 REF
.050 1.27 BSC
.104 2.64 .096 2.44 .012 0.30 .004 0.10
Dimensions in inches Metric dimensions (mm) in brackets, for reference only
Leads 6, 7, 18 and 19 are connected intside the device package. NOTES: 1. Exact body and lead configuration at vendor’s option within limits shown. 2. Lead spacing tolerance is non-cumulative. 3. Supplied in standard sticks/tubes of 49 devices or add “TR” to part number for tape and reel.
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Data Sheet Preliminary 27448.003c
A8285/A8287 LNB Supply and Control Voltage Regulator
Purchase of I2C components of Allegro MicroSystems or one of its sublicensed Associated Companies, conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips. DiSEqC™ is a registered trademark of Eutelsat S.A. The products described here are manufactured under one or more U.S. patents or U.S. patents pending. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro products are not authorized for use as critical components in life-support devices or systems without express written approval. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use.
Copyright©2003 AllegroMicrosystems, Inc.
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