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A8434EESTR-T

A8434EESTR-T

  • 厂商:

    ALLEGRO(埃戈罗)

  • 封装:

    WFQFN16

  • 描述:

    IC LED DRVR RGLTR DIM 30MA 16QFN

  • 数据手册
  • 价格&库存
A8434EESTR-T 数据手册
A8434 6-Channel High Efficiency Charge Pump White LED Driver Features and Benefits ▪ Proprietary adaptive control scheme (1×, 1.5×, 2×) ▪ 0.5% typical WLED current matching ▪ Drives up to 6 white LEDs ▫ Main display backlight (up to 6 WLEDs) ▫ Main display and sub display backlight ▫ Main display and low-current flash/torch ▪ 30 mA per WLED ▪ 2× serial dimming interfaces ▪ 320 mA charge pump capability ▪ Low EMI design and soft start function ▪ Short circuit, overvoltage, thermal shutdown protection ▪ 0.75 mm nominal height (very thin profile), 3 × 3 mm footprint packages Description The A8434 high efficiency charge pump ICs offer a simple, low-cost WLED (white LED) driver solution for driving up to six WLEDs in various application configurations, either all six backlighting a single display, or for multiple displays, such as four WLEDs as the main display backlight, with the other two WLEDs used for backlighting a sub display or a low-current flash/torch. Using a proprietary control scheme (1×, 1.5×, and 2×), the A8434 can deliver well-matched WLED current while maintaining the highest efficiency and low EMI. The WLED current is regulated over the entire range of Li+ battery voltage to provide uniform intensity. WLED brightness and on/off can be controlled for the main display and sub display/torch through 2 single-wire serial interface pins. The A8434 is available in an QFN/MLP-16 space-conserving (3 × 3 mm footprint) ES package. Applications include: ▪ ▪ ▪ ▪ White LED backlights for cellular phones, PDAs Digital cameras, camcorders Portable audio devices and MP3s Other portable device white LED backlighting Package: 16 pin QFN/MLP (suffix ES) Approximate scale 1:1 Typical Applications VBATT 2.7 to 5.5 V VIN CIN 1 µF C1 1 µF C1+ C1– C2 1 µF VOUT LED1 LED2 D1 D2 D3 D4 D5 D6 ENS GND LED6 VBATT 2.7 to 5.5 V VIN CIN 1 µF C1 1 µF C1+ C1– VOUT LED1 D1 D2 D3 D4 D5 D6 ENS GND LED6 COUT 1 µF RSET On/Off and Dimming Control CIN 1 μF COUT 1 µF VIN VIN C1+ C1– VOUT LED1 LED2 D1 D2 D3 D4 D5 D6 C2+ A8434 LED3 C2– LED4 ISET ENM LED5 C2+ A8434 LED3 C2– LED4 ISET ENM ENS GND LED5 LED6 RSET On/Off and Dimming Control VIN>Vf(max)+0.2 V, Vf = LED forward drop Figure 1.6 × 30 mA WLED display C2 1 µF LED2 C2+ A8434 LED3 C2– LED4 ISET ENM LED5 Figure 3. High efficiency current sink RSET On/Off and Dimming Control D1-D4 Main Display; D5-D6 Sub Display Figure 2. 4 × 30 mA main with 2 × 30 mA sub display 8434-DS, Rev. 1 A8434 6-Channel High Efficiency Charge Pump White LED Driver Functional Block Diagram C1 1 μF C1+ C1 − C2+ C2 1 μF C2− VIN Fractional Charge Pump (1×, 1.5×, and 2×) CIN 1 μF ENM Control, Clock, and Reference Minimum Select + − VOUT COUT 1 μF ENS LED1 LED2 LED3 Current Mirror LED4 LED5 LED6 + − ISET + − + − + − + − + − + − RSET GND Absolute Maximum Ratings Input or Output Voltage VIN, VOUT, C1+, C1– , C2+, C2– to GND ..................... –0.3 to 6 V All other pins..................................................... –0.3 to VIN + 0.3 V VOUT Short Circuit to GND .................................................... Continuous Operating Ambient Temperature, TA ..................................... –40°C to 85°C Junction Temperature, TJ(max).............................................................. 150°C Storage Temperature, TS ................................................... –55°C to 150°C Part Number A8434EESTR-T Package Thermal Characteristics ES Package RθJA = 68 °C/W (vendor data, on 4-layer PCB; unverified) Additional information is available on the Allegro website. The device package is lead (Pb) free, with 100% matte tin leadframe plating. Use the following complete part number when ordering: Packaging* 7-in. reel, 1500 pieces/reel Package Type ES, 3 × 3 mm MLP-16 *Contact Allegro for additional packing options. Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 2 A8434 6-Channel High Efficiency Charge Pump White LED Driver Pin-out Diagram ES Package 16 C1+ 15 C2– C2+ VOUT ISET ENS 1 2 3 4 5 6 7 8 EP 13 C1– 12 GND 11 LED1 10 LED2 9 LED3 LED4 ENM LED6 (Top View) Terminal List Table Name C1– C1+ C2– C2+ ENS ENM EP GND ISET LED1, LED2, LED3, and LED4 LED5 and LED6 VIN VOUT Number 13 16 15 1 4 5 – 12 3 8, 9, 10, and 11 6 and 7 14 2 Function Negative terminal of capacitor C1. Connect capacitor C1 between C1+ and C1–. Positive terminal of capacitor C1. Negative terminal of capacitor C2 Positive terminal of capacitor C2. Connect capacitor C2 between C2+ and C2–. Enable and dimming control input for sub display WLED group. Enable and dimming control input for main display WLED group. Exposed metal pad on bottom side. Connect this to ground plane for better thermal performance. Ground. Connect RSET resistor to ground to set desired constant current through main and sub WLEDs. ILED(max) = 220 x 0.6 V / RSET Current sink for main display WLEDs. If not used, connect to VOUT, but do not leave open. If left open, the IC works in 2 × mode. Current sink for sub display WLEDs. If not used, connect to VOUT, but do not leave open. If left open, the IC works in 2 × mode. Power supply voltage input. Charge pump output voltage for display backlight and flash/torch LED anodes. Connect a 1 μF capacitor, COUT, between VOUT and GND (see figure 2). LED5 14 VIN Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 3 A8434 6-Channel High Efficiency Charge Pump White LED Driver ELECTRICAL CHARACTERISTICSa VIN = ENM = ENS = 3.6 V, C1 = C2 = 1 μF, CIN = COUT = 1 μF, RSET = 6.49 kΩ, TA = –40°C to +85°C; typical values are at TA = 25°C; unless otherwise noted Characteristics Input Voltage Range Undervoltage Lockout Threshold UVLO Hysteresis Window Quiescent Current Soft-start Completion Time ISET Bias Voltage ISET Leakage in Shutdown ISET Current Range ISET to LEDx Current Ratio for LED1 through LED6 ILED Accuracy for LED1 through LED6b LED Current Matching for LED1 through LED4c LED Current Matching for LED5 and LED6c Regulation Voltage at LEDx (1.5× and 2× modes) 1× mode to 1.5× or 1.5× to 2× mode transition voltage at LEDx Transition–Dropout Deltad Open Loop Output Resistancee Symbol VIN VUVLO VUVLOHYS IQ tss VISETBIAS VISETLKG ISET ILEDx/IISET EILEDERR ΔILED14 ΔILED56 VREG Vtrans ΔVdr ROUT VLEDLKG fosc Vovp VIH VIL IIH IIL tLO tHI tINIHI tSHDN TTSD First ENM or ENS pulse after shutdown Falling edge of ENS and/or ENM 20oC hysteresis Open circuit at any LED that is programmed to be in the ON state Input high logic threshold Input low logic threshold VIH=VIN VIL= GND VIN falling Switching in 1.5× or 2.0× mode; TA = 25°C ENS = ENM = GND; TA = 25°C Test Conditions Min. 2.7 2.25 – – – – – – 40 – – – – – – – – – – – – – 1.4 – – – 0.5 0.5 50 – – Typ. Max. Units – 5.5 V 2.45 60 6 0.1 0.4 0.6 0.01 – 220 ±1.6 ±0.5 ±0.5 250 150 40 1 2.5 5 0.01 1 – – – – – – – – 0.5 165 2.60 – – 2 – – 1 140 – – – – – – – – – – 1 – 6.0 – 0.4 1 1 250 – – – – V mV mA μA ms V μA μA A/A % % % mV mV mV Ω Ω Ω μA MHz V V V μA μA μs μs μs ms oC 100% setting, ISET = 60 μA ENS = ENM = VIN ENS = GND, ENM = VIN ENS = VIN, ENM = GND ENS = ENM = VIN VLEDx falling Measured as Vtrans – Vdropout 1× mode (VIN – VOUT) / IOUT 1.5× mode (1.5 × VIN – VOUT) / IOUT 2× mode (2 × VIN – VOUT) / IOUT ENS = ENM = GND, VIN = 5.5 V LED Leakage in Shutdown Oscillator Frequency Output Overvoltage Protection (guaranteed by design) ENS and ENM Input High Threshold ENS and ENM Input Low Threshold Input High Current Input Low Current ENM and ENS Pulse Low Time (figure 5) ENM and ENS Pulse High Time (figure 5) ENM and ENS Initial Pulse High Time (figure 5) Shutdown or Dimming Reset Delay Thermal Shutdown Threshold aSpecifications voltage is always less than 80 mV). for the range TA = –40°C to 85°C are guaranteed by design. bI accuracy is defined as ( ISET × 220 – ILEDAVG ) / (ISET × 220). LED cLED current matching is defined as (I LEDx – ILEDAVG) / ILEDAVG . dDropout voltage V dropout is defined as LEDx-to-GND voltage at which ILEDx drops 10% below the value of ILEDx when VLEDx = 300 eThe open loop output resistance, R OUT, for 1.5 × mode is measured when one of the LEDx pins is tied to ground or open (thus its mV. Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 4 A8434 6-Channel High Efficiency Charge Pump White LED Driver Tests performed using application circuit shown in figure 2 TA = 25°C, VIN = 3.6 V (unless otherwise noted) Performance Characteristics Efficiency versus Supply Voltage VIN falling, Vf = 3.4 V at 20 mA 100.0 95.0 90.0 85.0 Eff (%) 80.0 75.0 70.0 65.0 60.0 55.0 2.7 3.1 3.5 3.9 4.3 VIN (V) 4.7 5.1 5.5 100.0 95.0 Efficiency versus Supply Voltage VIN falling, Vf = 3.1 V at 10 mA Sub Eff (%) 90.0 85.0 80.0 75.0 70.0 65.0 60.0 55.0 50.0 2.7 3.1 3.5 Main Sub Main Main + Sub 3.9 VIN (V) 4.3 4.7 5.1 5.5 Main + Sub Logic Level 1.2 1.1 1.0 V ENx (V) RSET versus LED Current 30 VHI ILED per Channel (mA) 25 20 15 10 5 RSET = 6.65 kΩ RSET = 8.87 kΩ 0.9 0.8 0.7 0.6 0.5 2.7 3.1 3.5 3.9 4.3 VIN (V) 4.7 5.1 5.5 VLO 4 6 8 10 12 14 16 18 RSET (kΩ) Dimming on ENM and ENS Enable Pulses versus Total Current, LED1 through LED6 VENM and VENS C1 ILED1-6 C2 t Symbol C1 C2 t Parameter VENM ILED16 time Units/Division 0.5 V 50 mA 50 ms Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 5 A8434 6-Channel High Efficiency Charge Pump White LED Driver Tests performed using application circuit shown in figure 2 TA = 25°C, VIN = 3.6 V (unless otherwise noted) Performance Characteristics Turn ON LED1 through LED6 to 1X Mode VIN = 4.0 V, IOUT = 120 mA, VF = 3.4 V C2 VENM and VENS VOUT C1 IOUT C4 t Symbol C2 C1 C4 t Parameter VENM and VENS VOUT IOUT time Units/Division 5.00 V 2.00 V 100 mA 1 ms Turn ON LED1 through LED6 to 1.5X Mode VIN = 3.0 V, IOUT = 120 mA, VF = 3.4 V C2 VENM and VENS VOUT C1 IOUT C4 t Symbol C2 C1 C4 t Parameter VENM and VENS VOUT IOUT time Units/Division 5.00 V 2.00 V 100 mA 1 ms Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 6 A8434 6-Channel High Efficiency Charge Pump White LED Driver Tests performed using application circuit shown in figure 2 TA = 25°C, VIN = 3.6 V (unless otherwise noted) Performance Characteristics LED1 through LED6 ON, 2X Mode VIN = 2.7 V, IOUT = 120 mA, VF = 3.6 V VOUT(RIPPLE) C3 IIN(RIPPLE) C4 t Symbol C3 C4 t Parameter VOUT(RIPPLE) IIN(RIPPLE) time Units/Division 50 mV 50 mA 500 ns LED1 through LED6 ON, 1.5X Mode VIN = 3.6 V, IOUT = 120 mA, VF = 3.6 V VOUT(RIPPLE) LED1 through LED4 on, 1.5X Mode VIN = 3.6 V, IOUT = 80 mA, VF = 3.6 V VOUT(RIPPLE) C3 C3 IIN(RIPPLE) C4 C4 IIN(RIPPLE) t t Symbol C3 C4 t Parameter VOUT(RIPPLE) IIN(RIPPLE) time Units/Division 20 mV 50 mA 500 ns Symbol C3 C4 t Parameter VOUT(RIPPLE) IIN(RIPPLE) time Units/Division 20 mV 50 mA 500 ns Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 7 A8434 Setting LED Current 6-Channel High Efficiency Charge Pump White LED Driver Application Information Transitions Between 1.5× and 2× Modes The transition from 1.5× to 2× mode depends upon dropout conditions. When operating in 2× mode, the IC switches back to 1.5× mode every 130 ms, and then reenters 2× mode again if necessary. Furthermore, when in 2× mode, whenever a channel disabling is sensed (that is, whenever ENM is held low for > 0.5 ms with ENF high, or vice versa), the IC automatically reverts to 1.5× mode, and then reenters 2× mode again if necessary. Dimming Main Display LED1 through LED4 Dimming. The main display WLEDs (LED1 through LED4) brightness and on/off can be controlled using digital input at the ENM pin. The ENM pin accepts one-wire serial pulse input to enable the A8434 and to set up to 11 dimming levels, from 100% down to 5%. When ENM is initially pulled up from shutdown, after a softstart, the current for the WLEDs is programmed to 100% of the setting current, which is determined by the current through the ISET pin. Each subsequent pulse reduces the backlight LEDs current by 10%, and the 10th pulse reduces the current by 5%. The next pulse restores 100% (full) brightness. Figure 5 shows the timing diagram for ENM control. Use the following formula to set the display backlight LED full current (100%) using RSET on LED1 through LED6. The maximum current through one LED should not exceed 30 mA: RSET = 0.6 V × 220 / ILEDx where RSET is in Ω and ILEDx in amperes. Transitions Between 1× and 1.5× or 2× Modes The A8434 adaptively selects operating mode. When VIN is sufficiently high to maintain VLEDx > 150 mV, the A8434 operates in 1 × mode unless, as VIN drops, the LEDx nodes fall below the 150 mV threshold. When VLEDx falls below 150 mV, the IC enters 1.5× mode. When the A8434 switches from 1× to 2× mode, it first switches to 1.5× mode for a typical duration of 1 ms before entering 2× mode. When operating in 1.5× mode, if VOUT < VIN, then the IC switches back to 1× mode every 130 ms, and then reenters 1.5× mode again if necessary. 95.0 90.0 85.0 75.0 70.0 65.0 60.0 55.0 50.0 3.3 3.4 3.5 3.6 3.7 3.8 VIN Rising 3.9 80.0 VIN Falling Eff (%) 4.0 4.1 4.2 VIN (V) Figure 4. Mode change transition tHI(Init) 1 2 3 4 5 6 7 8 9 10 11 0 ENM or ENS tSS 100% IILEDx SHDN 90% 80% 70% t LO t HI 100% 90% tSHDN 60% 50% 40% 30% 20% 10% 5% SHDN or Dimming Reset Figure 5. Single-Wire Serial Dimming Control; at pins ENM and ENS. Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 8 A8434 6-Channel High Efficiency Charge Pump White LED Driver For example, if the IC should dim to 30%, this can be done with 7 steps, as shown in figure 5, irrespective of the dimming level in effect. This can be achieved by pulling corresponding ENx pin low for time greater than tSHDN and then applying pulses as shown in figure 5 (7 for 30% dimming). If the pulses are applied within 2-3 ms, the display flicker is not visible. The procedure is shown in figure 6. Shutdown When the ENM or ENS pin is pulled low for 0.5 ms or longer, the corresponding display channels are shut off and dimming is reset to 100% upon the next ENM or ENS going high edge. When both ENM and ENS are pulled low for 0.5 ms or longer, the A8434 enters the shutdown mode. Short Circuit Protection The A8434 is protected against short circuits on the output. When VOUT is externally pulled below 1.2 V, the IC enters short circuit mode. The A8434 resumes normal operation when the short circuit is removed. Sub Display LED5 and LED6 Operation. The sub display backlight LEDs (LED5 and LED6) brightness and on/off can be controlled using digital input at the ENS pin. The ENS pin accepts one-wire serial pulse input to enable the A8434 and to set up to 11 dimming levels, from 100% down to 5%. When ENS is initially pulled up from shutdown, after a soft-start, the current for the backlight LEDs is programmed to 100% of the setting current, which is determined by the current through the ISET pin. Each subsequent pulse reduces the LED current by 10%, and the 10th pulse reduces the current by 5%. The next pulse restores 100% (full) brightness. Figure 5 shows the timing diagram for ENS control. Simultaneous Dimming of All 6 LEDs For larger displays 6 LEDs can be grouped together. The LEDs LED1 through LED6 can be dimmed simultaneously by connecting ENM and ENS together and applying serial pulses for dimming, as shown in figure 1. Absolute Level Operation Some applications require dimming to a specific level, regardless of the present level of dimming. ∆t > tSHDN C1 ENx pulled low Rapid pulse pattern VENM Symbol C1 C2 C3 t Parameter VENM VOUT IOUT time Units/Division 2.00 V 2.00 V 50 mA 0.5 ms C2 VOUT 100% C3 ISET counter resets 30% IOUT t Figure 6. Absolute Dimming Level Setting. With ENM pulled low longer the tSHDN, pulsing the corresponding ENx pin sets an absolute target level. Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 9 A8434 Overvoltage Protection 6-Channel High Efficiency Charge Pump White LED Driver Note: In shutdown mode (ENM = ENS = 0 V for > 0.5 ms), the total leakage current is < 1μA. Thermal Shutdown The IC is internally protected against overtemperature. The overtemperature limit is set to 165°C nominal. The IC shuts down when the junction temperature exceeds 165°C and automatically turns on again when the IC cools. Component Selection Ceramic capacitors with X5R or X7R dielectric are recommended for the input capacitor, CIN, the output capacitor, COUT, and the charge pump capacitors, C1 and C2. The A8434 is protected up to 4.9 V supply voltage, against accidental overvoltage caused by an open LED. When any LED opens, VOUT will increase till 6 V. Remaining LEDs will continue to function normally. Normal operation will be resumed when the fault is removed. LED Disconnection Every LEDx pin has a disable subcircuit, as shown in figure 7. The A8434 compares the voltage on each LED pin, and if the voltage on the pin is greater than either VOUT – 0.4 V or VIN – 0.4 V, then the corresponding LED pin is disabled. If any WLED is not used, connect the corresponding pin to VOUT. Never leave open any unused WLED pin. LED pins will sink 20 μA typical when connected to VOUT and the corresponding LED group (main or sub) is enabled. A8434 VBATT CIN VIN 1×, 1.5×, 2× Charge Pump VOUT COUT LED Disable Block One of six blocks – + – + VOUT – 0.4 Current Sink VIN – 0.4 LED1 D1 D2 D3 D4 D5 D6 Figure 7. LED disable subcircuit. Subcircuit for one LEDx pin shown. A similar block is connected to each LEDx pin. Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 10 A8434 6-Channel High Efficiency Charge Pump White LED Driver Package ES, 3 × 3 mm16-Pin QFN/MLP 3.15 .124 2.85 .112 16 All dimensions reference only, not for tooling use (reference JEDEC MO-220WEED-4) Dimensions in millimeters U.S. Customary dimensions (in.) in brackets, for reference only Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown A Terminal #1 mark area B Exposed thermal pad (reference only, terminal #1 identifier appearance at supplier discretion) C Reference land pattern layout (reference IPC7351 QFN50P300X300X80-17W4M); adjust as necessary to meet application process requirements and PCB layout tolerances; when mounting on a multilayer PCB, thermal vias at the exposed thermal pad land can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5) 16X 0.08 [.003] C 16X 0.30 .012 0.18 .007 0.10 [.004] M C A B 0.05 [.002] M C 0.50 .020 0.50 .020 NOM 1 2 A B A 3.15 .124 2.85 .112 SEATING PLANE 0.80 .031 0.70 .028 0.20 .008 REF 0.05 .002 0.00 .000 C 0.30 .012 NOM 0.90 .035 NOM C 1 12X 0.20 .008 MIN 1.70 .067 NOM 16 1.70 .067 NOM 0.50 .020 0.30 .012 3.10 .122 NOM 2 1 16 0.23 x 0.23 .009 x .009 REF B 1.70 NOM .067 4X 0.20 .008 MIN 1.70 .067 NOM 3.10 .122 NOM 4X 0.20 .008 MIN Copyright ©2006, Allegro MicroSystems, Inc. The products described here are manufactured under one or more U.S. patents or U.S. patents pending. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the failure of that life support device or system, or to affect the safety or effectiveness of that device or system. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use. For the latest version of this document, visit our website: www.allegromicro.com Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 11
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