A8500

A8500 Flexible WLED/RGB Backlight Driver for Medium Size LCDs ▪ Active current sharing between LED strings for ±1.5% typical current matching and ±1.2% typical accuracy ▪ Drive up to 12 series × 8 parallel = 96 LEDs (Vf = 3.2 V, If = 20 mA) ▪ Flexible dimming, using alternative methods: ▫ LED duty cycle control (PWM pin) ▫ DC current using serial programming (EN pin) ▫ DC current using external PWM signal (APWM pin) ▫ An external resistor ▪ Boost converter with integrated 50 V, 2 A DMOS ▪ LED sinks rated for 30 mA ▪ 200 kHz to 2 MHz switching frequency ▪ Open LED disconnect ▪ Boost current limit, thermal shutdown, and soft start ▪ No audible ceramic capacitor noise during PWM dimming ▪ Adjustable overvoltage protection (OVP) ▪ No pull-up resistors required for LED modules that use ESD capacitors Features and Benefits Description Package: 26 pin QFN/MLP (suffix EC) The A8500 is a multi-output WLED driver for medium display backlighting. The A8500 integrates a boost converter and eight current-sinks to provide a flexible WLED/RGB backlight driver. The boost converter can provide output voltage up to 47 V. The flexible channel selection control and high voltage capability allow a wide range of LED backlight applications. The A8500 can support any application requiring 4 to 96 WLEDs. The boost converter is a constant frequency currentmode converter. Each LED channel can sink 30 mA, and channels can be paralleled for higher currents. Flexible dimming allows output channels to either run at an adjustable DC value or with externally controlled PWM duty cycles. The A8500 is available in a 26 pin, 4 mm × 4 mm QFN/MLP package that is only 0.75 mm nominal in height. Applications include: ▪ Thin notebook displays ▪ LCD TV ▪ RGB backlight ▪ GPS systems ▪ Portable DVD players Approximate Scale 1:1 Typical Application EN pin dimming: serial pulse train input VEN IOUT VS 5 V ±10% CIN 0.1 µF/ 10 V EN PWM APWM SKIP COMP CC RFSET RISET APWM pin dimming: analog PWM input VAPWM IOUT LED1 LED3 LED5 LED7 LGND FSET ISET VBAT 5 to 25 V L1 10 µH CBAT 1 µF/ 25 V VIN D1 ROVP OVP AGND COUT 2.2 µF 50 V SW SW PWM pin dimming: digital PWM input VPWM IOUT A8500 PGND VIN SEL3 SEL2 SEL1 LED2 LED8 LED6 LED4 Figure 1. LCD monitor backlight, driving 96 LEDs. LED Vf = 3.2 V, 20 mA per LED string. Overvoltage protection set to 45 V nominal (40.5 V minimum). Alternative dimming control pulse trains illustrated for EN, PWM, and APWM control. See also: Recommended Components table, page 14. 8500-DS A8500 Flexible WLED/RGB Backlight Driver for Medium Size LCDs Selection Guide A8500EECTR-T 4 mm × 4 mm QFN/MLP *Contact Allegro for additional packing options Part Number Package 1500 pieces / 7-in. reel Packing* Device package is lead (Pb) free, with 100% matte tin leadframe plating. Absolute Maximum Ratings Characteristic Symbol Notes Rating Units SW and OVP Pins LED1 through LED8 Pins VIN Pin Remaining Pins Operating Ambient Temperature Maximum Junction Temperature Storage Temperature TA TJ(max) Tstg Range E VIN –0.3 to 50 –0.3 to 23 –0.3 to 6 –0.3 to VIN+ 0.3 –40 to 85 150 –55 to 150 V V V V ºC ºC ºC Package Thermal Characteristics* Characteristic Symbol RθJA Note Measured on 3 in. × 3 in., 2-layer PCB Rating 48.5 Units °C/W Package Thermal Resistance *Additional information is available on the Allegro website Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 2 A8500 Flexible WLED/RGB Backlight Driver for Medium Size LCDs Functional Block Diagram VIN 5 V ±10% CIN COMP CC VIN VBAT 5 to 25 V CBAT L1 10 µH SW SW D1 VOUT COUT Reference and Soft Start SKIP FSET RFSET AGND EN 100 kΩ SEL1 SEL2 SEL3 PWM 100 kΩ ISET RISET APWM 100 kΩ Amp On/Off Serial Interface PWM Generator IOUT_SET 100 kΩ Feedback Loop OSC Current Sinks LGND PGND LGND – ∑ + – + – + RQ S ROVP PGND OVP LED1 LED2 LED3 LED4 LED5 LED6 LED7 LED8 Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 3 A8500 Characteristics Input Voltage Range Undervoltage Lockout Threshold UVLO Hysteresis Window Supply Current APWM Frequency Range Error Amplifier Error Amplifier Open Loop Gain Error Amplifier Unity Gain Bandwidth Error Amplifier Transconductance Error Amplifier Output Sink Current Error Amplifier Output Source Current Boost Controller AVEA UGBEA GmEA IEAsink IEAsource Symbol VIN VUVLO VUVLOhys ISUP fAPWM VIN falling Flexible WLED/RGB Backlight Driver for Medium Size LCDs Test Conditions Min. 4.2 – – Switching at no load, TA = 25°C Shutdown EN = PWM = APWM = VIL – – 20 – – ∆ICOMP = ±10 µA VLED1-8 = 1 V VLED1-8 = 0 V RFSET = 13 kΩ, SKIP = VIL – – – 1.8 – – – – 1.5 VI(pin) = 5 V, TA = 25°C – – 28 – – VVOP = 21 V ISW = 1.5 A VSW = 5 V, TA = 25°C VSW = 21 V – – – – 1.8 Typ. – – 0.2 5 0.1 – 60 3 850 280 –280 2 1 200 70 – – – – – 54.9 47.8 0.1 225 – 1 2 Max. 5.5 4 – – 1 2000 – – – – – 2.2 – – – 0.4 – 100 1 32 – – – – 1 – – Units V V V mA µA kHz dB MHz µA/V µA µA MHz MHz kHz ns V V µA µA V µA µA µA mΩ µA µA A ELECTRICAL CHARACTERISTICS, valid at TA = –40°C to 85°C, typical values at TA = 25°C, VIN = 5 V, unless otherwise noted Switching Frequency Minimum Switch Off-Time Input Voltage Level Low Input Voltage Level High Input Leakage Current (APWM, EN, PWM, and SKIP pins) Input Leakage Current (SELx pins) Over Voltage Protection (OVP) Output Overvoltage Rising Limit OVP Sense Current OVP Release Current OVP Leakage Current Boost Switch Switch On Resistance Switch Leakage Current Switch Current Limit fSW tOFFmin VIL VIH IIleak ISELleak VOVP IOVPH IOVPL IOVPleak Rds(on) ISWleak ISWlim RFSET = 26.1 kΩ, SKIP = VIL RFSET = 32.4 kΩ, SKIP = VIH Logic Input Levels (APWM , EN, MODE, PWM, SELx, and SKIP pins unless otherwise specified) Continued on the next page… Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 4 A8500 Flexible WLED/RGB Backlight Driver for Medium Size LCDs ELECTRICAL CHARACTERISTICS (continued), valid at TA = –40°C to 85°C, typical values at TA = 25°C, VIN = 5 V, unless otherwise noted Characteristics LED Current Sinks LEDx Regulation Voltage ISET to ILEDx Current Gain Voltage on ISET Pin ISET Allowable Current Range LEDx Accuracy LEDx Matching LEDx Switch Leakage Current LEDx Switch Leakage Current EN Pulse Low Time EN Pulse High Time Initial EN or APWM Pulse High Time (relative to switching period) VLEDx AISET VISET ISET ErrLEDx ∆LEDx ILSleak5 ILSleak21 tLO tHI tHI(init) First EN or APWM pulse after shutdown SKIP = Low SKIP = High SKIP = Low tHID SKIP = High Falling edge of EN or APWM pulse SKIP = Low SKIP = High RISET = 12 kΩ; 100% current ratio, measured as average of LED1 to LED8; LED1 to LED8 = 0.5 V ISET = 100 µA , 100% current ratio; LED1 to LED8 = 0.5 V VLEDx= 5 V, EN = PWM = APWM = 0, TA = 25°C VLEDx= 21 V, EN = PWM = APWM=0 ISET = 100 µA – – – 40 – – – – 0.5 0.5 – – – – – – 500 210 1.23 – ±1.2 ±1.5 – 1 – – 256 64 256 64 256 64 – – – 150 – – 1 – 100 100 – – – – – – mV – V µA % % μA μA μs μs Switching Pulses Switching Pulses Switching Pulses Switching Pulses Switching Pulses Switching Pulses A mA °C Symbol Test Conditions Min. Typ. Max. Units Serial Pulse Timing (see figure 4 for further explanation) Level Change Delay (relative to switching period) Shutdown Delay (relative to switching period on EN or APWM) Soft Start Soft Start Boost Current Limit Soft Start LEDx Current Limit Thermal Shutdown Threshold tSHDN ISWSS ILEDSS TSHDN Initial soft start current for boost switch Current through enabled LEDx pins during soft start, RISET=12 kΩ 40°C hysteresis – 1 1.25 165 – Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 5 A8500 Flexible WLED/RGB Backlight Driver for Medium Size LCDs Efficiency with EN dimming is similar to that with APWM dimming. APWM light load efficiency can be improved by reducing boost switching frequency with SKIP set high. Performance Characteristics VIN = 5 V, 6 ch. with 7 LEDs per ch., 20 mA per ch., fSW = 1 MHz 95 PWM Efficiency VIN = 5 V, 6 ch. with 7 LEDs per ch., 20 mA per ch., fSW = 2 MHz 95 PWM Efficiency 90 90 Eff (%) VBAT (V) 80 Eff (%) 85 85 75 5 8.5 17.6 80 VBAT (V) 5 8.5 17.6 75 70 0 20 40 60 Duty Cycle (%) 80 100 70 0 20 40 60 Duty Cycle (%) 80 100 VIN = 5 V, 6 ch. with 7 LEDs per ch., 20 mA per ch., fSW = 1 MHz 100 90 80 APWM Efficiency VIN = 5 V, 6 ch. with 7 LEDs per ch., 20 mA per ch., fSW = 2 MHz 100 90 80 APWM Efficiency Eff (%) 60 50 40 30 0 5 8.5 17.6 Eff (%) 70 VBAT (V) 70 60 50 40 30 0 VBAT (V) 5 8.5 17.6 20 40 60 Duty Cycle (%) 80 100 20 40 60 Duty Cycle (%) 80 100 Efficiency versus Input Voltage with EN Dimming VIN = VBAT, 8 ch. with 8 LEDs per ch., fSW = 1 MHz 95 90 85 Eff (%) 80 75 70 65 4.5 4.7 4.9 VIN (%) 5.1 ILED(mA) 1 10 20 5.3 5.5 Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 6 A8500 EN Pin Turn On Flexible WLED/RGB Backlight Driver for Medium Size LCDs Performance Characteristics VIN = VBAT = 5 V; 8 ch., 8 LEDs per ch. VIN = VBAT = 5 V; 8 ch., 8 LEDs per ch. EN IOUT C1 EN EN Pin Turn Off C1 C2 VOUT C2 IOUT VOUT C3 C4 t IIN C3 C4 t IIN Symbol C1 C2 C3 C4 t Parameter EN IOUT VOUT IIN time Units/Division 5V 100 mA 10 V 1A 500 µs Symbol C1 C2 C3 C4 t Parameter EN IOUT VOUT IIN time Units/Division 5V 100 mA 10 V 1A 100 µs PWM Turn On at 50% Duty Cycle VIN = VBAT = 5 V; 8 ch., 8 LEDs per ch. C1 PWM IOUT C2 VOUT C2 C1 PWM Turn On at 5% Duty Cycle VIN = VBAT = 5 V; 8 ch., 8 LEDs per ch. PWM IOUT VOUT C3 C4 t IIN C3 C4 t IIN Symbol C1 C2 C3 C4 t Parameter PWM IOUT VOUT IIN time Units/Division 5V 100 mA 10 V 1A 5 ms APWM Turn On at 50% Duty Cycle FAPWM=100 kHz Symbol C1 C2 C3 C4 t Parameter PWM IOUT VOUT IIN time Units/Division 5V 100 mA 10 V 1A 10 ms APWM C1 IOUT C2 VOUT C3 C4 IIN Symbol C1 C2 C3 C4 t t Parameter APWM IOUT VOUT IIN time Units/Division 5V 100 mA 10 V 1A 200 µs Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 7 A8500 Flexible WLED/RGB Backlight Driver for Medium Size LCDs Functional Description The A8500 is a multioutput WLED driver for medium display backlighting. The A8500 works with 4.2 to 5.5 V input supply, and it has an integrated boost converter to boost a 5 V battery voltage up to 47 V, to drive up to 12 WLEDs in 6 series (Vf = 3.2 V, If = 20 mA), or 8 WLEDs in 8 series at 20 mA per LED string. For higher LED power or more LEDs, an inductor can be connected to a separate power supply, VBAT , from 5 to 25 V, with the A8500 IC powered from a 5 V source. The LED sinks can sink up to a 30 mA current. The boost converter is a constant frequency current-mode converter. The integrated boost DMOS switch is rated for 50 V at 2 A. This switch has pulse-by-pulse current limiting, with the current limit independent of duty cycle. The switch also has output overvoltage protection (OVP), with the OVP level adjustable, typically from 30 to 47 V, as described in the Device Internal Protection section. The A8500 has individual open LED detection. If any LED opens, the corresponding LED pin is removed from regulation logic. This allows the remaining LED strings to function normally, without excessive power dissipation. The switching frequency, fSW, can be set from 600 kHz to 2 MHz by a single resistor, RFSET, connected across the FSET and AGND pins, and with the SKIP pin set to logic low (see figure 2). The switching frequency is set as: FSW = 26.03 / RFSET , where FSW is in MHz and RFSET is in kΩ When the SKIP pin is connected to logic low, switching frequency is as set by RFSET. When the SKIP pin is connected to logic high, the switching frequency is divided by 4. The SKIP pin can be used to reduce switching frequency in order to reduce switching losses and improve efficiency at light loads. The IC offers a wide-bandwidth transconductance amplifier with external COMP pin. External compensation offers optimum performance for the desired application. The A8500 has eight well-matched current sinks to provide regulated current through LEDs for uniform display brightness. The quantity of LEDx pins used is determined by the SELx pins. Refer to table 1 for further description. The boost converter is controlled such that the minimum voltage on any LEDx pin is 500 mV. In a typical application, the LEDx pin connected to the LED string with the maximum voltage drop controls the boost loop, so the remaining pins will also have the higher voltage drop. All LED sinks are rated for 21 V, to allow PWM dimming control. LED Current Setting The maximum LED current can be set at up to 30 mA per channel, by using the ISET pin. To set the reference current, ISET , connect a resistor, RISET, between this pin and ground, valued according to the following formula: ISET = 1.23 / RISET , where ISET is in mA and RISET is in kΩ. 2.5 2.0 fSW (MHz) 1.5 1.0 0.5 0 Table 1. LEDx Channel Enable Table SEL1 0 1 0 1 0 1 0 0 10 20 30 40 50 60 70 SEL2 0 0 1 1 0 0 1 1 SEL3 0 0 0 0 1 1 1 1 LEDx Outputs Only LED1 on LED1 through LED2 on LED1 through LED3 on LED1 through LED4 on LED1 through LED5 on LED1 through LED6 on LED1 through LED7 on LED1 through LED8 on 1 RFSET (kΩ) Figure 2. Switching frequency setting by value of RFSET. Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 8 A8500 Flexible WLED/RGB Backlight Driver for Medium Size LCDs A8500 begins evaluating pulse patterns applied on the EN pin. Until a valid series is evaluated, the count remains 0 and the default ILEDx level remains at “100% current.” A count in the range 1 to 15 is evaluated proportionately; for example, when a series of 12 pulses is evaluated, ILEDx is set to 25% (100% × 4/16) of 100% current. At a 16th pulse, the counter resets to 0 and continues to count if additional pulses are applied. 35 30 25 IOUT (mA) 20 15 10 5 0 0 10 20 30 40 50 60 70 This current is multiplied internally with a gain of 210, and then mirrored on all enabled LEDx pins. This sets the maximum current through the LEDs, referred to as “100% current.” The effects of the value of RISET are shown in figure 3. The LED current can be reduced from 100% by any of three alternative methods. These modes are: • serial dimming through the EN pin, • on/off control (PWM) with an external PWM signal on the PWM pin, and • analog dimming with an external PWM signal on the APWM pin. Note: Only one dimming technique can be used at a time. Serial Dimming Through the EN Pin. When the EN pin is pulled high with PWM, and the APWM pin is low, the A8500 starts up in serial programming mode. In this mode, series of pulses applied to the EN pin are used to adjust the output current level, ILEDx, to a proportion of the ISET current, in equal increments, as listed in table 2. As shown in the timing diagram in figure 4, serial dimming is disabled during startup, for the tHI(init) period. After that, the Table 2. Serial Dimming Levels Pulse Count 0 1 2 3 4 5 6 7 ILEDx 100% 100%×15/16 100%×14/16 100%×13/16 100%×12/16 100%×11/16 100%×10/16 100%× 9/16 Pulse Count 8 9 10 11 12 13 14 15 16* *The counter resets on the sixteenth pulse. Pulses 0 EN t LO 100% as set by RISET ILEDX 100% ×1/16 level Shutdown tHID (A) 212 211 210 209 Gain 208 207 206 205 204 203 202 0 10 20 RISET (kΩ) ILEDx 100%×8/16 100%×7/16 100%×6/16 100%×5/16 100%×4/16 100%×3/16 100%×2/16 100%×1/16 100% VIN (V) 4.5 5.0 5.5 30 40 50 60 70 (B) RISET (kΩ) Figure 3. Effect of value of RISET on (A) “100% current” level, and (B) LEDx gain. 1 2 3 tHI(init) 1 2 3 4 tHI 75% Dimming Counter Reset tHID tSHDN Dimming Counter Reset Dimming Counter Reset 81.2% Figure 4. Timing diagram for serial dimming. Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 9 A8500 Flexible WLED/RGB Backlight Driver for Medium Size LCDs shuts down with the LEDx pins disabled. External PWM applied to the PWM pin should be in the range of 100 to 400 Hz for optimal accuracy. To indicate the end of a programming sequence, set the EN pin high for a period, tHID, which is either (a) greater than 256 oscillator periods when the SKIP pin is high, or (b) greater than 64 oscillator periods when SKIP is low. When the A8500 evaluates the end of a programming sequence, it changes the current level to match the existing count (per table 2). The counter is then reset to 0 and begins counting pulses again at the next valid pulse. If the EN pin, along with the PWM and APWM pins, is pulled low for period greater than tSHDN, the A8500 shuts down. When the IC enters shutdown, LED1 through LED8 and the boost switch turn off after the tSHDN period. During tSHDN , the converter continues to work in normal fashion. When enabled through the EN pin, internal references ramp up during the tHI(init) period. The boost converter starts with soft start to limit input inrush current. During soft start, the boost stage is peak current limited to 1 A. All enabled LEDx sinks are set to 1/16 of the set 100% current level, as VOUT and the voltage on the LEDx pins increases. When all LEDx pins reach the regulation level of 0.5 V, the IC comes out of soft start, resuming normal operation with 2 A current limit on boost and 100% current through LEDx pins. A typical step response in steady state is shown in figure 5. On/off Control (PWM) with an External PWM Signal on the PWM Pin. When the PWM pin is pulled high with the EN and C1 VOUT C2 IOUT C3 VPWM t Symbol C1 C2 C3 t Parameter VOUT IOUT VPWM time Units/Division 5.00 V 100 mA 1.00 V 1.00 ms Figure 7. PWM pin dimming fPWM = 200 Hz, Duty Cycle =10%. 180 160 140 IOUT (mA) 120 100 80 60 40 20 0 0 20 40 60 Duty Cycle (%) 80 100 fPWM (Hz) 100 500 APWM pins low, the A8500 turns on and all enabled LEDx pins sink 100% current. When the PWM pin is pulled low, the IC EN 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 IOUT Figure 5. Serial dimming response. The numbers indicate the quantity of EN pulses at each step. Figure 8. PWM pin dimming linearity. PWM 6 µs 100% Current level ILEDx Shutdown (0 µA) Figure 6. Timing diagram for dimming using the PWM pin. Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 10 A8500 Flexible WLED/RGB Backlight Driver for Medium Size LCDs At startup, the output capacitor is discharged and the IC enters soft start. The boost current is limited to 1 A, and all active LEDx pins sink 1/16 of the set 100% current until all of the enabled LEDx pins reach 0.5 V. After the IC comes out of soft start, the boost current and the LEDx pin currents are set to 100% current. The output capacitor charges to the voltage level required to supply full LEDx current within a few cycles. The IC is shut down immediately when PWM goes low. Analog Dimming with an External PWM Signal on the APWM Pin. When the APWM pin is pulled high, with the EN and PWM cycle, is less than 3%. In this mode, the A8500 goes through a soft start routine similar to serial dimming. Device Internal Protection Overcurrent Protection (OCP). The A8500 has a pulse-by-pulse current limit of 2 A on the boost switch. This current limit is independent of duty cycle. Thermal Shutdown Protection (TSD). The IC shuts down when pins low, the A8500 turns on in this mode. The first pulse after shutdown should be greater than tHI(init). The logic level PWM signal applied to the APWM pin multiplies ISET by the duty cycle to set the reference current level for the LED pins. The typical range for the APWM signal frequency is 20 kHz to 2 MHz. The output current ripple at 20 kHz, 50% duty cycle, is less than 5% of the set value. The LED current accuaracy at 2 MHz, 50% duty junction temperature exceeds 165°C and restarts when the junction temperature falls by 40°C. Overvoltage Protection (OVP). The A8500 has overvoltage protection to protect the IC against output overvoltage. The overvoltage level can be set, from 30 to 45 V typical, with an external resistor, ROVP, as shown in figure 10. When the current though the OVP pin exceeds 54.9 µA, the OVP comparator goes high. When the OVP pin current falls below 47.8 µA, OVP is reset. 180 160 140 IOUT (mA) 120 100 80 60 40 20 0 0 20 40 60 Duty Cycle (%) 80 100 fAPWM (kHz) 20 100 500 VIN SW SW D1 VOUT ROVP OVP OVP Disable 28.8 V DZ COUT A – + 1.23 V 22 kΩ 4.4 kΩ Figure 9. APWM pin dimming linearity. Figure 10. Overvoltage protection circuit. Three alternative configurations at (A) are available, as follows: External Component ROVP only DZ only both ROVP and DZ OVP Rating up to 45 V up to 47 V redundancy Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 11 A8500 Flexible WLED/RGB Backlight Driver for Medium Size LCDs Calculate the value for ROVP as follows: ROVP = (VOVP – 30) / 54.9 µA , where VOVP is the desired typical OVP level in V, and ROVP is in Ω. For tighter OVP limits, a low–leakage-current Zener diode, DZ, can be used, instead of ROVP, to set OVP at up to 47 V. For redundancy, DZ can be connected across ROVP to provide additional protection, if ROVP should open. Select a 17 V low-leakage Zener diode for DZ. LEDs. If any enabled LED string opens, voltage on the corresponding LEDx pin goes to zero. The boost loop operates in open loop till the OVP level is reached. The A8500 identifies the open LED string opens LED string when overvoltage on the OVP pin is detected. This string is then removed from the boost controlling loop. The boost circuit is then controlled in the normal manner, and the output voltage is regulated, to provide the output required to drive the remaining strings. If the open LED string is reconnected, it will sink current up to the programmed current level. Note: Open strings are removed from boost regulation, but not disabled. This keeps the string in operation if LEDs open for only a short length of time, or reach OVP level on a transient event. The disconnected string can be restored to normal mode by reenabling the IC. It can also restored to normal operation if the fault signal is removed from the corresponding LEDx pin, but an OVP event occurs on any other LEDx pin. Normal operation resumes with open LED string removed from control loop Open LED Protection. The A8500 has protection against open Overvoltage detected, OVP begins IOUT VOUT C1 IOUT VOUT C2 C3 IIN IIN t Symbol C1 C2 C3 t Parameter IOUT VOUT IIN time Units/Division 50 mA 10 V 500 mA 200 µs Figure 11. Open LED fault protection. Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 12 A8500 Flexible WLED/RGB Backlight Driver for Medium Size LCDs Application Information A typical application circuit for dimming an LCD monitor backlight with 96 LEDs is shown in figure 1. Figure 12 shows two dimming methods: digital PWM control (PWM signal on the PWM pin) and analog PWM control, with the analog signal, VA , applied to the ISET pin through a resistor, RA. The current flowing through RA can be calculated as: IA = VA/ RA . This current changes the reference current, ISET, as follows: ISET = VSET / RSET – (VA – VSET) / RA . LED current can be changed by changing VA. ISET can be changed in the range from 40 µA to 150 µA. Accuracy (%) ISET RISETP RISET Q1 Figure 13. Configuration for 1000:1 dimming. 100 95 90 85 80 75 0.1 Application Circuit for 1000:1 Dimming Level A wider dimming range can be achieved by changing the reference current, ISET, while using PWM dimming. For higher output, current levels turn on Q1. RISET and RISETP set the 100% current level. This current level can be set to 30 mA, and then it can be dimmed by applying 100% to 0.35% duty cycle on the PWM pin. The reference current can be reduced by turning off Q1. LED current can be dimmed to 8 mA by reducing reference current through ISET pin. This provides 1000:1 combined dimming level range. Figure 14 shows the accuracy, ErrLEDX , results using this circuit. VS 5 V ±10% 1.0 10.0 Dimming Level (%) 100.0 Figure 14. Typical accuracy, normalized to the 100% current level, versus dimming level, with FPWM = 100 Hz. ROVP EN PWM APWM SKIP COMP CC FSET RFSET VA RISET RA ISET VIN SW SW OVP COUT AGND PGND A8500 SEL3 SEL2 SEL1 VIN LED2 LED1 LED3 LED5 LED7 LGND LED8 LED6 LED4 Figure 12. Typical application circuit for PWM dimming, using digital PWM (on the PWM pin, with APWM high). Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 13 A8500 VS 5 V ±10% CIN EN PWM APWM SKIP CC RFSET ISET COMP FSET VIN Flexible WLED/RGB Backlight Driver for Medium Size LCDs VBAT 5 to 25 V CBAT ROVP SW SW OVP AGND PGND COUT A8500 SEL3 SEL2 SEL1 VIN RISET LED1 LED8 LED7 LED6 LED5 LGND LED4 LED3 LED2 Figure 15. Typical application circuit for PWM dimming, using digital PWM (on the PWM pin, with APWM high). Showing configuration of 16 WLEDs at 100 mA, in two strings of 8 LEDs each. VS 5 V ±10% L1 10 µH D1 ROVP COUT 1 µF All ESD capacitors across LED arrays are 0.1 µF EN PWM APWM SKIP CC 0.1 µF RFSET COMP FSET AGND ISET VIN SW SW OVP PGND A8500 SEL3 SEL2 SEL1 LED1 VIN RISET LED8 LED7 LED6 LED5 LGND LED4 LED3 LED2 Figure 16. Typical application circuit for LED modules with ESD capacitors. Recommended Components Table (for application shown in figure 1) Component Capacitor Capacitor Capacitor Diode IC Inductor Resistor Resistor Resistor Reference Designator CBAT COUT CIN, CC D1 A8500 L1 RISET RFSET ROVP Value 1 µF / 50 V 1 µF / 50 V 0.1 µF / 6.3 V 60 V / 1.5 A – 10 µH 12 kΩ 24 kΩ 270 kΩ Part Number C3216X7R1H105K C3216X7R1H105K IR 10MQ060NTRPBF A8500 SLF6028T-100M1R3-PF Vendor TDK TDK International Rectifier Allegro MicroSystems TDK Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 14 A8500 Flexible WLED/RGB Backlight Driver for Medium Size LCDs Pin-out Diagram 26 AGND 22 OVP 21 PGND 20 PWM 19 EN EP 18 SEL3 17 SEL2 16 SEL1 15 LED2 LED7 10 LED8 12 LED6 13 LGND 11 LED4 14 8 9 25 VIN 24 SW 23 SW PGND SKIP COMP FSET ISET APWM LED1 1 2 3 4 5 6 7 LED3 Terminal List Table Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 – Name SKIP COMP FSET ISET APWM LED1 LED3 LED5 LED7 LGND LED8 LED6 LED4 LED2 SEL1 SEL2 SEL3 EN PWM PGND OVP SW SW VIN AGND EP PGND Power ground pin. LED5 (Top View) Description Reduces boost switching frequency in case of light load to improve frequency. Normally, this pin should be low; when high, fSW is divided by 4. Compensation pin; connect external compensation network for boost converter. Sets boost switching frequency. Connect RFSET from FSET to GND to set frequency. Range for RFSET is 13 to 40 kΩ. Sets 100% current through LED string. Connect RISET from ISET to GND. Range for RISET is 8.2 to 30 kΩ. On/off and analog LED current control with external PWM. Apply logic level PWM (1.2 V < VIH < 5 V) for PWM controlled dimming mode. When unused, connect to AGND. LEDx capable of 30 mA. Power ground pin for LED current sink. LEDx capable of 30 mA. SEL1, SEL2, and SEL3 decide active LED strings. On/off and serial dimming control. EN high enables IC and EN low disables IC. This pin can also be used to program LEDx current. When unused, connect to AGND. On/off and on/off LED current control with external PWM. Apply logic level PWM for PWM controlled dimming mode. When unused, connect to AGND. Power ground pin. Connect to this pin to output capacitor +Ve node through a resistor to enable OVP (overvoltage protection). Default OVP level with 0 Ω resistor is 30 V, and it can be programmed up to 47 V. DMOS drain node. Input supply for the IC. Decouple with a 0.1 µF ceramic capacitor. Circuit ground pin. Exposed pad. Electrically connectred to PGND and LGND; connect to PCB copper plane for heat transfer. Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 15 A8500 Flexible WLED/RGB Backlight Driver for Medium Size LCDs Package EC, 4 × 4 mm 26-Pin QFN/MLP 4.10 .161 3.90 .154 26 1 2 A A B 0.95 .037 NOM 0.20 .008 NOM 26 0.40 .016 NOM 4.10 .161 3.90 .154 4X0.20 .008 MIN 1 2 C 1.10 .043 NOM 1.23 .048 NOM 4.0 .157 NOM 12X0.20 .008 MIN (Top View) 26X 0.08 [.003] C 0.25 .014 26X 0.15 .010 0.07 [.003] M C A B 0.05 [.002] M C 0.40 .016 C 2.45 .096 NOM 4.0 .157 NOM SEATING PLANE 0.80 .031 0.70 .028 0.20 .008 REF 0.05 .002 0.00 .000 All dimensions reference only, not for tooling use (reference JEDEC MO-220WGGE) Dimensions in millimeters U.S. Customary dimensions (in.) in brackets, for reference only Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown A Terminal #1 mark area B Exposed thermal pad (reference only, terminal #1 identifier appearance at supplier discretion) C Reference land pattern layout (reference IPC7351 QFN40P400X400X80-29M); adjust as necessary to meet application process requirements and PCB layout tolerances; when mounting on a multilayer PCB, thermal vias at the exposed thermal pad land can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5) 4X 0.20 .008 MIN (Pads on PCB) 0.50 .020 0.30 .012 B 0.20R .008 REF 2 1 26 2.45 .096 NOM 1.23 .048 NOM 1.10 .043 NOM (Bottom View) Copyright ©2006, 2007, Allegro MicroSystems, Inc. The products described here are manufactured under one or more U.S. patents or U.S. patents pending. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the failure of that life support device or system, or to affect the safety or effectiveness of that device or system. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use. For the latest version of this document, visit our website: www.allegromicro.com Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 16