A8500
Flexible WLED/RGB Backlight Driver for Medium Size LCDs
Pre-End-of-Life
This device is in production, however, it has been deemed Pre-End
of Life. The product is approaching end of life. Within a minimum of
6 months, the device will enter its final, Last Time Buy, order phase.
Date of status change: December 5, 2018
Recommended Substitutions: Generation 4 and 5 devices
For existing customer transition, and for new customers or new applications, contact Allegro Sales.
NOTE: For detailed information on purchasing options, contact your
local Allegro field applications engineer or sales representative.
Allegro MicroSystems reserves the right to make, from time to time, revisions to the anticipated product life cycle plan for a
product to accommodate changes in production capabilities, alternative product availabilities, or market demand. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems assumes no responsibility for
its use; nor for any infringements of patents or other rights of third parties which may result from its use.
A8500
Flexible WLED/RGB Backlight Driver for Medium Size LCDs
FEATURES AND BENEFITS
▪ Active current sharing between LED strings for ±1.5%
typical current matching and ±1.2% typical accuracy
▪ Drive up to 12 series × 8 parallel = 96 LEDs
(Vf = 3.2 V, If = 20 mA)
▪ Flexible dimming, using alternative methods:
▫ LED duty cycle control (PWM pin)
▫ DC current using serial programming (EN pin)
▫ DC current using external PWM signal (APWM pin)
▫ An external resistor
▪ Boost converter with integrated 50 V, 2 A DMOS
▪ LED sinks rated for 25 mA
▪ 200 kHz to 2 MHz switching frequency
▪ Open LED disconnect
▪ Boost current limit, thermal shutdown, and soft start
▪ No audible ceramic capacitor noise during PWM dimming
▪ Adjustable overvoltage protection (OVP)
▪ No pull-up resistors required for LED modules that use
ESD capacitors
PACKAGE: 26 pin QFN/MLP (suffix EC)
DESCRIPTION
The A8500 is a multi-output WLED driver for medium display
backlighting. The A8500 integrates a boost converter and eight
current-sinks to provide a flexible WLED/RGB backlight
driver. The boost converter can provide output voltage up to
47 V. The flexible channel selection control and high voltage
capability allow a wide range of LED backlight applications.
The A8500 can support any application requiring 4 to 96
WLEDs. The boost converter is a constant frequency currentmode converter.
Each LED channel can sink 25 mA, and channels can be
paralleled for higher currents. Flexible dimming allows output
channels to either run at an adjustable DC value or with
externally controlled PWM duty cycles.
The A8500 is available in a 26 pin, 4 mm × 4 mm QFN/MLP
package that is only 0.75 mm nominal in height. Applications
include:
▪ Thin notebook displays
▪ LCD TV
▪ RGB backlight
▪ GPS systems
▪ Portable DVD players
Approximate Scale 1:1
Typical Application
EN pin dimming:
serial pulse train input
VIN
5 V ±10%
VBAT
5 to 25 V
CIN
0.1 µF/ 10 V
VEN
EN
IOUT
IOUT
VIN
APWM
SKIP
COMP
CC
RFSET
COUT
ROVP
SW SW
OVP
AGND
A8500
2.2 µF
50 V
PGND
FSET
SEL3
ISET
SEL2
VIN
SEL1
RISET
APWM pin dimming:
analog PWM input
D1
CBAT
1 µF/ 25 V
PWM
PWM pin dimming:
digital PWM input
VPWM
L1
10 µH
LED1
LED3 LED5 LED7
LED2
LGND
LED8 LED6 LED4
VAPWM
IOUT
Figure 1. LCD monitor backlight, driving 96 LEDs. LED Vf = 3.2 V, 20 mA per LED string. Overvoltage
protection set to 45 V nominal (40.5 V minimum). Alternative dimming control pulse trains illustrated
for EN, PWM, and APWM control. See also: Recommended Components table, page 14.
8500P-DS, Rev. 5
MCO-0000584
February 20, 2020
Flexible WLED/RGB Backlight Driver
for Medium Size LCDs
A8500
Selection Guide
Part Number
A8500EECTR-T
Ambient Temperature, TA
A8500GECTR-T
–40 to 85
–40 to 105
Package
Packing*
4 mm × 4 mm
QFN/MLP
1500 pieces / 7-in. reel
*Contact Allegro for additional packing options
Device package is lead (Pb) free, with 100% matte tin leadframe plating.
Absolute Maximum Ratings
Characteristic
Symbol
Rating
Units
SW and OVP Pins
–0.3 to 50
V
LED1 through LED8 Pins
–0.3 to 23
V
VIN Pin
Notes
–0.3 to 6
V
–0.3 to VIN+ 0.3
V
Range E
–40 to 85
ºC
Range G
VIN
Remaining Pins
Operating Ambient Temperature
TA
–40 to 105
ºC
Maximum Junction Temperature
TJ(max)
150
ºC
Tstg
–55 to 150
ºC
Storage Temperature
Package Thermal Characteristics*
Characteristic
Symbol
Note
Rating
Units
RθJA
Measured on 3 in. × 3 in., 2-layer PCB
48.5
°C/W
Package Thermal Resistance
*Additional information is available on the Allegro website
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
2
Flexible WLED/RGB Backlight Driver
for Medium Size LCDs
A8500
Functional Block Diagram
L1
10 µH
VBAT
5 to 25 V
VIN
5 V ±10%
CIN
CBAT
VIN
D1
SW SW
COUT
COMP
Reference
and
Soft Start
+
+
–
R Q
S
–
ROVP
+
CC
VOUT
∑
–
PGND
OSC
SKIP
FSET
100 kΩ
RFSET
OVP
Feedback
Loop
AGND
Current Sinks
EN
LED1
LED2
On/Off
100 kΩ
SEL1
Serial Interface
SEL2
PWM Generator
SEL3
IOUT_SET
LED3
LED4
LED5
LED6
PWM
LED7
100 kΩ
ISET
RISET
LED8
Amp
APWM
100 kΩ
LGND
PGND
LGND
Allegro MicroSystems
955 Perimeter Road
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3
Flexible WLED/RGB Backlight Driver
for Medium Size LCDs
A8500
ELECTRICAL CHARACTERISTICS, valid at TA = –40°C to 85°C, typical values at TA = 25°C, VIN = 5 V, unless otherwise noted
Characteristics
Input Voltage Range
Undervoltage Lockout Threshold
UVLO Hysteresis Window
Supply Current
APWM Frequency Range
Symbol
Test Conditions
VIN
VUVLO
Typ.
Max.
Units
4.2
–
5.5
V
VIN falling
–
–
4
V
–
0.2
–
V
Switching at no load
–
5
–
mA
VUVLOhys
ISUP
Min.
Shutdown EN = PWM = APWM = VIL, TA = 25°C
–
0.1
1
µA
fAPWM
20
–
2000
kHz
AVEA
–
60
–
dB
UGBEA
–
3
–
MHz
Error Amplifier
Error Amplifier Open Loop Gain
Error Amplifier Unity Gain Bandwidth
Error Amplifier Transconductance
GmEA
∆ICOMP = ±10 µA
–
850
–
µA/V
Error Amplifier Output Sink Current
IEAsink
VLED1-8 = 1 V
–
280
–
µA
IEAsource
VLED1-8 = 0 V
–
–280
–
µA
Error Amplifier Output Source Current
Boost Controller
RFSET = 13 kΩ, SKIP = VIL
Switching Frequency
Minimum Switch Off-Time
fSW
1.8
2
2.2
MHz
RFSET = 26.1 kΩ, SKIP = VIL
–
1
–
MHz
RFSET = 32.4 kΩ, SKIP = VIH
–
200
–
kHz
–
70
–
ns
tOFFmin
Logic Input Levels (APWM , EN, MODE, PWM, SELx, and SKIP pins unless otherwise specified)
Input Voltage Level Low
VIL
–
–
0.4
V
Input Voltage Level High
VIH
1.5
–
–
V
Input Leakage Current (APWM, EN,
PWM, and SKIP pins)
IIleak
–
–
100
µA
Input Leakage Current (SELx pins)
ISELleak
–
–
1
µA
28
–
34
V
–
54.9
–
µA
VI(pin) = 5 V, TA = 25°C
Over Voltage Protection (OVP)
Output Overvoltage Rising Limit
VOVP
OVP Sense Current
IOVPH
ROVP = 0 Ω
OVP Release Current
IOVPL
–
47.8
–
µA
OVP Leakage Current
IOVPleak
VVOP = 21 V
–
0.1
–
µA
Rds(on)
ISW = 1.5 A
–
225
–
mΩ
VSW = 5 V, TA = 25°C
–
–
1
µA
Boost Switch
Switch On Resistance
Switch Leakage Current
ISWleak
Switch Current Limit
ISWlim
VSW = 21 V
–
1
–
µA
1.8
2
–
A
Continued on the next page…
Allegro MicroSystems
955 Perimeter Road
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www.allegromicro.com
4
Flexible WLED/RGB Backlight Driver
for Medium Size LCDs
A8500
ELECTRICAL CHARACTERISTICS (continued), valid at TA = –40°C to 85°C, typical values at TA = 25°C, VIN = 5 V, unless
otherwise noted
Characteristics
Symbol
Test Conditions
Min.
Typ.
Max.
Units
–
500
–
mV
LED Current Sinks
LEDx Regulation Voltage
VLEDx
ISET to ILEDx Current Gain
AISET
–
210
–
–
Voltage on ISET Pin
VISET
–
1.23
–
V
ISET Allowable Current Range
ISET
40
–
120
µA
RISET = 12 kΩ; 100% current ratio,
measured as average of LED1 to LED8;
LED1 to LED8 = 0.5 V
–
±1.2
–
%
ISET = 100 µA
LEDx Accuracy
ErrLEDx
LEDx Matching
∆LEDx
ISET = 100 µA , 100% current ratio;
LED1 to LED8 = 0.5 V
–
±1.5
–
%
LEDx Switch Leakage Current
ILSleak5
VLEDx= 5 V, EN = PWM = APWM = 0, TA = 25°C
–
–
1
μA
LEDx Switch Leakage Current
ILSleak21
VLEDx= 21 V, EN = PWM = APWM=0
–
1
–
μA
μs
Serial Pulse Timing (see figure 4 for further explanation)
EN Pulse Low Time
tLO
0.5
–
100
EN Pulse High Time
tHI
0.5
–
100
μs
Initial EN or APWM Pulse High Time (relative to switching period)
Level Change Delay (relative to switching
period)
Shutdown Delay (relative to switching
period on EN or APWM)
tHI(init)
First EN or APWM pulse after
shutdown
tHID
SKIP = Low
–
256
–
Switching
Pulses
SKIP = High
–
64
–
Switching
Pulses
SKIP = Low
–
256
–
Switching
Pulses
SKIP = High
–
64
–
Switching
Pulses
SKIP = Low
–
256
–
Switching
Pulses
SKIP = High
–
64
–
Switching
Pulses
tSHDN
Falling edge of EN or APWM
pulse
ISWSS
Initial soft start current for boost switch
-
1
-
A
Soft Start LEDx Current Limit
ILEDSS
Current through enabled LEDx pins during soft
start, RISET=12 kΩ
-
1.25
-
mA
Thermal Shutdown Threshold
TSHDN
40°C hysteresis
–
165
–
°C
Soft Start
Soft Start Boost Current Limit
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5
Flexible WLED/RGB Backlight Driver
for Medium Size LCDs
A8500
Performance Characteristics
Efficiency with EN dimming is similar to that with APWM dimming. APWM light load
efficiency can be improved by reducing boost switching frequency with SKIP set high.
PWM Efficiency
PWM Efficiency
VIN = 5 V, 6 ch. with 7 LEDs per ch., 20 mA per ch., fSW = 2 MHz
95
95
90
90
85
Eff (%)
Eff (%)
VIN = 5 V, 6 ch. with 7 LEDs per ch., 20 mA per ch., fSW = 1 MHz
VBAT (V)
80
5
8.5
17.6
75
70
0
20
40
85
VBAT (V)
80
5
8.5
17.6
75
60
80
70
0
100
20
40
APWM Efficiency
90
90
80
80
Eff (%)
VBAT (V)
5
8.5
17.6
40
30
0
VBAT (V)
70
5
8.5
17.6
60
50
40
20
40
60
80
30
0
100
20
40
Duty Cycle (%)
60
80
100
Duty Cycle (%)
Efficiency versus Input Voltage with EN Dimming
VIN = VBAT, 8 ch. with 8 LEDs per ch., fSW = 1 MHz
95
90
85
Eff (%)
Eff (%)
100
50
100
VIN = 5 V, 6 ch. with 7 LEDs per ch., 20 mA per ch., fSW = 2 MHz
100
60
80
APWM Efficiency
VIN = 5 V, 6 ch. with 7 LEDs per ch., 20 mA per ch., fSW = 1 MHz
70
60
Duty Cycle (%)
Duty Cycle (%)
ILED(mA)
80
1
10
20
75
70
65
4.5
4.7
4.9
5.1
5.3
5.5
VIN (%)
Allegro MicroSystems
955 Perimeter Road
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6
Flexible WLED/RGB Backlight Driver
for Medium Size LCDs
A8500
Performance Characteristics
EN Pin Turn On
EN Pin Turn Off
VIN = VBAT = 5 V; 8 ch., 8 LEDs per ch.
VIN = VBAT = 5 V; 8 ch., 8 LEDs per ch.
EN
C1
EN
C1
IOUT
C2
IOUT
C2
VOUT
C3
VOUT
C3
IIN
C4
IIN
C4
Symbol
C1
C2
C3
C4
t
t
Parameter
EN
IOUT
VOUT
IIN
time
Symbol
C1
C2
C3
C4
t
Units/Division
5V
100 mA
10 V
1A
500 µs
PWM Turn On at 50% Duty Cycle
VIN = VBAT = 5 V; 8 ch., 8 LEDs per ch.
Parameter
EN
IOUT
VOUT
IIN
time
Units/Division
5V
100 mA
10 V
1A
100 µs
PWM Turn On at 5% Duty Cycle
VIN = VBAT = 5 V; 8 ch., 8 LEDs per ch.
PWM
C1
t
PWM
C1
IOUT
C2
IOUT
C2
VOUT
C3
VOUT
C3
IIN
C4
IIN
C4
Symbol
C1
C2
C3
C4
t
t
Parameter
PWM
IOUT
VOUT
IIN
time
Units/Division
5V
100 mA
10 V
1A
5 ms
APWM Turn On at 50% Duty Cycle
Symbol
C1
C2
C3
C4
t
t
Parameter
PWM
IOUT
VOUT
IIN
time
Units/Division
5V
100 mA
10 V
1A
10 ms
FAPWM=100 kHz
APWM
C1
IOUT
C2
VOUT
C3
IIN
C4
Symbol
C1
C2
C3
C4
t
t
Parameter
APWM
IOUT
VOUT
IIN
time
Units/Division
5V
100 mA
10 V
1A
200 µs
Allegro MicroSystems
955 Perimeter Road
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www.allegromicro.com
7
Flexible WLED/RGB Backlight Driver
for Medium Size LCDs
A8500
Functional Description
The A8500 is a multioutput WLED driver for medium display
backlighting. The A8500 works with 4.2 to 5.5 V input supply,
and it has an integrated boost converter to boost a 5 V battery
voltage up to 47 V, to drive up to 12 WLEDs in 6 series (Vf =
3.2 V, If = 20 mA), or 8 WLEDs in 8 series at 20 mA per LED
string. For higher LED power or more LEDs, an inductor can be
connected to a separate power supply, VBAT , from 5 to 25 V, with
the A8500 IC powered from a 5 V source. The LED sinks can
sink up to a 25 mA current.
The boost converter is a constant frequency current-mode converter. The integrated boost DMOS switch is rated for 50 V at
2 A. This switch has pulse-by-pulse current limiting, with the current limit independent of duty cycle. The switch also has output
overvoltage protection (OVP), with the OVP level adjustable,
typically from 30 to 47 V, as described in the Device Internal
Protection section.
The A8500 has individual open LED detection. If any LED
opens, the corresponding LED pin is removed from regulation
logic. This allows the remaining LED strings to function normally, without excessive power dissipation.
The switching frequency, fSW, can be set from 600 kHz to 2 MHz
by a single resistor, RFSET, connected across the FSET and
AGND pins, and with the SKIP pin set to logic low (see figure 2).
The switching frequency is set as:
fSW = 26.03 / RFSET ,
where fSW is in MHz and RFSET is in kΩ When the SKIP pin is
connected to logic low, switching frequency is as set by RFSET.
2.5
The IC offers a wide-bandwidth transconductance amplifier with
external COMP pin. External compensation offers optimum performance for the desired application.
The A8500 has eight well-matched current sinks to provide regulated current through LEDs for uniform display brightness. The
quantity of LEDx pins used is determined by the SELx pins. Refer
to table 1 for further description.
The boost converter is controlled such that the minimum voltage
on any LEDx pin is 500 mV. In a typical application, the LEDx
pin connected to the LED string with the maximum voltage drop
controls the boost loop, so the remaining pins will also have the
higher voltage drop. All LED sinks are rated for 21 V, to allow
PWM dimming control.
LED Current Setting
The maximum LED current can be set at up to 25 mA per channel, by using the ISET pin. To set the reference current, ISET ,
connect a resistor, RISET, between this pin and ground, valued
according to the following formula:
ISET = 1.23 / RISET ,
where ISET is in mA and RISET is in kΩ.
Table 1. LEDx Channel Enable Table
2.0
fSW (MHz)
When the SKIP pin is connected to logic high, the switching
frequency is divided by 4. The SKIP pin can be used to reduce
switching frequency in order to reduce switching losses and
improve efficiency at light loads.
SEL1
SEL2
SEL3
0
0
0
LEDx Outputs
Only LED1 on
1
0
0
LED1 through LED2 on
0
1
0
LED1 through LED3 on
1.0
1
1
0
LED1 through LED4 on
0
0
1
LED1 through LED5 on
0.5
1
0
1
LED1 through LED6 on
1.5
0
0
10
20
30
40
50
60
70
0
1
1
LED1 through LED7 on
1
1
1
LED1 through LED8 on
RFSET (kΩ)
Figure 2. Switching frequency setting by value of RFSET.
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8
Flexible WLED/RGB Backlight Driver
for Medium Size LCDs
A8500
This current is multiplied internally with a gain of 210, and then
mirrored on all enabled LEDx pins. This sets the maximum current through the LEDs, referred to as “100% current.” The effects
of the value of RISET are shown in figure 3.
The LED current can be reduced from 100% by any of three
alternative methods. These modes are:
• serial dimming through the EN pin,
A8500 begins evaluating pulse patterns applied on the EN pin.
Until a valid series is evaluated, the count remains 0 and the
default ILEDx level remains at “100% current.” A count in the
range 1 to 15 is evaluated proportionately; for example, when
a series of 12 pulses is evaluated, ILEDx is set to 25% (100% ×
4/16) of 100% current. At a 16th pulse, the counter resets to 0 and
continues to count if additional pulses are applied.
25
• analog dimming with an external PWM signal on the APWM pin.
20
Note: Only one dimming technique can be used at a time.
Serial Dimming Through the EN Pin. When the EN pin is pulled
high with PWM, and the APWM pin is low, the A8500 starts
up in serial programming mode. In this mode, series of pulses
applied to the EN pin are used to adjust the output current level,
ILEDx, to a proportion of the ISET current, in equal increments, as
listed in table 2.
IOUT (mA)
• on/off control (PWM) with an external PWM signal on the
PWM pin, and
0
0
10
20
30
(A)
40
50
211
ILEDx
Pulse Count
ILEDx
0
100%
8
100%×8/16
1
100%×15/16
9
100%×7/16
2
100%×14/16
10
100%×6/16
3
100%×13/16
11
100%×5/16
4
100%×12/16
12
100%×4/16
5
100%×11/16
13
100%×3/16
6
100%×10/16
14
100%×2/16
7
100%× 9/16
15
100%×1/16
16*
100%
*The counter resets on the sixteenth pulse.
1
2
3
70
VIN (V)
4.5
5.0
5.5
210
209
Gain
Pulse Count
60
RISET (kΩ)
212
Table 2. Serial Dimming Levels
tHI(init)
10
5
As shown in the timing diagram in figure 4, serial dimming is
disabled during startup, for the tHI(init) period. After that, the
Pulses 0
15
208
207
206
205
204
203
202
0
10
20
30
(B)
40
50
60
70
RISET (kΩ)
Figure 3. Effect of value of RISET on (A) “100% current” level, and
(B) LEDx gain.
4
1
2
3
EN
tHID
t LO
100% as set by RISET
ILEDX
100% ×1/16 level
Shutdown
tSHDN
tHID
tHI
75%
Dimming
Counter
Reset
Dimming
Counter
Reset
81.2%
Dimming
Counter
Reset
Figure 4. Timing diagram for serial dimming.
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9
Flexible WLED/RGB Backlight Driver
for Medium Size LCDs
To indicate the end of a programming sequence, set the EN pin
high for a period, tHID, which is either (a) greater than 256 oscillator periods when the SKIP pin is high, or (b) greater than 64
oscillator periods when SKIP is low. When the A8500 evaluates
the end of a programming sequence, it changes the current level
to match the existing count (per table 2). The counter is then reset
to 0 and begins counting pulses again at the next valid pulse.
If the EN pin, along with the PWM and APWM pins, is pulled
low for period greater than tSHDN, the A8500 shuts down. When
the IC enters shutdown, LED1 through LED8 and the boost
switch turn off after the tSHDN period. During tSHDN , the converter continues to work in normal fashion.
When enabled through the EN pin, internal references ramp up
during the tHI(init) period. The boost converter starts with soft
start to limit input inrush current. During soft start, the boost
stage is peak current limited to 1 A. All enabled LEDx sinks are
set to 1/16 of the set 100% current level, as VOUT and the voltage on the LEDx pins increases. When all LEDx pins reach the
regulation level of 0.5 V, the IC comes out of soft start, resuming
normal operation with 2 A current limit on boost and 100% current through LEDx pins. A typical step response in steady state is
shown in figure 5.
On/off Control (PWM) with an External PWM Signal on the
PWM Pin. When the PWM pin is pulled high with the EN and
APWM pins low, the A8500 turns on and all enabled LEDx pins
sink 100% current. When the PWM pin is pulled low, the IC
EN
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 1 1 2 3 4 5 6 7 8
9 10 11 12 13 14 15
shuts down with the LEDx pins disabled. External PWM applied
to the PWM pin should be in the range of 100 to 400 Hz for
optimal accuracy.
VOUT
C1
IOUT
C2
VPWM
C3
t
Symbol
C1
C2
C3
t
Parameter
VOUT
IOUT
VPWM
time
Units/Division
5.00 V
100 mA
1.00 V
1.00 ms
Figure 7. PWM pin dimming fPWM = 200 Hz, Duty Cycle =10%.
Waveform is captured with AC coupling. DC value is zero.
180
160
fPWM (Hz)
140
100
500
120
IOUT (mA)
A8500
100
80
60
40
20
IOUT
0
0
Figure 5. Serial dimming response. The numbers indicate the
quantity of EN pulses at each step.
20
40
60
Duty Cycle (%)
80
100
Figure 8. PWM pin dimming linearity.
PWM
6 µs
100% Current level
ILEDx
Shutdown (0 µA)
Figure 6. Timing diagram for dimming using the PWM pin.
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10
Flexible WLED/RGB Backlight Driver
for Medium Size LCDs
A8500
At startup, the output capacitor is discharged and the IC enters
soft start. The boost current is limited to 1 A, and all active LEDx
pins sink 1/16 of the set 100% current until all of the enabled
LEDx pins reach 0.5 V. After the IC comes out of soft start, the
boost current and the LEDx pin currents are set to 100% current.
The output capacitor charges to the voltage level required to supply full LEDx current within a few cycles. The IC is shut down
immediately when PWM goes low.
Analog Dimming with an External PWM Signal on the APWM
Pin. When the APWM pin is pulled high, with the EN and PWM
pins low, the A8500 turns on in this mode. The first pulse after
shutdown should be greater than tHI(init). The logic level PWM
signal applied to the APWM pin multiplies ISET by the duty cycle
to set the reference current level for the LED pins. The typical
range for the APWM signal frequency is 20 kHz to 2 MHz. The
output current ripple at 20 kHz, 50% duty cycle, is less than 5%
of the set value. The LED current accuaracy at 2 MHz, 50% duty
cycle, is less than 3%. In this mode, the A8500 goes through a
soft start routine similar to serial dimming.
Device Internal Protection
Overcurrent Protection (OCP). The A8500 has a pulse-by-pulse
current limit of 2 A on the boost switch. This current limit is
independent of duty cycle.
Thermal Shutdown Protection (TSD). The IC shuts down when
junction temperature exceeds 165°C and restarts when the junction temperature falls by 40°C.
Overvoltage Protection (OVP). The A8500 has overvoltage
protection to protect the IC against output overvoltage. The overvoltage level can be set, from 30 to 45 V typical, with an external
resistor, ROVP, as shown in figure 10. When the current though
the OVP pin exceeds 54.9 µA, the OVP comparator goes high.
When the OVP pin current falls below 47.8 µA, OVP is reset.
180
160
fAPWM (kHz)
140
100
VOUT
SW SW
ROVP
20
100
500
120
IOUT (mA)
D1
VIN
DZ
OVP
OVP
Disable
80
+
60
A
28.8 V
–
COUT
22 kΩ
1.23 V
40
4.4 kΩ
20
0
0
20
40
60
Duty Cycle (%)
Figure 9. APWM pin dimming linearity.
80
100
Figure 10. Overvoltage protection circuit. Three alternative
configurations at (A) are available, as follows:
External Component
OVP Rating
ROVP only
up to 45 V
DZ only
up to 47 V
both ROVP and DZ
redundancy
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955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
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11
Flexible WLED/RGB Backlight Driver
for Medium Size LCDs
A8500
Calculate the value for ROVP as follows:
ROVP = (VOVP – 30) / 54.9 µA ,
where VOVP is the desired typical OVP level in V, and ROVP is
in Ω. For tighter OVP limits, a low–leakage-current Zener diode,
DZ, can be used, instead of ROVP, to set OVP at up to 47 V. For
redundancy, DZ can be connected across ROVP to provide additional protection, if ROVP should open. Select a 17 V low-leakage Zener diode for DZ.
Open LED Protection. The A8500 has protection against open
LEDs. If any enabled LED string opens, voltage on the corresponding LEDx pin goes to zero. The boost loop operates in open
loop till the OVP level is reached. The A8500 identifies the open
LED string
opens
LED string when overvoltage on the OVP pin is detected. This
string is then removed from the boost controlling loop. The boost
circuit is then controlled in the normal manner, and the output
voltage is regulated, to provide the output required to drive the
remaining strings. If the open LED string is reconnected, it will
sink current up to the programmed current level.
Note: Open strings are removed from boost regulation, but not
disabled. This keeps the string in operation if LEDs open for only
a short length of time, or reach OVP level on a transient event.
The disconnected string can be restored to normal mode by reenabling the IC. It can also restored to normal operation if the
fault signal is removed from the corresponding LEDx pin, but an
OVP event occurs on any other LEDx pin.
Overvoltage
detected,
OVP begins
IOUT
Normal operation
resumes with open
LED string removed
from control loop
IOUT
VOUT
VOUT
C1
C2
IIN
IIN
C3
t
Symbol
C1
C2
C3
t
Parameter
IOUT
VOUT
IIN
time
Units/Division
50 mA
10 V
500 mA
200 µs
Figure 11. Open LED fault protection.
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
12
Flexible WLED/RGB Backlight Driver
for Medium Size LCDs
A8500
Application Information
A typical application circuit for dimming an LCD monitor
backlight with 96 LEDs is shown in figure 1. Figure 12 shows
two dimming methods: digital PWM control (PWM signal on the
PWM pin) and analog PWM control, with the analog signal, VA ,
applied to the ISET pin through a resistor, RA.
ISET
RISETP
RISET
Q1
The current flowing through RA can be calculated as:
IA = VA/ RA .
Figure 13. Configuration for 1000:1 dimming.
This current changes the reference current, ISET, as follows:
ISET = VSET / RSET – (VA – VSET) / RA .
100
95
Application Circuit for 1000:1 Dimming Level
90
A wider dimming range can be achieved by changing the reference current, ISET, while using PWM dimming. For higher output,
current levels turn on Q1. RISET and RISETP set the 100% current
level. This current level can be set to 25 mA, and then it can be
dimmed by applying 100% to 0.32% duty cycle on the PWM pin.
The reference current can be reduced by turning off Q1. LED
current can be dimmed to 8 mA by reducing reference current
through ISET pin. This provides 1000:1 combined dimming level
range. Figure 14 shows the accuracy, ErrLEDX , results using this
circuit.
Accuracy (%)
LED current can be changed by changing VA. ISET can be
changed in the range from 40 µA to 120 µA.
85
80
75
0.1
1.0
10.0
Dimming Level (%)
100.0
Figure 14. Typical accuracy, normalized to the 100% current level,
versus dimming level, with FPWM = 100 Hz.
VIN
5 V ±10%
ROVP
EN
VIN
SW SW
PWM
AGND
APWM
SKIP
COMP
CC
FSET
RFSET
RA
VA
RISET
COUT
OVP
PGND
A8500
SEL3
VIN
SEL2
ISET
SEL1
LED2
LED1
LED3 LED5 LED7 LGND LED8 LED6 LED4
Figure 12. Typical application circuit for PWM dimming, using digital PWM (on the
PWM pin, with APWM high).
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
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13
Flexible WLED/RGB Backlight Driver
for Medium Size LCDs
A8500
VBAT 5 to 25 V
VIN
5 V ±10%
CIN
CBAT
VIN
EN
ROVP
SW SW
PWM
OVP
AGND
APWM
PGND
SKIP
A8500
COMP
CC
COUT
SEL3
FSET
VIN
SEL2
RFSET
SEL1
ISET
LED1
LED8
LED7 LED6 LED5 LGND LED4 LED3 LED2
RISET
Figure 15. Typical application circuit for PWM dimming, using digital PWM (on the
PWM pin, with APWM high). Showing configuration of 16 WLEDs at 100 mA, in two
strings of 8 LEDs each.
VIN
5 V ±10%
L1
10 µH
D1
All ESD capacitors across LED arrays are 0.1 µF
ROVP
EN
VIN
SW SW
COUT
OVP
1 µF
PWM
APWM
SKIP
PGND
A8500
COMP
CC
0.1 µF
SEL3
FSET
RFSET
RISET
VIN
SEL2
SEL1
AGND
ISET
LED1
LED8 LED7 LED6 LED5 LGND LED4 LED3 LED2
Figure 16. Typical application circuit for LED modules with ESD capacitors.
Recommended Components Table (for application shown in figure 1)
Component
Capacitor
Capacitor
Capacitor
Diode
IC
Inductor
Resistor
Resistor
Resistor
Reference
Designator
CBAT
COUT
CIN, CC
D1
A8500
L1
RISET
RFSET
ROVP
Value
1 µF / 50 V
1 µF / 50 V
0.1 µF / 6.3 V
60 V / 1.5 A
–
10 µH
12 kΩ
24 kΩ
270 kΩ
Part Number
C3216X7R1H105K
C3216X7R1H105K
TDK
TDK
Vendor
IR 10MQ060NTRPBF
A8500
SLF6028T-100M1R3-PF
International Rectifier
Allegro MicroSystems
TDK
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
14
Flexible WLED/RGB Backlight Driver
for Medium Size LCDs
A8500
22 OVP
23 SW
24 SW
25 VIN
26 AGND
Pin-out Diagram
PGND
1
21 PGND
SKIP
2
20 PWM
COMP
3
FSET
4
ISET
5
17 SEL2
APWM
6
16 SEL1
LED1
7
15 LED2
19 EN
LED4 14
LED6 13
18 SEL3
LED8 12
LGND 11
9
LED5
LED7 10
8
LED3
EP
(Top View)
Terminal List Table
Number
Name
1
PGND
2
SKIP
3
4
5
COMP
FSET
ISET
6
APWM
7
8
9
10
11
12
13
14
15
16
17
18
LED1
LED3
LED5
LED7
LGND
LED8
LED6
LED4
LED2
SEL1
SEL2
SEL3
19
EN
20
PWM
21
PGND
22
OVP
23
24
25
26
–
SW
SW
VIN
AGND
EP
Description
Power ground pin.
Reduces boost switching frequency in case of light load to improve frequency. Normally, this pin should be low; when
high, fSW is divided by 4.
Compensation pin; connect external compensation network for boost converter.
Sets boost switching frequency. Connect RFSET from FSET to GND to set frequency. Range for RFSET is 13 to 40 kΩ.
Sets 100% current through LED string. Connect RISET from ISET to GND. Range for RISET is 10 to 30 kΩ.
On/off and analog LED current control with external PWM. Apply logic level PWM (1.2 V < VIH < 5 V) for PWM controlled
dimming mode. When unused, connect to AGND.
LEDx capable of 25 mA.
Power ground pin for LED current sink.
LEDx capable of 25 mA.
SEL1, SEL2, and SEL3 decide active LED strings.
On/off and serial dimming control. EN high enables IC and EN low disables IC. This pin can also be used to program
LEDx current. When unused, connect to AGND.
On/off and on/off LED current control with external PWM. Apply logic level PWM for PWM controlled dimming mode.
When unused, connect to AGND.
Power ground pin.
Connect to this pin to output capacitor +Ve node through a resistor to enable OVP (overvoltage protection). Default OVP
level with 0 Ω resistor is 30 V, and it can be programmed up to 47 V.
DMOS drain node.
Input supply for the IC. Decouple with a 0.1 µF ceramic capacitor.
Circuit ground pin.
Exposed pad. Electrically connectred to PGND and LGND; connect to PCB copper plane for heat transfer.
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
15
Flexible WLED/RGB Backlight Driver
for Medium Size LCDs
A8500
Package EC, 4 × 4 mm 26-Pin QFN/MLP
0.20
4.00
1
2
0.40
26
26
0.95
A
1
2
C
1.10
4.00
4.00
1.23
(Top View)
2.45
4.00
27X
D
SEATING
PLANE
0.08 C
0.20
C
(Pads on PCB)
0.75
0.40
0.40
B
1.23
1.10
2
1
26
2.45
(Bottom View)
All dimensions nomianl, not for tooling use
(reference JEDEC MO-220WGGE)
Dimensions in millimeters
Exact case and lead configuration at supplier discretion within limits shown
A Terminal #1 mark area
B Exposed thermal pad (reference only, terminal #1
identifier appearance at supplier discretion)
C Reference land pattern layout (reference IPC7351
QFN40P400X400X80-29M)
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances; when
mounting on a multilayer PCB, thermal vias at the exposed thermal pad land
can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5)
D Coplanarity includes exposed thermal pad and terminals
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
16
Flexible WLED/RGB Backlight Driver
for Medium Size LCDs
A8500
Revision History
Number
Date
Description
4
February 8, 2019
5
February 20, 2020
Product status changed to Pre-End-of-Life
Minor editorial updates
Copyright 2020, Allegro MicroSystems.
Allegro MicroSystems reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit
improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the
information being relied upon is current.
Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of
Allegro’s product can reasonably be expected to cause bodily harm.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems assumes no responsibility for its use; nor
for any infringement of patents or other rights of third parties which may result from its use.
Copies of this document are considered uncontrolled documents.
For the latest version of this document, visit our website:
www.allegromicro.com
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