A8513KLYTR-1-T

A8513 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver Features and Benefits • AEC-Q100 Qualified • Wide input voltage range of 4.5 to 40 V for start/stop, cold crank and load dump requirements • Boost converter switching frequency up to 2 MHz, allowing operation above the AM band • Excellent input voltage transient response • Internal secondary OVP for redundant protection • Fully integrated LED current sink and boost converter with 60 V DMOS FET • Maximum LED current of 150 mA • Drives up to 14 series LEDs • Single EN/PWM pin interface for PWM Dimming and Enable function • 5000:1 PWM dimming at 200 Hz Continued on the next page… Description The A8513 is a single-output white LED (WLED) driver for LCD backlighting. It integrates a current-mode boost converter with an internal power switch and one current sink. The A8513 can operate from a single power supply from 4.5 to 40 V, to accommodate start/stop, cold crank, and load dump requirements. A 2 MHz boost converter switching frequency allows the A8513 to operate above the AM radio band. If required, the fault flag can be used as part of a circuit to drive an external P-FET to disconnect the input supply from the system in the event of a fault. The A8513 provides protection against output short and overvoltage, open or shorted diode, open or shorted LED pin, shorted boost switch or inductor, shorted ISET resistor, and IC overtemperature. A dual level cycle-bycycle current limit function provides soft start and protects the internal current switch against high current overloads. The A8513 is provided in a 10-pin MSOP package (suffix LY) and a 16-pin TSSOP package (suffix LP). Both packages have an exposed thermal pad for enhanced thermal dissipation, and are lead (Pb) free, with 100% matte tin leadframe plating. 16-pin TSSOP with exposed thermal pad (LP package) Packages: Applications: • LCD backlighting for: ▫ Automotive infotainment ▫ Automotive cluster ▫ Automotive center stack ▫ Industrial LCD displays ▫ Portable DVD players ▫ Flatbed Scanners ▫ LED Lighting Not to scale 10-pin MSOP with exposed thermal pad (LY package) Typical Application Circuit VIN CIN VIN VC CVDD VDD PAD FAULT EN/PWM ISET RISET GND LED COMP CP RZ (Optional) CZ (Optional) L1 SW D1 VOUT ROVP1 OVP ROVP2 COUT A8513 Boost fSW (MHz) 0.25/0.5/1 2 2 2 2 VIN (min) (V) 5 10 8 6 5 LEDs per String (max) 14 14 12 9 7 A8513-DS Rev. 2 A8513 Features and Benefits (continued) Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver • Fault flag pin to alert the controller to a myriad of possible fault conditions • Protection Features: ▫ Shorted output ▫ Open or shorted LED pin ▫ Output undervoltage and overvoltage ▫ Input undervoltage ▫ Shorted boost switch or inductor ▫ Shorted ISET resistor ▫ Open boost Schottky ▫ Overtemperature Selection Guide Part Number A8513KLYTR-T A8513KLYTR-1-T A8513KLYTR-2-T A8513KLYTR-3-T A8513KLPTR-T A8513KLPTR-1-T A8513KLPTR-2-T A8513KLPTR-3-T Oscillator Frequency, fSW (MHz) 2 1 0.5 0.25 2 1 0.5 0.25 Packing* 4000 pieces per 13-in. reel Contact factory for availability 4000 pieces per 13-in. reel Contact factory for availability Package 10-pin MSOP with exposed thermal pad 16-pin TSSOP with exposed thermal pad *Contact Allegro® for additional packing options Absolute Maximum Ratings* Characteristic LED Pin OVP Pin ¯ UL ¯ ¯ VIN and ¯ ¯¯ ¯ ¯ Pins FA¯ ¯ T SW Pin ISET Pin All Other Pins Operating Ambient Temperature Maximum Junction Temperature Storage Temperature TA TJ(max) Tstg Range K Symbol VLED VOVP VIN , VFAULT VSW VISET Continuous t < 50 ns Notes Rating –0.3 to 55 –0.3 to 60 -0.3 to 40 –0.6 to 60 –1.0 –0.3 to 5.5 –0.3 to 7 –40 to 125 150 –55 to 150 Unit V V V V V V V ºC ºC ºC *Stresses beyond those listed in this table may cause permanent damage to the device. The Absolute Maximum ratings are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the Electrical Characteristics table is not implied. Exposure to Absolute Maximum-rated conditions for extended periods may affect device reliability. Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 2 A8513 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver Pin-out Diagram NC 1 NC 2 SW 3 OVP 4 VIN 5 FAULT 6 VDD 7 NC 8 PAD 16 NC 15 COMP 14 GND 13 GND 12 ISET 11 EN/PWM 10 LED 9 NC SW 1 OVP 2 VIN 3 FAULT 4 VDD 5 PAD 10 COMP 9 GND 8 ISET 7 EN/PWM 6 LED LP Package LY Package Terminal List Table Name COMP ¯ ¯¯ ¯ ¯ ¯ UL ¯ ¯ FA¯ ¯ T GND ISET LED NC OVP PAD EN/PWM SW VDD VIN Number LP 15 6 13,14 12 10 1,2,8,9,16 4 – 11 3 7 5 LY 10 4 9 8 6 – 2 – 7 1 5 3 Function Output of the error amplifier and compensation node. Connect compensation network from this pin to GND for control loop compensation. This pin is used to indicate fault conditions. Logic low indicates that the A8513 has a fault present. Ground. Connect the RISET resistor between this pin and GND to set the 100% LED current level. Connect the cathode of the LED string to this pin. No connection. This pin is used to sense an overvoltage condition. Connect a resistive divider from the VOUT node to this pin to adjust the Overvoltage Protection (OVP). Exposed pad of the package providing enhanced thermal dissipation. This pad must be connected to the ground plane(s) of the PCB with at least 8 thermal vias, directly in the pad. PWM dimming pin. Used to control LED intensity by using pulse width modulation. The drain of the internal NMOS switch of the boost converter. Output of internal LDO. Connect a 0.1 μF decoupling capacitor between this pin and GND. Input power to the A8513. Thermal Characteristics*may require derating at maximum conditions, see application information Characteristic Symbol LP package Package Thermal Resistance (Junction to Ambient) RθJA LY package Package Thermal Resistance (Junction to Pad) RθJP Test Conditions* On 4-layer PCB based on JEDEC standard On 2-layer PCB with 3.8 in.2 of copper area each side Value 34 43 48 48 2 Unit ºC/W ºC/W ºC/W ºC/W ºC/W On 4-layer PCB based on JEDEC standard On 2-layer PCB with 2.5 in.2 of copper area each side *To be verified by characterization. Additional thermal information available on the Allegro® website. Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 3 A8513 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver Functional Block Diagram VDD Internal VCC VIN Regulator UVLO Internal VCC 1.235 V Ref VREF Enable SW COMP ISS Thermal Shutdown Enable Current Sense PWM 100 kΩ Fault Short LED Detect Internal VCC ISET VREF ISS LED Driver ISET LED FAULT GND + EN/PWM Enable – – Internal Soft Start OVP Sense VREF – OVP Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com + + – Oscillator + ∑ Driver Circuit Diode Open Sense 4 A8513 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver ELECTRICAL CHARACTERISTICS1 Valid at VIN = 16 V, TA = 25ºC, Characteristics Input Voltage Specifications Operating Input Voltage Range VIN Pin UVLO Start Threshold VIN Pin UVLO Stop Threshold VIN Pin UVLO Hysteresis Input Current Input Quiescent Current Input Sleep Supply Current Input logic Level (Low) Input logic Level (High) EN/PWM Pull-Down Resistor ¯ ¯¯ ¯ ¯ Pin Pull-Down Voltage ¯ UL ¯ ¯ FA¯ ¯ T ¯ ¯¯ ¯ ¯ Pin Leakage Current ¯ UL ¯ ¯ FA¯ ¯ T Error Amplifier Open Loop Voltage Gain Transconductance Source Current Sink Current COMP Pin Pull-Down Resistance Output Overvoltage Protection Overvoltage Protection Threshold OVP Pin Leakage Current OVP Pin Undervoltage Threshold Secondary Overvoltage Protection BOOST Switch Switch On-Resistance Switch Leakage Current Switch Current Limit Secondary Switch Current Limit Minimum Switch On-Time Minimum Switch Off-Time RDS(on)SW ISWlkg ISW(LIM) ISW(LIM2) tSW(ON) tSW(OFF) ISW = 750 mA, VIN = 16 V VOVPHI(th) IOVPH VUVP(th) VOVP(sec) Measured at OVP Pin AVOL gm IEA(SRC) IEA(SINK) RCOMP ΔICOMP = ±10 μA VCOMP = 1.5 V VCOMP = 1.5 V ¯ ¯¯ ¯ ¯ asserted ¯ UL ¯ ¯ FA¯ ¯ T IQ IQSLEEP VIL VIH REN/PWM VFAULT IFAULTlkg VIN VUVLOrise VUVLOfall VUVLOhys VIN rising VIN falling Symbol indicates specifications guaranteed through the full operating temperature range with TA = TJ = –40ºC to125 ºC, typical specifications are at TA = 25ºC; unless otherwise specified Test Conditions Min. 4.5 − − − EN/PWM = VIH , SW = 2 MHz, no load VIN = 16 V, EN/PWM = 0 V 5 V < VIN < 40 V 5 V < VIN < 40 V EN/PWM = 5 V IFAULT = 0.5 mA VFAULT = 5 V − − − 1.5 − − − − − − − − 1.168 − − 53 − − − 1.9 Higher than ISW(LIM)(max) in all conditions, A8513 latches when detected 3 − − Typ. − − − 450 5 1 − − 100 − − 45 990 –360 360 2000 1.218 − − 55.5 450 0.1 10 2.2 3.5 75 55 Max. 40 4.35 3.90 − − 10 400 − − 0.4 1 − − − − − 1.268 100 110 58 800 1 − 2.8 4.64 100 85 Unit V V V mV mA μA mV V kΩ V μA dB μA/V μA μA Ω V nA mV V mΩ uA uA A A ns ns ¯ UL ¯ ¯ Input Logic Levels (EN/PWM and ¯ ¯¯ ¯ ¯ 3) FA¯ ¯ T Standard CMOS input, measured at VOVP = 1.2 V Measured at OVP Pin Measured at SW Pin VSW = 16 V, EN/PWM = VIL , TA = TJ between –40ºC and 85ºC VSW = 16 V, EN/PWM = VIL , TA = TJ = 125ºC Continued on the next page… Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 5 A8513 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver ELECTRICAL CHARACTERISTICS1 (continued) Valid at VIN = 16 V, TA = 25ºC, indicates specifications guaranteed through the full operating temperature range with TA = TJ = –40ºC to125 ºC, typical specifications are at TA = 25ºC; unless otherwise specified Characteristics Oscillator Frequency A8513KLYTR-1-T, A8513KLPTR-1-T Oscillator Frequency fSW A8513KLYTR-2-T, A8513KLPTR-2-T A8513KLYTR-3-T, A8513KLPTR-3-T A8513KLYTR-4-T, A8513KLPTR-4-T LED Current Sinks LED Accuracy LED Regulation Voltage ISET to ILED Current Gain ISET Pin Voltage Allowable ISET Current Soft Start LED Current Gain ErrLED VLED AISET VISET ISET AILEDSS Current through enabled LED pin during soft start Measured while EN/PWM = low during dimming control, and internal references are powered-on (exceeding tPWML results in shutdown) First cycle when powering-up A8513 Time between PWM enable and when LED current reaches 90% of maximum; VPWM = 0 → 2 V Time between PWM enable going low and when LED current reaches 10% of maximum; VPWM = 2 → 0 V Temperature rising ISET = 150 μA ISET = 150 μA ISET = 150 μA − − 1014 − 40 − − 880 1045 1.003 − 48 3 − 1076 − 160 − % mV A/A V μA A/A 1.8 0.9 450 225 2 1 500 250 2.2 1.1 550 275 MHz MHz kHz kHz Symbol Test Conditions Min. Typ. Max. Unit Maximum PWM Dimming Off-Time Minimum PWM On-Time EN/PWM High to LED-On Delay tPWML tPWMH tdPWM(on) − − − 16 1.5 250 − 3 500 ms μs ns EN/PWM Low to LED-Off Delay Thermal Protection (TSD) Thermal Shutdown Threshold2 Thermal Shutdown 1For tdPWM(off) − 250 500 ns TTSD TTSDHYS − − 165 20 − − ºC ºC Hysteresis2 input and output current specifications, negative current is defined as coming out of the node or pin (sourcing), and positive current is defined as going into the node or pin (sinking). 2Ensured by design and characterization, not production tested. 3 ¯ ¯¯ ¯ ¯ pin is high voltage tolerant ¯ UL ¯ ¯ FA¯ ¯ T Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 6 A8513 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver Characteristic Performance 10 9 VIN = 40 V 8 7 6 5 4 3 2 1 0 -55 VIN Input Sleep Mode Current versus Ambient Temperature fSW (MHz) 2.20 2.15 2.10 2.05 2.00 1.95 1.90 1.85 1.80 Switch Frequency versus Ambient Temperature IQSLEEP (μA) -5 45 95 145 -55 -5 45 95 145 Temperature (°C) VIN UVLO Rising Threshold Voltage versus Ambient Temperature 4.345 4.295 4.245 4.195 4.145 4.095 4.045 3.995 3.945 3.855 3.805 Temperature (°C) VIN UVLO Falling Threshold Voltage versus Ambient Temperature VUVLOrise (V) VUVLOfall (V) -5 45 95 145 3.755 3.705 3.655 3.605 3.555 3.505 -55 -55 -5 45 95 145 Temperature (°C) Efficiency Versus Input Voltage ILED = 90 mA, LED Vf ≈ 3.2 V 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 5 6 7 5 series LEDs; VOUT = 17 V 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 5 6 7 8 Temperature (°C) Efficiency Versus Input Voltage ILED = 150 mA, LED Vf ≈ 3.2 V 5 series LEDs; VOUT = 17 V Efficiency, η (%) Efficiency, η (%) 6 series LEDs; VOUT = 20 V 7 series LEDs; VOUT = 23 V 6 series LEDs; VOUT = 20 V 7 series LEDs; VOUT = 23 V 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 9 10 11 12 13 14 15 16 17 18 19 20 21 22 Input Voltage, VIN (V) Input Voltage, VIN (V) Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 7 A8513 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver Normalized LED Current Ratio versus PWM Duty Cycle fPWM = 200 Hz, VIN = 12 V, 6 series LEDs (≈ 21 V, 150 mA) 100 LED Current Ratio (%) 10 1 PWM dimming only 0.1 PWM + analog dimming 0.10 0.01 0.10 1 10 100 PWM Duty Cycle (%) LED Current versus Ambient Temperature ILED = 150 μA 151.0 Switch Current Limit versus Ambient Temperature 2.5 Swtich Current, ISW (A) LED Current, ILED (mA) 150.8 150.6 150.4 150.2 150.0 149.8 149.6 -55 2.4 2.3 2.2 2.1 2.0 1.9 1.8 1.7 1.6 -55 -5 45 95 145 -5 45 95 145 Temperature (°C) Temperature (°C) Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 8 A8513 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver Functional Description The A8513 incorporates a current-mode boost controller with internal DMOS switch, and a single LED current sink. It can be used to drive an LED string of up to 14 white LEDs in series, with current up to 150 mA. For optimal efficiency, the output of the boost stage is adaptively adjusted to the minimum voltage required to power the LED string. This is expressed by the following equation: VOUT = VLED + VREG where VLED is the voltage drop across the LED string, and (1) IC will not power up until the short is removed. At this time the output is also checked for a VOUT short, using the OVP pin. If the OVP pin does not rise above VOVPLO(th) the IC will not power up. Soft start function During soft start, the COMP pin delivers a steady 80 uA current, the LED pin current gain is set to AILEDSS . The lower gain will help limit the inrush current generated by charging the output VREG is the regulation voltage of the LED current sink (typically 0.88 V at the maximum LED current). Enabling the IC The IC turns on when a logic high signal is applied to the EN/PWM pin (figure 1), and turns off when this pin is pulled to a logic low. For the device to be enabled, the voltage on the VIN pin must be greater than VUVLOrise to clear the undervoltage lockout (UVLO) threshold (figure 2). Before startup, the A8513 goes through a system check to determine if there are any fault conditions that would prevent the system from functioning correctly. Powering up: LED pin short to GND check After the VIN pin goes above VUVLOrise, the IC checks if the LED pin is shorted to GND by pre-charging the LED pin (figure 3). When the voltage on the LED pin exceeds 260 mV, the A8513 proceeds with soft start. If a short is present on the LED pin, the VOUT C1 VOUT UVLO threshold exceeded ILED C2 C3 COMP EN/PWM C4 t Figure 2. Start-up by slowly ramping up VIN with EN/PWM at 2 V; shows VOUT (ch1, 10 V/div.), ILED (ch2, 50 mA/div.), COMP (ch3, 1 V/div.), and EN/PWM (ch4, 2 V/div.), time = 2 ms/div. FAULT C1 C2 LED detection C1 ILED C2 C3 C3 VLED ILED C4 COMP EN/PWM EN/PWM t ¯ UL ¯ ¯ Figure 3. LED detection period; shows ¯ ¯¯ ¯ ¯ (ch1, 5 V/div.), VLED (ch2, FA¯ ¯ T 1 V/div.), ILED (ch3, 100 mA/div.), and EN/PWM (ch4, 5 V/div.), time = 500 μs/div. Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com C4 t Figure 1. Start-up by slowly ramping up EN/PWM with VIN at 16 V; shows VOUT (ch1, 10 V/div.), ILED (ch2, 50 mA/div.), COMP (ch3, 1 V/div.), and EN/PWM (ch4, 2 V/div.), time = 2 ms/div. 9 A8513 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver capacitors. After the A8513 senses there is enough voltage on the LED pin, it increases the LED current to the preset regulation current. The COMP pin will continue to source 80 uA until the LEDs are able to run at the full preset current level. Boost converter frequency The switching frequency of the boost regulator is preset internally to one of four frequencies. The frequency options are: Part Number A8513KLYTR-1-T A8513KLYTR-2-T A8513KLYTR-3-T A8513KLYTR-4-T Switching Frequency (fSW) (MHz) 2 1 0.5 0.25 LED current setting and LED dimming The LED current, ILED , is set using the ISET pin, and can range from 40 to 150 mA. Connect a resistor, RISET , between this pin and GND to set the ILED current, according to the following formula : VISET ILED = × AISET (2) RISET = 1.003 V × 1045 RISET where ILED is in A and RISET is in Ω. This formula sets the maximum current through the LEDs, which is referred to as the 100% current. PWM dimming The LED current can be reduced from the 100% current level by PWM dimming using the EN/PWM pin. When the EN/PWM pin is pulled high, the A8513 turns on and the LED pin sinks 100% current (figure 4). When EN/PWM is pulled low, the boost converter and LED sink are turned off. The compensation (COMP) pin is floated, and critical internal circuits are kept active. The A8513 has very fast turn-on and turn-off times during PWM dimming to minimize low PWM duty cycle errors. The typical PWM signal delay tdPWM(on) is 250 ns (figure 5). The typical tdPWM(off) time, between the PWM signal and the LED current going low, is shown in figure 6. Analog dimming The A8513 can also be dimmed by using an external DAC or other voltage source applied either directly to the ground side of the RISET resistor or through an external resistive divider to the COMP C1 C2 VLED ILED C3 C4 EN/PWM t Figure 4. Typical PWM dimming sequence, with PWM dimming frequency of 1000 Hz and 10% duty cycle; shows COMP (ch1, 1 V/div.), VLED (ch2, 10 V/div.), ILED (ch3, 100 mA/div.), and EN/PWM (ch4, 5 V/div.), time = 500 μs/div. C3 C3 ILED C4 C4 ILED EN/PWM t Figure 5. Typical EN/PWM signal (5 V/div.) to LED current (100 mA/div.) turn-on delay. The delay measured about 250 ns. VIN is 12 V, VOUT for 10 series LEDs is approximately 36 V, ILED is 150 mA. (time = 500 ns/div.) EN/PWM t Figure 5. Typical EN/PWM signal (5 V/div.) to LED current (100 mA/div.) turn-off delay. The typical delay is about 250 ns. (time = 500 ns/div.) Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 10 A8513 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver ISET pin. The limitation of this form of dimming is that the internal ISET error amplifier is designed to work from 40 to 160 μA, thus limiting the dimming ratios that can be achieved. Figure 7, top panel is a typical application using a DAC to control the LED current using a single resistor connected to the ISET pin. The ISET current is controlled by the following formula: VISET – VDAC RISET lower value of the preset LED current set by the RISET resistor: ▫ VDAC = 1.003 V; the output is strictly controlled by RISET ▫ VDAC > 1.003 V; the LED current is reduced ▫ VDAC < 1.003 V; the LED current is increased Output Overvoltage Protection (OVP) and Output Undervoltage Protection (UVP) The A8513 has output overvoltage protection (OVP), output undervoltage protection and secondary overvoltage protection (open diode). of 1.218 V. A resistive divider can be used to set the VOUT overvoltage protection threshold up to 45 V (see figure 8). There is no restriction on the value of the resistor chosen, but it is recommended that the divider current be kept between 10 and 60 μA. This will minimize the effect of sense current on the accuracy of OVP, and minimize output voltage bleed-off during PWM dimming. Formulas for calculating the OVP resistor voltage divider are shown below. ROVP1 = (VOVP – 1.218 V) / ISET ROVP2 = 1.218 V / ISET (5) (6) Overvoltage Protection The OVP pin has a threshold, VOVPHI(th) , ISET = (3) Where VISET is the ISET pin voltage and VDAC is the DAC output voltage. When the DAC voltage is equal to VISET , the internal reference, there is no current through RISET . When the DAC voltage starts to decrease, the ISET current starts to increase, thus increasing the LED current. When the DAC voltage is 0 V, the LED current will be at its maximum. • For a dual-resistor configuration (lower panel of figure 7), the ISET current is controlled by the following formula: VISET VDAC – VISET – ISET = (4) RISET R1 The advantage of this circuit is that the DAC voltage can be higher or lower, thus adjusting the LED current to a higher or The OVP function is not inherently a latched fault. If the OVP condition occurs during a load dump, the IC will stop switching but not shut down. DAC VDAC GND R ISET A8513 ISET GND VOUT A8513 OVP ROVP1 DAC VDAC GND R1 A8513 ISET R ISET Figure 7. Simplified diagram of voltage LED current control (upper) single resistor, and (lower) dual resistors. Figure 8. Simplified diagram of the OVP pin functions. Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com – GND + + – ROVP2 1.218 V 100 mV 11 A8513 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver B The OVP condition can become a latched fault if, during an OVP event, the LED current is not in regulation. This typically occurs during an open LED string situation. If both faults occur simultaneously the IC will shut down and the fault flag will be set (see figures 9, 10, and 11). Undervoltage Protection The OVP pin is also used to detect VOUT C1 C2 FAULT output undervoltage protection (UVP) against VOUT short to GND. When the UVP fault is tripped, the fault flag is set (fig¯ ¯¯¯ ure 12). Using an external PMOSFET interfaced to the ¯ ¯ ¯ ¯ ¯ FAULT pin (figure 13), the user can disconnect the IC from VIN during a fault event. B ILED C3 C4 A EN/PWM t VOUT C FAULT C2 C1 C3 A Figure 11. Power-up into an open LED situation. (A) A8513 enabled, (B) fault flag (ch2, 5 V/div.) is set when OVP threshold is reached. Shows VOUT (ch1, 20 V/div.), ILED (ch3, 100 mA/div.), and EN/PWM (ch4, 5 V/div.), time = 1 ms/div.. ILED VOUT B A C4 C1 EN/PWM t C2 IIN Figure 9. Open LED condition during PWM dimming. (A) The LED string (ch3, 100 mA/div.) is opened (no current flow through the LED pin) during an off-period for the PWM dimming signal (ch4, 5 V/div.). (B) At the next PWM cycle, the LED open condition is detected and the A8513 starts boosting the output voltage (ch1, 10 V/div.). (C) Upon reaching the OVP threshold and sensing no LED current flow, the A8513 shuts down and sets the fault flag (ch2, 5 V/div.). (time = 10 ms/div.) B B PMOSFET Gate C3 C4 FAULT t Figure 12. Input disconnect switch function during an output short. (A) VOUT (ch1, 10 V/div.) falls during VOUT short to ground, (B) high peak current present due to short, before the PMOSFET (ch3, 5 V/div.) is disconnected. Shows input current (ch2, 10 A/div.) and fault flag (ch4, 5 V/div.), time = 50 μs/div. VOUT C1 C C FAULT C2 1 kΩ VIN L1 AO4421 5V AA C3 ILED 1 kΩ C4 VLED t Figure 10. Open LED condition when PWM duty cycle is 100%. (A) The LED string (ch3, 200 mA/div.) is opened (no current flow through the LED pin). (B) The A8513 starts boosting the output voltage (ch1, 20 V/div.). (C) Upon reaching the OVP threshold there is still no current flow through the LED pin, and the A8513 shuts down and sets the fault flag (ch2, 5 V/div.). The LED pin voltage is ch4, 2 V/div. (time = 50 μs/div.) 10 kΩ 2N7002 A8513 FAULT Figure 13. typical circuit for input disconnect switch. Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 12 A8513 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver Secondary Overvoltage Protection The A8513 has secondary overvoltage protection for the internal boost switch in the event of an open diode condition. If the voltage on the SW pin exceeds the device safe operating voltage rating, the A8513 is disabled and remains latched off (figure 14). The EN/PWM pin must be brought low longer than tPWML to clear this fault. Boost switch overcurrent protection The boost switch is protected with cycle-by-cycle current limiting set to ISW(LIM) (figure 15). There is also a secondary current limit that is sensed on the boost switch. When this current limit is exceeded, the A8513 immediately shuts down (figure 16). The secondary current limit is above the cycle-by-cycle current limit and protects the switch from destructive currents if the boost inductor is shorted. A C1 B FAULT C B COMP A C2 IL Cycle-by-cycle inductor current limit C3 t Figure 15. Cycle-by-cycle current limit, inductor current is C3 (1 A/div.). (A) Fault flag (ch1, 5 V/div.) is not set during cycle-by-cycle current limit, (B) COMP pin signal (C2, 2 V/div.) is close to 3.6 V. (time = 1 ms/div.) A C1 FAULT B VSW VSW C1 B C2 A Normal operation C2 C3 Inductor Short FAULT ILED C3 IL t t Figure 14. Secondary Overvoltage protection tripped when the switching diode is opened during operation. (A) High voltage is detected on SW node (ch1, 20 V/div.) and the A8513 is shut down. (B) Fault flag is set (ch2, 5 V/div.). Shows LED current (ch3, 100 mA/div.), time = 500 ns/div. Figure 16. Secondary current limit during an inductor short condition. (A) limit is reached, (B) the IC shuts down and the fault flag is set. Shows fault flag (c1, 5 V/div.), switch node voltage (C2, 20 V/div.), and current through the inductor (C3, 2 A/div.); time = 1 μs/div. Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 13 A8513 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver Input UVLO When VIN rises above the UVLO threshold VUVLOrise, the A8513 can be enabled by asserting EN/PWM. The A8513 is disabled when VIN falls below VUVLOfall – VUVLOhys for more than 1 μs (figure 17). This 1 μs lag prevents false shut downs during momentary glitches on the input power supply. VDD The VDD pin provides regulated bias supply for internal circuits. Connect a capacitor, CVDD , with a value of 0.01 to 0.1 μF to this pin. Shutdown If the EN/PWM pin is pulled low for more than tPWML , the device enters shutdown mode and clears all internal fault registers. In shutdown, the A8513 will disable all current sources and wait until EN/PWM goes high to re-enable the IC. VIN FAULT A A B B C1 C2 C3 C4 ILED EN/PWM t Figure 17. Input UVLO. (A) UVLO tripped (VIN, ch1, 2 V/div.), (B) fault flag set (ch2, 2 V/ div.). Shows LED current (ch3, 100 mA/div.) and EN/PWM (ch4, 1 V/div.), time = 5 ms/div. Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 14 A8513 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver Fault protection during operation The A8513 constantly monitors the state of the system to determine if any fault conditions occur. The response to a triggered fault condition is summarized in the table below. Note: Some of the protection features might not be active during startup, to prevent false triggering of fault conditions. Fault Mode Table Fault Name Primary Switch Current Protection (cycle-by-cycle current limit) Secondary Switch Current Limit Secondary OVP LED Pin Short Protection The latching faults can be cleared in two ways: • Keep the EN/PWM pin low for more than 16 ms. • Cycle the power to create a UVLO condition. Fault behavior diagrams are shown in figures 18, 19 and 20. Type Active Fault Flag Set No Description This fault condition is triggered by the cycle-by-cycle current limit ISW(LIM) . Prevents current in inductor from exceeding ISW(LIM) . When the current through the boost switch exceeds the secondary current SW limit, ISW(LIM2) , the A8513 immediately shuts down. Secondary overvoltage protection is used for open diode detection. When diode D1 opens, the switch pin voltage will increase until VOVP(sec) is reached. This fault prevents the A8513 from starting-up if the LED pin is shorted to ground. After the short is removed, soft-start is allowed to begin. This fault occurs when the ISET current goes above 150% of the maximum Allowable ISET Current, ISET(max). The boost will stop switching and the IC will disable the LED sinks until the fault is removed. When the fault is removed, the IC tries to regulate to the preset LED current. This fault occurs when the OVP pin exceeds the VOVPHI(th) threshold. The A8513 immediately stops switching. If at the same time, the LED voltage is below regulation, the IC will shut down. This fault occurs when the OVP pin exceeds VOVPHI(th) threshold (for example, during a load dump). The A8513 immediately stops switching, but continues to sink current through the LED pin. This fault occurs when the OVP pin senses less than 110 mV on the pin. This fault occurs when the die temperature exceeds TTSD . This fault occurs when VIN drops below VUVLOfall . This fault resets all latched faults. Boost Off for a single cycle Sink driver On Auto-restart Always Latched Always Yes Off Off Latched Always Yes Off Off Auto-restart Startup Yes Off Off ISET Short Protection Auto-restart Always Yes Off Off LED String Open Protection Latched Always Yes Off Off Output Overvoltage Protection Output Undervoltage Protection Overtemperature Protection VIN UVLO Auto-restart Always No Off On Auto-restart Auto-restart Always Always Yes Yes Yes until internal regulator shuts down Off Off Off Off NA Always Off Off Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 15 A8513 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver ISET Short to Ground A C1 Recovery from ISET Short to Ground FAULT VSW B FAULT C1 C2 C2 ILED C3 ILED ISET ISET C3 C4 t ¯ UL ¯ ¯ Figure 18. ¯ ¯¯ ¯ ¯ (ch1, 5 V/div.), VSW (ch2, 20 V/div.), ILED (ch3, FA¯ ¯ T 100 mA/div.), and ISET (ch4, 1 V/div.), time = 1 μs/div. t ¯ UL ¯ ¯ Figure 19. ¯ ¯¯ ¯ ¯ (ch1, 5 V/div.), ILED (ch2, 100 mA/div.), and ISET (ch3, FA¯ ¯ T 1 V/div.), time = 2 ms/div. OVP Tripped During Load Dump A VIN C1 VOUT VSW B C2 C3 C4 FAULT t Figure 20. VIN (ch1, 20 V/div.), VOUT (ch2, 20 V/div.), and VSW (ch3, ¯ UL ¯ ¯ 20 V/div.), ¯ ¯¯ ¯ ¯ (ch4, 5 V/div.), time = 2 ms/div. FA¯ ¯ T Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 16 A8513 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver Design Example This section provides a method for selecting component values when designing an application using the A8513. A typical circuit using this design is shown in figure 21. Assumptions: For the purposes of this example, the following are given as the application requirements: • VIN: 5 to 16 V • Quantity of series LEDs, #SERIESLEDS: 6 • LED current, ILED: 120 mA • Vf at 120 mA: 3.2 V • fSW: 2 MHz • TA(max): 85°C • PWM dimming frequency: 200 Hz with a minimum duty cycle of 1%. Procedure: Select the appropriate configuration and the individual component values in an ordered sequence. Step 1: Connect the series LED string from VOUT to the LED pin. Step 2: Determine the value for the ILED setting resistor, RISET : RISET = VISET × AISET/ ILED = (1.003 × 1045) / 120 mA = 8.74 kΩ Choose an 8.66 kΩ resistor. Step 3: Determine the values of the OVP resistors. The OVP resistors are connected between the OVP pin and the output voltage (VOUT) and the OVP pin and ground. Step 3a: The first step is to determine the maximum voltage based on the LED Vf requirements. To this value the regulation voltage should be added, as well as another 2 V to account for noise, output ripple, and resistor tolerances. The regulation voltage, VLED , of the A8513 is 880 mV. Then: VOUT(OVP) = #SERIESLEDS × Vf + VLED + 2 V = 6 × 3.2 V+ 0.880 V + 2 V = 22.08 V (8) (7) To find the OVP resistor values, the user should choose a resistor divider that has very low current (IOVP) and ROVP should be approximately 1 MΩ. A good starting point is 50 μA as IOVP . (The IOVP current is used later in calculating the total leakage current.) Then : ROVP1 = (VOUT(OVP) – VOVPHI(th) ) / IOVP = (22.08 V – 1.218 V) / 50 μA = 417.2 kΩ and: ROVP2 = VOVPHI(th) / IOVP = 1.218 V / 50 μA = 24.36 kΩ Choose a value of resistor that is higher value than the calculated ROVP . In this case 422 kΩ was selected. Below is the actual value of the minimum OVP trip level with the selected resistor: VOUT(OVP) = ROVP × IOVP × VOVPHI(th) = 422 kΩ × 50 μA + 1.218 V = 22.32 V STEP 3b: At this point a quick check should be done to determine if the conversion ratio is acceptable for the selected frequency: Dmaxofboost = 1 – tSW(OFF) × fSW = 1 – 85 ns × 2 MHz = 83% where the Minimum Switch Off-Time, tSW(OFF) , is found in the Electrical Characteristics table. The Theoretical Maximum VOUT is then calculated as: VOUT(max) = = VIN(min) 1 – Dmaxofboost – Vd (13) (12) (11) (10) (9) 5V – 0.4 V = 29.01 V 1 – 0.83 where Vd is the diode forward voltage. The Theoretical Maximum VOUT value must be greater than the value VOUT(OVP) . If this is not the case, a lower frequency version of the A8513 should be chosen to meet the maximum duty cycle requirements. Step 4: Inductor selection. The inductor should be chosen such that it can handle the necessary input current. In most applications, due to stringent EMI requirements, the system must operate in continuous conduction mode throughout the whole input voltage range. Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 17 A8513 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver Step 4a: Determine the Duty Cycle: D(max) = 1 – =1– VIN(min) VOUT(OVP) + Vd 5V = 78% 22.32 V + 0.4 V (14) then: L= = VIN(min) ΔIL fSW D(max) 0.78 = 10.83 μH (18) 5V 2 MHz 0.18 A where Vd is the voltage drop of the boost diode. Step 4b: Determine the maximum and minimum input current to the system. The minimum input current will dictate the inductor value. The maximum current rating will dictate the current rating of the inductor. Given IOUT = ILED = 120 mA: IIN(max) = = VOUT(OVP) IOUT VIN(min) 22.32 V 120 mA = 0.595 A 5 V 0.9 (15) Double-check to make sure the ½ current ripple is less than IIN(min): (19) IIN(min) > 1/2 ΔIL 0.19 A > 0.09 A A good inductor value to use would be 10 μH. Step 4d: This step verifies that there is sufficient slope compensation for the inductor chosen. The required slope compensation value for different frequencies is listed below: fSW (MHz) where η is efficiency. Next, calculate minimum input current, as follows: VOUT(OVP) IOUT IIN(min) = VIN(max) = 22.32 V 16 V 120 mA = 0.19 A 0.9 (16) Slope Compensation (A/μs) 3.73 1.85 3.70 1.83 2 1 0.500 0.250 Next insert the inductor value used in the design: ΔILused = = VIN(min) D(max) Lused fSW 0.78 5V 10 μH 2.0 MHz = 0.20 A (20) A good approximation of efficiency η can be taken from the efficiency curves located in the data sheet. A value of 90% is a good starting approximation. STEP 4c: Determine the inductor value. To assure that the inductor operates in continuous conduction mode the value of inductor should be set such that the ½ inductor ripple current is not greater than the average minimum input current. A good inductor choice for inductor ripple current is 30% of the maximum input current: ΔIL = IIN(max) × 0.3 = 0.595 A × 0.3 = 0.18 A (17) Calculate the minimum required slope: Required Slope (min) = ΔILused 1 10 –6 1 (1 – D(max)) 1 10 –6 (1 – 0.78) = 1.8 A/μs (21) fSW = 0.20 A 1 2.0 MHz Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 18 A8513 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver For a stable system, the required minimum slope must be smaller than the IC slope compensation. Note: The slope compensation value is in A/μs; the constant multiplier. STEP 4e: Determine the inductor current rating : ILminimum rating = IIN(max) + 1/2 ΔILused = 0.595 A + 0.20 A / 2 = 0.695 A (22) 1×10-6 is a 200 Hz and the minimum duty cycle is 1%. Typically the voltage variation on the output during PWM dimming must be less than 250 mV (VCOUT) so that no audible noise can be heard. The capacitance can be calculated as follows: COUT = Ilkg 1 – Ddimming(min) fPWM(dimming) V COUT (24) Step 5: Choose the proper switching diode. The switching diode should be chosen for three characteristics when it is used in LED lighting circuitry. The first and most obvious are the current rating of the diode and the reverse voltage rating. The reverse voltage rating should be such that during operation condition the voltage rating of the device is larger than the maximum output voltage; in this case it is VOUT (OVP) . The peak current through the diode is: Idp = IIN(max) + 1/2 ΔILused (23) = 0.595 A + 0.20 A / 2 = 0.695 A The third major component in deciding the switching diode is the reverse current, IR , characteristic of the diode. This characteristic is especially important when PWM dimming is implemented. During PWM off-time the boost converter is not switching. This results in a slow bleeding off of the output voltage, due to leakage currents. IR can be a large contributor, especially at high temperatures. On the diode that was selected in this design, the current varies between 1 and 100 μA. Step 6: Choose the output capacitors. The output capacitors should be chosen such that they provide filtering for both the boost converter and for the PWM dimming function. The biggest factors that contribute to the size of the output capacitor is PWM dimming frequency and the PWM duty cycle. Another major contributor is leakage current, Ilkg . This current is a combination of the OVP resistor divider, IOVP , and the reverse leakage of the switching diode. In this design the PWM dimming frequency is = 120 μA 1 – 0.01 = 2.38 μF 200 Hz 0.250 V A capacitor larger than 2.38 μF capacitor should be selected due to degradation of capacitance at high voltages on the capacitor. One ceramic 4.7 μF, 50 V capacitor is a good choice to fulfill this requirement. Corresponding capacitors include: Vendor Murata Murata Value 4.7 μF 50 V 2.2 μF 50 V Part number GRM32ER71H475KA88L GRM31CR71H225KA88L The rms current through the capacitor is given by: ∆IL IIN(max) 12 1 – D(max) 0.20 A 0.595 A 12 = 0.23 A 1 – 0.78 ICOUTrms = IOUT D(max) + (25) = 0.120 A 0.78 + The output capacitor should have a current rating of at least 230 mA. The current rating of the 4.7 μF, 50V capacitor is 1.5 A. Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 19 A8513 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver STEP 7: Select the input capacitor. The input capacitor should be selected such that it provides good filtering of the input voltage waveform. A good rule of thumb is to set the input voltage ripple, ΔVIN to be 1% of the minimum input voltage. The minimum input capacitor requirements are as follows: CIN = = ∆IL 8 8 ∆VIN 0.20 A = 0.25 μF 2 MHz 0.05 V fSW (26) The rms current through the capacitor is given by: IOUT × ∆IL IIN(max) IINrms = (1 – D(max)) 12 0.120 × 0.20 A 0.595 A = 0.05 A (1 – 0.78) 12 (27) = A good ceramic input capacitor with ratings of 2.2 μF, 50V or 4.7 μF, 50 V will suffice for this application. Corresponding capacitors include: Vendor Murata Murata Value 4.7 μF 50 V 2.2 μF 50 V Part number GRM32ER71H475KA88L GRM31CR71H225KA88L VIN CIN 4.7 μF 50 V VC 100 kΩ L1 10 μH SW VIN CVDD 0.1 μF VDD PAD FAULT EN/PWM ISET RISET 8.66 kΩ GND D1 ROVP1 422 kΩ OVP ROVP2 24.3 kΩ VOUT A8513 COUT 4.7 μF 50 V LED COMP CP 120 pF RZ 120 Ω CZ 0.47 μF Figure 21. A typical circuit designed using the example above in this section. Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 20 A8513 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver Typical Application Drawings R1 VIN CIN RP A L1 SW VIN VDD D1 VOUT ROVP1 OVP ROVP2 COUT A8513 PAD CVDD R7 FAULT EN/PWM ISET RISET GND LED COMP CP RZ (Optional) CZ (Optional) A R1 is used to provide a leakage path such that the OVP pin is above 100 mV during startup. Otherwise the IC would assume the output is shorted to GND and would not proceed with soft start. Figure 22. Typical application showing boost configuration and PMOS disconnect switch implementation R1 A VIN = 9 to 16 V L1 CSW L2 D2 B VOUT D1 CIN VIN VC CVDD VDD SW ROVP1 OVP ROVP2 COUT A8513 PAD FAULT EN/PWM ISET RISET GND LED COMP CP RZ (Optional) CZ (Optional) A R1 is used to provide a leakage path such that the OVP pin is above 100 mV during startup. Otherwise the IC would assume the output is shorted to GND and would not proceed with soft start. B D2 is a blocking diode. Figure 23. Typical application showing SEPIC configuration Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 21 A8513 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver Package LP, 16-Pin TSSOP with Exposed Thermal Pad 0.45 5.00±0.10 16 8º 0º 0.20 0.09 1.70 16 0.65 B 3 NOM A 4.40±0.10 6.40±0.20 0.60 ±0.15 1.00 REF 3.00 6.10 1 2 3 NOM Branded Face C 0.25 BSC SEATING PLANE 1.20 MAX SEATING PLANE GAUGE PLANE 12 3.00 C PCB Layout Reference View 16X 0.10 C 0.30 0.19 0.65 BSC 0.15 0.00 For Reference Only; not for tooling use (reference MO-153 ABT) Dimensions in millimeters Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown A Terminal #1 mark area B Exposed thermal pad (bottom surface); dimensions may vary with device C Reference land pattern layout (reference IPC7351 SOP65P640X110-17M); All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and PCB layout tolerances; when mounting on a multilayer PCB, thermal vias at the exposed thermal pad land can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5) Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 22 A8513 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver Package LY, 10-Pin MSOP with Exposed Thermal Pad 3.00 ±0.10 10 0° to 6° 0.30 10 0.50 0.15 ±0.05 1.65 3.00 ±0.10 A 4.88 ±0.20 1.73 4.60 0.53 ±0.10 1 2 0.25 1.98 1 2 Seating Plane Gauge Plane C 1 1.98 MIN 1 2 B 1.73 For Reference Only; not for tooling use (reference JEDEC MO-187BA-T) Dimensions in millimeters Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown A Terminal #1 mark area B Exposed thermal pad (bottom surface) C Reference land pattern layout (reference IPC7351 SOP50P490X110-11M) All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and PCB layout tolerances; when mounting on a multilayer PCB, thermal vias at the exposed thermal pad land can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5) 10 0.86 ±0.05 SEATING PLANE 0.27 0.18 0.50 REF 0.05 0.15 Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 23 A8513 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver Revision History Revision Rev. 2 Revision Date January 18, 2012 Description of Revision Update Features List Copyright ©2011-2012, Allegro MicroSystems, Inc. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the failure of that life support device or system, or to affect the safety or effectiveness of that device or system. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use. Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 24